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JitIL: Added some instruction handlers. They were ported from Jit64. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6110 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nodchip 2010-08-19 14:10:22 +00:00
parent 7703ae0477
commit 7b9d0dbedc
4 changed files with 54 additions and 37 deletions
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3
Source/Core/Core/Src/PowerPC/Jit64IL/IR.h
View File

@ -286,6 +286,9 @@ public:
InstLoc EmitStoreGReg(InstLoc value, unsigned reg) {
return FoldUOp(StoreGReg, value, reg);
}
InstLoc EmitNot(InstLoc op1) {
return EmitXor(op1, EmitIntConst(-1U));
}
InstLoc EmitAnd(InstLoc op1, InstLoc op2) {
return FoldBiOp(And, op1, op2);
}

4
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.h
View File

@ -140,9 +140,7 @@ public:
void DynaRunTable63(UGeckoInstruction _inst);
void addx(UGeckoInstruction inst);
void orx(UGeckoInstruction inst);
void xorx(UGeckoInstruction inst);
void andx(UGeckoInstruction inst);
void boolX(UGeckoInstruction inst);
void mulli(UGeckoInstruction inst);
void mulhwux(UGeckoInstruction inst);
void mullwx(UGeckoInstruction inst);

68
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp
View File

@ -130,39 +130,55 @@ void JitIL::cmpXX(UGeckoInstruction inst)
ibuild.EmitStoreCR(res, inst.CRFD);
}
void JitIL::orx(UGeckoInstruction inst)
void JitIL::boolX(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
val = ibuild.EmitOr(ibuild.EmitLoadGReg(inst.RS), val);
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
IREmitter::InstLoc a = NULL;
IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS);
IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB);
// m_GPR[_inst.RA] = m_GPR[_inst.RS] ^ m_GPR[_inst.RB];
void JitIL::xorx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
val = ibuild.EmitXor(ibuild.EmitLoadGReg(inst.RS), val);
ibuild.EmitStoreGReg(val, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
}
if (inst.SUBOP10 == 28) /* andx */
{
a = ibuild.EmitAnd(s, b);
}
else if (inst.SUBOP10 == 476) /* nandx */
{
a = ibuild.EmitNot(ibuild.EmitAnd(s, b));
}
else if (inst.SUBOP10 == 60) /* andcx */
{
a = ibuild.EmitAnd(s, ibuild.EmitNot(b));
}
else if (inst.SUBOP10 == 444) /* orx */
{
a = ibuild.EmitOr(s, b);
}
else if (inst.SUBOP10 == 124) /* norx */
{
a = ibuild.EmitNot(ibuild.EmitOr(s, b));
}
else if (inst.SUBOP10 == 412) /* orcx */
{
a = ibuild.EmitOr(s, ibuild.EmitNot(b));
}
else if (inst.SUBOP10 == 316) /* xorx */
{
a = ibuild.EmitXor(s, b);
}
else if (inst.SUBOP10 == 284) /* eqvx */
{
a = ibuild.EmitNot(ibuild.EmitXor(s, b));
}
else
{
PanicAlert("WTF!");
}
void JitIL::andx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB);
val = ibuild.EmitAnd(ibuild.EmitLoadGReg(inst.RS), val);
ibuild.EmitStoreGReg(val, inst.RA);
ibuild.EmitStoreGReg(a, inst.RA);
if (inst.Rc)
ComputeRC(ibuild, val);
ComputeRC(ibuild, a);
}
void JitIL::extsbx(UGeckoInstruction inst)

16
Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp
View File

@ -195,14 +195,14 @@ static GekkoOPTemplate table19[] =
static GekkoOPTemplate table31[] =
{
{28, &JitIL::andx}, //"andx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{60, &JitIL::Default}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{444, &JitIL::orx}, //"orx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{124, &JitIL::Default}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{316, &JitIL::xorx}, //"xorx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{412, &JitIL::Default}, //"orcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{476, &JitIL::Default}, //"nandx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{284, &JitIL::Default}, //"eqvx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{28, &JitIL::boolX}, //"andx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{60, &JitIL::boolX}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{444, &JitIL::boolX}, //"orx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{124, &JitIL::boolX}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{316, &JitIL::boolX}, //"xorx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{412, &JitIL::boolX}, //"orcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{476, &JitIL::boolX}, //"nandx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{284, &JitIL::boolX}, //"eqvx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
{0, &JitIL::cmpXX}, //"cmp", OPTYPE_INTEGER, FL_IN_AB | FL_SET_CRn}},
{32, &JitIL::cmpXX}, //"cmpl", OPTYPE_INTEGER, FL_IN_AB | FL_SET_CRn}},
{26, &JitIL::cntlzwx}, //"cntlzwx",OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}},