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[ARM-JITARMIL] CMP optimization. Int3 IR. DownCount added.

This commit is contained in:
Ryan Houdek 2013-10-07 23:25:13 +00:00
parent a4eab75d15
commit 0236ba3f86
3 changed files with 37 additions and 3 deletions
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15
Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp
View File

@ -407,8 +407,14 @@ static void DoWriteCode(IRBuilder* ibuild, JitArmIL* Jit) {
case BranchCond: { case BranchCond: {
if (isICmp(*getOp1(I)) && if (isICmp(*getOp1(I)) &&
isImm(*getOp2(getOp1(I)))) { isImm(*getOp2(getOp1(I)))) {
Jit->MOVI2R(R14, RI.Build->GetImmValue(getOp2(getOp1(I)))); unsigned imm = RI.Build->GetImmValue(getOp2(getOp1(I)));
Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), R14); if (imm > 255)
{
Jit->MOVI2R(R14, imm);
Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), R14);
}
else
Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), imm);
CCFlags flag; CCFlags flag;
switch (getOpcode(*getOp1(I))) { switch (getOpcode(*getOp1(I))) {
case ICmpEq: flag = CC_NEQ; break; case ICmpEq: flag = CC_NEQ; break;
@ -549,6 +555,11 @@ static void DoWriteCode(IRBuilder* ibuild, JitArmIL* Jit) {
regEmitBinInst(RI, I, &JitArmIL::BIN_ADD, true); regEmitBinInst(RI, I, &JitArmIL::BIN_ADD, true);
break; break;
} }
case Int3:
Jit->BKPT(0x321);
break;
case Tramp: break;
case Nop: break;
default: default:
PanicAlert("Unknown JIT instruction; aborting!"); PanicAlert("Unknown JIT instruction; aborting!");
ibuild->WriteToFile(0); ibuild->WriteToFile(0);

24
Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.cpp
View File

@ -70,9 +70,30 @@ void JitArmIL::DoNothing(UGeckoInstruction _inst)
{ {
// Yup, just don't do anything. // Yup, just don't do anything.
} }
void JitArmIL::DoDownCount()
{
ARMReg rA = R14;
ARMReg rB = R12;
MOVI2R(rA, (u32)&CoreTiming::downcount);
LDR(rB, rA);
if(js.downcountAmount < 255) // We can enlarge this if we used rotations
{
SUBS(rB, rB, js.downcountAmount);
STR(rB, rA);
}
else
{
ARMReg rC = R11;
MOVI2R(rC, js.downcountAmount);
SUBS(rB, rB, rC);
STR(rB, rA);
}
}
void JitArmIL::WriteExitDestInReg(ARMReg Reg) void JitArmIL::WriteExitDestInReg(ARMReg Reg)
{ {
STR(Reg, R9, PPCSTATE_OFF(pc)); STR(Reg, R9, PPCSTATE_OFF(pc));
DoDownCount();
MOVI2R(Reg, (u32)asm_routines.dispatcher); MOVI2R(Reg, (u32)asm_routines.dispatcher);
B(Reg); B(Reg);
} }
@ -80,13 +101,14 @@ void JitArmIL::WriteExitDestInReg(ARMReg Reg)
void JitArmIL::WriteRfiExitDestInR(ARMReg Reg) void JitArmIL::WriteRfiExitDestInR(ARMReg Reg)
{ {
STR(Reg, R9, PPCSTATE_OFF(pc)); STR(Reg, R9, PPCSTATE_OFF(pc));
DoDownCount();
MOVI2R(Reg, (u32)asm_routines.testExceptions); MOVI2R(Reg, (u32)asm_routines.testExceptions);
B(Reg); B(Reg);
} }
void JitArmIL::WriteExit(u32 destination, int exit_num) void JitArmIL::WriteExit(u32 destination, int exit_num)
{ {
DoDownCount();
//If nobody has taken care of this yet (this can be removed when all branches are done) //If nobody has taken care of this yet (this can be removed when all branches are done)
JitBlock *b = js.curBlock; JitBlock *b = js.curBlock;
b->exitAddress[exit_num] = destination; b->exitAddress[exit_num] = destination;

1
Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h
View File

@ -31,6 +31,7 @@ private:
JitArmILAsmRoutineManager asm_routines; JitArmILAsmRoutineManager asm_routines;
void PrintDebug(UGeckoInstruction inst, u32 level); void PrintDebug(UGeckoInstruction inst, u32 level);
void DoDownCount();
public: public:
// Initialization, etc // Initialization, etc