diff --git a/Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp b/Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp index 3ee7950f42..d1bdd157ad 100644 --- a/Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArmIL/IR_Arm.cpp @@ -407,8 +407,14 @@ static void DoWriteCode(IRBuilder* ibuild, JitArmIL* Jit) { case BranchCond: { if (isICmp(*getOp1(I)) && isImm(*getOp2(getOp1(I)))) { - Jit->MOVI2R(R14, RI.Build->GetImmValue(getOp2(getOp1(I)))); - Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), R14); + unsigned imm = RI.Build->GetImmValue(getOp2(getOp1(I))); + if (imm > 255) + { + Jit->MOVI2R(R14, imm); + Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), R14); + } + else + Jit->CMP(regLocForInst(RI, getOp1(getOp1(I))), imm); CCFlags flag; switch (getOpcode(*getOp1(I))) { case ICmpEq: flag = CC_NEQ; break; @@ -549,6 +555,11 @@ static void DoWriteCode(IRBuilder* ibuild, JitArmIL* Jit) { regEmitBinInst(RI, I, &JitArmIL::BIN_ADD, true); break; } + case Int3: + Jit->BKPT(0x321); + break; + case Tramp: break; + case Nop: break; default: PanicAlert("Unknown JIT instruction; aborting!"); ibuild->WriteToFile(0); diff --git a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.cpp b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.cpp index e06c642730..a4041c7244 100644 --- a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.cpp @@ -70,9 +70,30 @@ void JitArmIL::DoNothing(UGeckoInstruction _inst) { // Yup, just don't do anything. } +void JitArmIL::DoDownCount() +{ + ARMReg rA = R14; + ARMReg rB = R12; + MOVI2R(rA, (u32)&CoreTiming::downcount); + LDR(rB, rA); + if(js.downcountAmount < 255) // We can enlarge this if we used rotations + { + SUBS(rB, rB, js.downcountAmount); + STR(rB, rA); + } + else + { + ARMReg rC = R11; + MOVI2R(rC, js.downcountAmount); + SUBS(rB, rB, rC); + STR(rB, rA); + } +} + void JitArmIL::WriteExitDestInReg(ARMReg Reg) { STR(Reg, R9, PPCSTATE_OFF(pc)); + DoDownCount(); MOVI2R(Reg, (u32)asm_routines.dispatcher); B(Reg); } @@ -80,13 +101,14 @@ void JitArmIL::WriteExitDestInReg(ARMReg Reg) void JitArmIL::WriteRfiExitDestInR(ARMReg Reg) { STR(Reg, R9, PPCSTATE_OFF(pc)); - + DoDownCount(); MOVI2R(Reg, (u32)asm_routines.testExceptions); B(Reg); } void JitArmIL::WriteExit(u32 destination, int exit_num) { + DoDownCount(); //If nobody has taken care of this yet (this can be removed when all branches are done) JitBlock *b = js.curBlock; b->exitAddress[exit_num] = destination; diff --git a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h index 4c371a3b16..a6a6b8012f 100644 --- a/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h +++ b/Source/Core/Core/Src/PowerPC/JitArmIL/JitIL.h @@ -31,6 +31,7 @@ private: JitArmILAsmRoutineManager asm_routines; void PrintDebug(UGeckoInstruction inst, u32 level); + void DoDownCount(); public: // Initialization, etc