remove clunky, buggy, and memory-leaking bitwise instruction decoding only used during error messages pretty much for displaying the opcode part of the instruction. would be better implemented as an online utility anyway

This commit is contained in:
zeromus 2016-08-16 02:53:17 -05:00
parent 1303defe47
commit ff3eb24e2a
5 changed files with 6 additions and 35 deletions

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@ -2067,13 +2067,13 @@ FORCEINLINE __m128i ConvertColor6665To5551(const __m128i &srcLo, const __m128i &
#endif
template<bool SWAP_RB, bool UNALIGNED> void ConvertColorBuffer555To8888Opaque(const u16 *__restrict src, u32 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool UNALIGNED> void ConvertColorBuffer555To6665Opaque(const u16 *__restrict src, u32 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool IS_UNALIGNED> void ConvertColorBuffer555To8888Opaque(const u16 *__restrict src, u32 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool IS_UNALIGNED> void ConvertColorBuffer555To6665Opaque(const u16 *__restrict src, u32 *__restrict dst, size_t pixCount);
template<bool SWAP_RB> void ConvertColorBuffer8888To6665(const u32 *src, u32 *dst, size_t pixCount);
template<bool SWAP_RB> void ConvertColorBuffer6665To8888(const u32 *src, u32 *dst, size_t pixCount);
template<bool SWAP_RB, bool UNALIGNED> void ConvertColorBuffer8888To5551(const u32 *__restrict src, u16 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool UNALIGNED> void ConvertColorBuffer6665To5551(const u32 *__restrict src, u16 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool IS_UNALIGNED> void ConvertColorBuffer8888To5551(const u32 *__restrict src, u16 *__restrict dst, size_t pixCount);
template<bool SWAP_RB, bool IS_UNALIGNED> void ConvertColorBuffer6665To5551(const u32 *__restrict src, u16 *__restrict dst, size_t pixCount);
#endif

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@ -570,7 +570,7 @@ BOOL armcpu_irqException(armcpu_t *armcpu)
u32 TRAPUNDEF(armcpu_t* cpu)
{
INFO("ARM%c: Undefined instruction: 0x%08X (%s) PC=0x%08X\n", cpu->proc_ID?'7':'9', cpu->instruction, decodeIntruction(false, cpu->instruction), cpu->instruct_adr);
INFO("ARM%c: Undefined instruction: 0x%08X PC=0x%08X\n", cpu->proc_ID?'7':'9', cpu->instruction, cpu->instruct_adr);
if (((cpu->intVector != 0) ^ (cpu->proc_ID == ARMCPU_ARM9)))
{
@ -757,23 +757,6 @@ void setIF(int PROCNUM, u32 flag)
NDS_Reschedule();
}
char* decodeIntruction(bool thumb_mode, u32 instr)
{
char txt[20] = {0};
u32 tmp = 0;
if (thumb_mode == true)
{
tmp = (instr >> 6);
strcpy(txt, intToBin((u16)tmp)+6);
}
else
{
tmp = ((instr >> 16) & 0x0FF0) | ((instr >> 4) & 0x0F);
strcpy(txt, intToBin((u32)tmp)+20);
}
return strdup(txt);
}
const armcpu_ctrl_iface arm_default_ctrl_iface = {
stall_cpu,
unstall_cpu,

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@ -335,7 +335,6 @@ template<int PROCNUM, bool jit> u32 armcpu_exec();
#endif
void setIF(int PROCNUM, u32 flag);
char* decodeIntruction(bool thumb_mode, u32 instr);
static INLINE void NDS_makeIrq(int PROCNUM, u32 num)
{

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@ -46,17 +46,6 @@ T reverseBits(T x)
return h;
}
template<typename T>
char *intToBin(T val)
{
char buf[256] = {0};
for (int i = sizeof(T)*8, t = 0; i > 0; --i, t++)
{
buf[i-1] = (val & (1<<t))?'1':'0';
}
return strdup(buf);
}
extern char *trim(char *s, int len=-1);
extern char *removeSpecialChars(char *s);

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@ -38,7 +38,7 @@
//-----------------------------------------------------------------------------
TEMPLATE static u32 FASTCALL OP_UND_THUMB(const u32 i)
{
INFO("THUMB%c: Undefined instruction: 0x%08X (%s) PC=0x%08X\n", cpu->proc_ID?'7':'9', cpu->instruction, decodeIntruction(true, cpu->instruction), cpu->instruct_adr);
INFO("THUMB%c: Undefined instruction: 0x%08X PC=0x%08X\n", cpu->proc_ID?'7':'9', cpu->instruction, cpu->instruct_adr);
TRAPUNDEF(cpu);
return 1;
}