fix some recently agitated gxfifo-related asserts

This commit is contained in:
zeromus 2010-09-21 19:54:33 +00:00
parent d55eb9ba06
commit f8c453def5
4 changed files with 17 additions and 19 deletions

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@ -165,25 +165,16 @@ void GFX_FIFOclear()
static void GXF_FIFO_handleEvents() static void GXF_FIFO_handleEvents()
{ {
if(gxFIFO.size <= 127) bool low = gxFIFO.size <= 127;
{ bool lowchange = MMU_new.gxstat.fifo_low ^ low;
//TODO - should this always happen, over and over, until the dma is disabled? MMU_new.gxstat.fifo_low = low;
//or only when we change to this state? if(low) triggerDma(EDMAMode_GXFifo);
if(MMU_new.gxstat.gxfifo_irq == 1)
setIF(0, (1<<21)); //the half gxfifo irq
//might need to trigger a gxfifo dma bool empty = gxFIFO.size == 0;
triggerDma(EDMAMode_GXFifo); bool emptychange = MMU_new.gxstat.fifo_empty ^ empty;
} MMU_new.gxstat.fifo_empty = empty;
if(gxFIFO.size == 0) {
//we just went to empty
if(MMU_new.gxstat.gxfifo_irq == 2)
setIF(0, (1<<21)); //the empty gxfifo irq
}
if(emptychange||lowchange) NDS_Reschedule();
} }
void GFX_FIFOsend(u8 cmd, u32 param) void GFX_FIFOsend(u8 cmd, u32 param)

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@ -1267,11 +1267,11 @@ u32 MMU_struct::gen_IF()
case 0: //never case 0: //never
break; break;
case 1: //less than half full case 1: //less than half full
if(gxFIFO.size <= 127) if(MMU_new.gxstat.fifo_low)
IF |= IRQ_MASK_ARM9_GXFIFO; IF |= IRQ_MASK_ARM9_GXFIFO;
break; break;
case 2: //empty case 2: //empty
if(gxFIFO.size == 0) if(MMU_new.gxstat.fifo_empty)
IF |= IRQ_MASK_ARM9_GXFIFO; IF |= IRQ_MASK_ARM9_GXFIFO;
break; break;
case 3: //reserved/unknown case 3: //reserved/unknown

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@ -116,6 +116,8 @@ struct TGXSTAT : public TRegister_32
{ {
TGXSTAT() { TGXSTAT() {
gxfifo_irq = se = tr = tb = sb = 0; gxfifo_irq = se = tr = tb = sb = 0;
fifo_empty = true;
fifo_low = false;
} }
u8 tb; //test busy u8 tb; //test busy
u8 tr; //test result u8 tr; //test result
@ -123,6 +125,8 @@ struct TGXSTAT : public TRegister_32
u8 sb; //stack busy u8 sb; //stack busy
u8 gxfifo_irq; //irq configuration u8 gxfifo_irq; //irq configuration
bool fifo_empty, fifo_low;
virtual u32 read32(); virtual u32 read32();
virtual void write32(const u32 val); virtual void write32(const u32 val);

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@ -453,6 +453,9 @@ static bool mmu_loadstate(EMUFILE* is, int size)
MMU.reg_IF_bits[0] &= ~0x00260000; MMU.reg_IF_bits[0] &= ~0x00260000;
MMU.reg_IF_bits[1] &= ~0x00060000; MMU.reg_IF_bits[1] &= ~0x00060000;
MMU_new.gxstat.fifo_low = gxFIFO.size <= 127;
MMU_new.gxstat.fifo_empty = gxFIFO.size == 0;
return ok; return ok;
} }