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no more gpu->prop 

replaced with gpu->dispCnt & macro BGxENABLED
This commit is contained in:
damdoum 2007-01-09 08:40:05 +00:00
parent 4ba50a1f1e
commit f5f468387e
2 changed files with 88 additions and 83 deletions
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46
desmume/src/GPU.c
View File

@ -126,26 +126,26 @@ void GPU_DeInit(GPU * gpu)
/* Sets up LCD control variables for Display Engines A and B for quick reading */ /* Sets up LCD control variables for Display Engines A and B for quick reading */
void GPU_setVideoProp(GPU * gpu, u32 p) void GPU_setVideoProp(GPU * gpu, u32 p)
{ {
_DISPCNT_ * cnt = (_DISPCNT_*)&p; gpu->dispCnt = (_DISPCNT_)p;
gpu->prop = p; _DISPCNT_ * cnt = &gpu->dispCnt;
// gpu->dispMode = DISPCNT_DISPLAY_MODE(p,gpu->lcd) ; // gpu->dispMode = DISPCNT_DISPLAY_MODE(p,gpu->lcd) ;
gpu->dispMode = cnt->DisplayMode & ((gpu->lcd)?1:3); gpu->dispMode = cnt->DisplayMode & ((gpu->lcd)?1:3);
switch (gpu->dispMode) switch (gpu->dispMode)
{ {
case 0: // Display Off case 0: // Display Off
return; return;
case 1: // Display BG and OBJ layers case 1: // Display BG and OBJ layers
break; break;
case 2: // Display framebuffer case 2: // Display framebuffer
// gpu->vramBlock = DISPCNT_VRAMBLOCK(p) ; // gpu->vramBlock = DISPCNT_VRAMBLOCK(p) ;
gpu->vramBlock = cnt->VRAM_Block; gpu->vramBlock = cnt->VRAM_Block;
return; return;
case 3: // Display from Main RAM case 3: // Display from Main RAM
LOG("FIXME: Display Mode 3 not supported(Display from Main RAM)\n"); LOG("FIXME: Display Mode 3 not supported(Display from Main RAM)\n");
return; return;
} }
gpu->nbBGActif = 0; gpu->nbBGActif = 0;
if(cnt->OBJ_Tile_1D) if(cnt->OBJ_Tile_1D)
@ -392,8 +392,8 @@ void GPU_setBGProp(GPU * gpu, u16 num, u16 p)
else else
{ {
gpu->BG_bmp_ram[num] = ((u8 *)ARM9Mem.ARM9_ABG) + BGCNT_SCREENBASEBLOCK(p) * ADDRESS_STEP_16KB; gpu->BG_bmp_ram[num] = ((u8 *)ARM9Mem.ARM9_ABG) + BGCNT_SCREENBASEBLOCK(p) * ADDRESS_STEP_16KB;
gpu->BG_tile_ram[num] = ((u8 *)ARM9Mem.ARM9_ABG) + BGCNT_CHARBASEBLOCK(p) * ADDRESS_STEP_16KB + ((_DISPCNT_*)&gpu->prop)->CharacBase_Block * ADDRESS_STEP_64kB ; gpu->BG_tile_ram[num] = ((u8 *)ARM9Mem.ARM9_ABG) + BGCNT_CHARBASEBLOCK(p) * ADDRESS_STEP_16KB + (gpu->dispCnt->CharacBase_Block * ADDRESS_STEP_64kB ;
gpu->BG_map_ram[num] = ARM9Mem.ARM9_ABG + BGCNT_SCREENBASEBLOCK(p) * ADDRESS_STEP_2KB + ((_DISPCNT_*)&gpu->prop)->ScreenBase_Block * ADDRESS_STEP_64kB; gpu->BG_map_ram[num] = ARM9Mem.ARM9_ABG + BGCNT_SCREENBASEBLOCK(p) * ADDRESS_STEP_2KB + gpu->dispCnt->ScreenBase_Block * ADDRESS_STEP_64kB;
} }
/*if(!(p&(1<<7))) /*if(!(p&(1<<7)))
@ -415,8 +415,8 @@ void GPU_setBGProp(GPU * gpu, u16 num, u16 p)
/* we got a naming problem here, dispMode actual is _DISPCNT_.ExMode */ /* we got a naming problem here, dispMode actual is _DISPCNT_.ExMode */
// gpu->BGSize[num][0] = sizeTab[mode2type[gpu->dispMode][num]][BGCNT_SCREENSIZE(p)][0]; // gpu->BGSize[num][0] = sizeTab[mode2type[gpu->dispMode][num]][BGCNT_SCREENSIZE(p)][0];
// gpu->BGSize[num][1] = sizeTab[mode2type[gpu->dispMode][num]][BGCNT_SCREENSIZE(p)][1]; // gpu->BGSize[num][1] = sizeTab[mode2type[gpu->dispMode][num]][BGCNT_SCREENSIZE(p)][1];
gpu->BGSize[num][0] = sizeTab[mode2type[((_DISPCNT_*)&gpu->prop)->BG_Mode][num]][BGCNT_SCREENSIZE(p)][0]; gpu->BGSize[num][0] = sizeTab[mode2type[(gpu->dispCnt->BG_Mode][num]][BGCNT_SCREENSIZE(p)][0];
gpu->BGSize[num][1] = sizeTab[mode2type[((_DISPCNT_*)&gpu->prop)->BG_Mode][num]][BGCNT_SCREENSIZE(p)][1]; gpu->BGSize[num][1] = sizeTab[mode2type[(gpu->dispCnt->BG_Mode][num]][BGCNT_SCREENSIZE(p)][1];
} }
@ -441,7 +441,7 @@ void GPU_remove(GPU * gpu, u8 num)
void GPU_addBack(GPU * gpu, u8 num) void GPU_addBack(GPU * gpu, u8 num)
{ {
if((!gpu->BGIndex[num])&&(gpu->prop&((1<<8)<<num))) if((!gpu->BGIndex[num])&& BGxENABLED(gpu->dispCnt,num))
{ {
u8 i = 0; u8 i = 0;
s8 j; s8 j;
@ -791,7 +791,7 @@ INLINE void renderline_textBG(GPU * gpu, u8 num, u8 * DST, u16 X, u16 Y, u16 LG)
} }
return; return;
} }
if(!((_DISPCNT_*)&gpu->prop)->ExBGxPalette_Enable) /* color: no extended palette */ if(!(gpu->dispCnt->ExBGxPalette_Enable) /* color: no extended palette */
{ {
yoff = ((Y&7)<<3); yoff = ((Y&7)<<3);
pal = ARM9Mem.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB ; pal = ARM9Mem.ARM9_VMEM + gpu->core * ADDRESS_STEP_1KB ;
@ -1178,7 +1178,7 @@ void sprite1D(GPU * gpu, u16 l, u8 * dst, u8 * prioTab)
u16 i; u16 i;
src = gpu->sprMem + (spriteInfo->TileIndex<<block) + ((y>>3)*sprSize.x*8) + ((y&0x7)*8); src = gpu->sprMem + (spriteInfo->TileIndex<<block) + ((y>>3)*sprSize.x*8) + ((y&0x7)*8);
if(((_DISPCNT_*)&gpu->prop)->ExOBJPalette_Enable) if(gpu->dispCnt->ExOBJPalette_Enable)
pal = ARM9Mem.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200); pal = ARM9Mem.ObjExtPal[gpu->core][0]+(spriteInfo->PaletteIndex*0x200);
else else
pal = ARM9Mem.ARM9_VMEM + 0x200 + gpu->core *0x400; pal = ARM9Mem.ARM9_VMEM + 0x200 + gpu->core *0x400;

125
desmume/src/GPU.h
View File

@ -66,6 +66,11 @@ typedef struct
/*15*/ unsigned WinOBJ_Enable:1; // A+B: 0=disable, 1=Enable /*15*/ unsigned WinOBJ_Enable:1; // A+B: 0=disable, 1=Enable
/*16*/ unsigned DisplayMode:2; // A+B: coreA(0..3) coreB(0..1) GBA(Green Swap) /*16*/ unsigned DisplayMode:2; // A+B: coreA(0..3) coreB(0..1) GBA(Green Swap)
// 0=off (white screen)
// 1=on (normal BG & OBJ layers)
// 2=VRAM display (coreA only)
// 3=RAM display (coreA only, DMA transfers)
/*18*/ unsigned VRAM_Block:2; // A : VRAM block (0..3=A..D) /*18*/ unsigned VRAM_Block:2; // A : VRAM block (0..3=A..D)
/*20*/ unsigned OBJ_Tile_1D_Bound:2; // A+B: /*20*/ unsigned OBJ_Tile_1D_Bound:2; // A+B:
/*22*/ unsigned OBJ_BMP_1D_Bound:1; // A : /*22*/ unsigned OBJ_BMP_1D_Bound:1; // A :
@ -76,20 +81,23 @@ typedef struct
/*31*/ unsigned ExOBJPalette_Enable:1; // A+B: 0=disable, 1=Enable OBJ extended Palette /*31*/ unsigned ExOBJPalette_Enable:1; // A+B: 0=disable, 1=Enable OBJ extended Palette
} _DISPCNT_; } _DISPCNT_;
#define DISPCNT_OBJMAPING1D(val) (((val) >> 4) & 1) #define BGxENABLED(cnt,num) ((num<8)?(cnt>>8)&num:0)
#define DISPCNT_BG0ENABLED(val) (((val) >> 8) & 1)
#define DISPCNT_BG1ENABLED(val) (((val) >> 9) & 1) /* these defines no more useful, do we keep them ? */
#define DISPCNT_BG2ENABLED(val) (((val) >> 10) & 1) #define DISPCNT_OBJMAPING1D(val) (((val) >> 4) & 1)
#define DISPCNT_BG3ENABLED(val) (((val) >> 11) & 1) #define DISPCNT_BG0ENABLED(val) (((val) >> 8) & 1)
#define DISPCNT_SPRITEENABLE(val) (((val) >> 12) & 1) #define DISPCNT_BG1ENABLED(val) (((val) >> 9) & 1)
#define DISPCNT_MODE(val) ((val) & 7) #define DISPCNT_BG2ENABLED(val) (((val) >> 10) & 1)
#define DISPCNT_BG3ENABLED(val) (((val) >> 11) & 1)
#define DISPCNT_SPRITEENABLE(val) (((val) >> 12) & 1)
#define DISPCNT_MODE(val) ((val) & 7)
/* display mode: gpu0: (val>>16) & 3, gpu1: (val>>16) & 1 */ /* display mode: gpu0: (val>>16) & 3, gpu1: (val>>16) & 1 */
#define DISPCNT_DISPLAY_MODE(val,num) (((val) >> 16) & ((num)?1:3)) #define DISPCNT_DISPLAY_MODE(val,num) (((val) >> 16) & ((num)?1:3))
#define DISPCNT_VRAMBLOCK(val) (((val) >> 18) & 3) #define DISPCNT_VRAMBLOCK(val) (((val) >> 18) & 3)
#define DISPCNT_TILEOBJ1D_BOUNDARY(val) (((val) >> 20) & 3) #define DISPCNT_TILEOBJ1D_BOUNDARY(val) (((val) >> 20) & 3)
#define DISPCNT_BMPOBJ1D_BOUNDARY(val) (((val) >> 22) & 1) #define DISPCNT_BMPOBJ1D_BOUNDARY(val) (((val) >> 22) & 1)
#define DISPCNT_SCREENBASEBLOCK(val) (((val) >> 27) & 7) #define DISPCNT_SCREENBASEBLOCK(val) (((val) >> 27) & 7)
#define DISPCNT_USEEXTPAL(val) (((val) >> 30) & 1) #define DISPCNT_USEEXTPAL(val) (((val) >> 30) & 1)
#define BGCNT_PRIORITY(val) ((val) & 3) #define BGCNT_PRIORITY(val) ((val) & 3)
#define BGCNT_CHARBASEBLOCK(val) (((val) >> 2) & 0x0F) #define BGCNT_CHARBASEBLOCK(val) (((val) >> 2) & 0x0F)
@ -140,56 +148,53 @@ typedef struct _GPU GPU;
struct _GPU struct _GPU
{ {
//GPU(u8 l); _DISPCNT_ dispCnt;
u32 prop;
u16 BGProp[4]; u16 BGProp[4];
#define BGBmpBB BG_bmp_ram #define BGBmpBB BG_bmp_ram
#define BGChBB BG_tile_ram #define BGChBB BG_tile_ram
u8 *(BG_bmp_ram[4]); u8 *(BG_bmp_ram[4]);
u8 *(BG_tile_ram[4]); u8 *(BG_tile_ram[4]);
u8 *(BG_map_ram[4]); u8 *(BG_map_ram[4]);
u8 BGExtPalSlot[4]; u8 BGExtPalSlot[4];
u32 BGSize[4][2]; u32 BGSize[4][2];
u16 BGSX[4]; u16 BGSX[4];
u16 BGSY[4]; u16 BGSY[4];
s32 BGX[4]; s32 BGX[4];
s32 BGY[4]; s32 BGY[4];
s16 BGPA[4]; s16 BGPA[4];
s16 BGPB[4]; s16 BGPB[4];
s16 BGPC[4]; s16 BGPC[4];
s16 BGPD[4]; s16 BGPD[4];
u8 lcd; u8 lcd;
u8 core; u8 core;
u8 dispMode; u8 dispMode;
u8 vramBlock; u8 vramBlock;
u8 nbBGActif; u8 nbBGActif;
u8 BGIndex[4]; u8 BGIndex[4];
u8 ordre[4]; u8 ordre[4];
BOOL dispBG[4]; BOOL dispBG[4];
OAM * oam; OAM * oam;
u8 * sprMem; u8 * sprMem;
u8 sprBlock; u8 sprBlock;
u8 sprBMPBlock; u8 sprBMPBlock;
u8 sprBMPMode; u8 sprBMPMode;
u32 sprEnable ; u32 sprEnable ;
u16 BLDCNT ; u16 BLDCNT ;
u16 BLDALPHA ; u16 BLDALPHA ;
u16 BLDY ; u16 BLDY ;
u16 MOSAIC ;
u16 MOSAIC ;
void (*spriteRender)(GPU * gpu, u16 l, u8 * dst, u8 * prioTab);
void (*spriteRender)(GPU * gpu, u16 l, u8 * dst, u8 * prioTab);
}; };
extern u8 GPU_screen[4*256*192]; extern u8 GPU_screen[4*256*192];
@ -296,7 +301,7 @@ static INLINE void GPU_ligne(Screen * screen, u16 l)
for(i8 = 0; i8 < gpu->nbBGActif; ++i8) for(i8 = 0; i8 < gpu->nbBGActif; ++i8)
{ {
modeRender[gpu->prop&7][gpu->ordre[i8]](gpu, gpu->ordre[i8], l, dst); modeRender[gpu->dispCnt->BG_Mode][gpu->ordre[i8]](gpu, gpu->ordre[i8], l, dst);
bgprio = gpu->BGProp[gpu->ordre[i8]]&3; bgprio = gpu->BGProp[gpu->ordre[i8]]&3;
if (gpu->sprEnable) if (gpu->sprEnable)
{ {