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clear lag frame on 8 and 32bit keypad register reads

This commit is contained in:
zeromus 2011-01-01 21:41:31 +00:00
parent ca198d08bf
commit f502769b6c
1 changed files with 10 additions and 4 deletions
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12
desmume/src/MMU.cpp
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@ -3234,6 +3234,10 @@ u8 FASTCALL _MMU_ARM9_read08(u32 adr)
case REG_DISPA_DISP3DCNT+1: return readreg_DISP3DCNT(8,adr); case REG_DISPA_DISP3DCNT+1: return readreg_DISP3DCNT(8,adr);
case REG_DISPA_DISP3DCNT+2: return readreg_DISP3DCNT(8,adr); case REG_DISPA_DISP3DCNT+2: return readreg_DISP3DCNT(8,adr);
case REG_DISPA_DISP3DCNT+3: return readreg_DISP3DCNT(8,adr); case REG_DISPA_DISP3DCNT+3: return readreg_DISP3DCNT(8,adr);
case REG_KEYINPUT:
LagFrameFlag=0;
break;
} }
} }
@ -3315,9 +3319,7 @@ u16 FASTCALL _MMU_ARM9_read16(u32 adr)
case REG_DISPA_DISP3DCNT: return readreg_DISP3DCNT(16,adr); case REG_DISPA_DISP3DCNT: return readreg_DISP3DCNT(16,adr);
case REG_DISPA_DISP3DCNT+2: return readreg_DISP3DCNT(16,adr); case REG_DISPA_DISP3DCNT+2: return readreg_DISP3DCNT(16,adr);
case 0x04000130: case REG_KEYINPUT:
case 0x04000136:
//not sure whether these should trigger from byte reads
LagFrameFlag=0; LagFrameFlag=0;
break; break;
@ -3448,6 +3450,10 @@ u32 FASTCALL _MMU_ARM9_read32(u32 adr)
case REG_GCDATAIN: return MMU_readFromGC<ARMCPU_ARM9>(); case REG_GCDATAIN: return MMU_readFromGC<ARMCPU_ARM9>();
case REG_POWCNT1: return readreg_POWCNT1(32,adr); case REG_POWCNT1: return readreg_POWCNT1(32,adr);
case REG_DISPA_DISP3DCNT: return readreg_DISP3DCNT(32,adr); case REG_DISPA_DISP3DCNT: return readreg_DISP3DCNT(32,adr);
case REG_KEYINPUT:
LagFrameFlag=0;
break;
} }
return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][adr>>20], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr>>20]); return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][adr>>20], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr>>20]);
} }