merge 3498,3499,3509,3511 from trunk

This commit is contained in:
zeromus 2010-04-11 04:19:29 +00:00
parent 16944314fe
commit e7fdce57f8
11 changed files with 93 additions and 152 deletions

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@ -206,7 +206,6 @@ void GPU_Reset(GPU *g, u8 l)
g->core = l;
g->BGSize[0][0] = g->BGSize[1][0] = g->BGSize[2][0] = g->BGSize[3][0] = 256;
g->BGSize[0][1] = g->BGSize[1][1] = g->BGSize[2][1] = g->BGSize[3][1] = 256;
g->dispOBJ = g->dispBG[0] = g->dispBG[1] = g->dispBG[2] = g->dispBG[3] = TRUE;
g->spriteRenderMode = GPU::SPRITE_1D;
@ -247,11 +246,11 @@ static void GPU_resortBGs(GPU *gpu)
#define OP ^ !
// if we untick boxes, layers become invisible
//#define OP &&
gpu->LayersEnable[0] = gpu->dispBG[0] OP(cnt->BG0_Enable/* && !(cnt->BG0_3D && (gpu->core==0))*/);
gpu->LayersEnable[1] = gpu->dispBG[1] OP(cnt->BG1_Enable);
gpu->LayersEnable[2] = gpu->dispBG[2] OP(cnt->BG2_Enable);
gpu->LayersEnable[3] = gpu->dispBG[3] OP(cnt->BG3_Enable);
gpu->LayersEnable[4] = gpu->dispOBJ OP(cnt->OBJ_Enable);
gpu->LayersEnable[0] = CommonSettings.dispLayers[gpu->core][0] OP(cnt->BG0_Enable/* && !(cnt->BG0_3D && (gpu->core==0))*/);
gpu->LayersEnable[1] = CommonSettings.dispLayers[gpu->core][1] OP(cnt->BG1_Enable);
gpu->LayersEnable[2] = CommonSettings.dispLayers[gpu->core][2] OP(cnt->BG2_Enable);
gpu->LayersEnable[3] = CommonSettings.dispLayers[gpu->core][3] OP(cnt->BG3_Enable);
gpu->LayersEnable[4] = CommonSettings.dispLayers[gpu->core][4] OP(cnt->OBJ_Enable);
// KISS ! lower priority first, if same then lower num
for (i=0;i<NB_PRIORITIES;i++) {
@ -478,15 +477,12 @@ void GPU_setBGProp(GPU * gpu, u16 num, u16 p)
void GPU_remove(GPU * gpu, u8 num)
{
if (num == 4) gpu->dispOBJ = 0;
else gpu->dispBG[num] = 0;
CommonSettings.dispLayers[gpu->core][num] = false;
GPU_resortBGs(gpu);
}
void GPU_addBack(GPU * gpu, u8 num)
{
//REG_DISPx_pack_test(gpu);
if (num == 4) gpu->dispOBJ = 1;
else gpu->dispBG[num] = 1;
CommonSettings.dispLayers[gpu->core][num] = true;
GPU_resortBGs(gpu);
}

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@ -691,9 +691,6 @@ struct GPU
//FIFO fifo;
BOOL dispBG[4];
BOOL dispOBJ;
u8 bgPrio[5];
BOOL bg0HasHighestPrio;

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@ -1998,6 +1998,10 @@ void NDS_Reset()
TotalLagFrames = 0;
}
//spu must reset early on, since it will crash due to keeping a pointer into MMU memory for the sample pointers. yuck!
SPU_Reset();
MMU_Reset();
//ARM7 BIOS IRQ HANDLER
@ -2269,7 +2273,6 @@ void NDS_Reset()
Screen_Reset();
gfx3d_reset();
gpu3D->NDS_3D_Reset();
SPU_Reset();
WIFI_Reset();

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@ -508,6 +508,10 @@ extern struct TCommonSettings {
for(int i=0;i<16;i++)
spu_muteChannels[i] = false;
for(int g=0;g<2;g++)
for(int x=0;x<5;x++)
dispLayers[g][x]=true;
}
bool GFX3D_HighResolutionInterpolateColor;
bool GFX3D_EdgeMark;
@ -532,6 +536,8 @@ extern struct TCommonSettings {
int num_cores;
bool single_core() { return num_cores==1; }
bool rigorous_timing;
bool dispLayers[2][5];
FAST_ALIGN bool advanced_timing;

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@ -250,15 +250,19 @@ void SPU_Reset(void)
int i;
SPU_core->reset();
if(SPU_user) SPU_user->reset();
if(SNDCore && SPU_user) {
SNDCore->DeInit();
SNDCore->Init(SPU_user->bufsize*2);
SNDCore->SetVolume(volume);
//todo - check success?
if(SPU_user) {
if(SNDCore)
{
SNDCore->DeInit();
SNDCore->Init(SPU_user->bufsize*2);
SNDCore->SetVolume(volume);
}
SPU_user->reset();
}
//zero - 09-apr-2010: this concerns me, regarding savestate synch.
//After 0.9.6, lets experiment with removing it and just properly zapping the spu instead
// Reset Registers
for (i = 0x400; i < 0x51D; i++)
T1WriteByte(MMU.ARM7_REG, i, 0);
@ -275,6 +279,8 @@ void SPU_struct::reset()
memset((void *)channels, 0, sizeof(channel_struct) * 16);
reconstruct(&regs);
for(int i = 0; i < 16; i++)
{
channels[i].num = i;
@ -1666,6 +1672,7 @@ bool spu_loadstate(EMUFILE* is, int size)
//fixup the pointers which we had are supposed to keep cached
chan.buf8 = (s8*)&MMU.MMU_MEM[1][(chan.addr>>20)&0xFF][(chan.addr & MMU.MMU_MASK[1][(chan.addr >> 20) & 0xFF])];
chan.buf16 = (s16*)chan.buf8;
}
if(version>=2) {

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@ -208,6 +208,26 @@ void DEBUG_reset()
printf("DEBUG_reset: %08X\n",&DebugStatistics::print); //force a reference to this function
}
static void DEBUG_dumpMemory_fill(EMUFILE *fp, u32 size)
{
static std::vector<u8> buf;
buf.resize(size);
memset(&buf[0],0,size);
fp->fwrite(&buf[0],size);
}
void DEBUG_dumpMemory(EMUFILE* fp)
{
fp->fseek(0x000000,SEEK_SET); fp->fwrite(MMU.MAIN_MEM,0x800000); //arm9 main mem (8192K)
fp->fseek(0x900000,SEEK_SET); fp->fwrite(MMU.ARM9_DTCM,0x4000); //arm9 DTCM (16K)
fp->fseek(0xA00000,SEEK_SET); fp->fwrite(MMU.ARM9_ITCM,0x8000); //arm9 ITCM (32K)
fp->fseek(0xB00000,SEEK_SET); fp->fwrite(MMU.ARM9_LCD,0xA4000); //LCD mem 656K
fp->fseek(0xC00000,SEEK_SET); fp->fwrite(MMU.ARM9_VMEM,0x800); //OAM
fp->fseek(0xD00000,SEEK_SET); fp->fwrite(MMU.ARM7_ERAM,0x10000); //arm7 WRAM (64K)
fp->fseek(0xE00000,SEEK_SET); fp->fwrite(MMU.ARM7_WIRAM,0x10000); //arm7 wifi RAM ?
fp->fseek(0xF00000,SEEK_SET); fp->fwrite(MMU.SWIRAM,0x8000); //arm9/arm7 shared WRAM (32KB)
}
//----------------------------------------------------
std::vector<Logger *> Logger::channels;

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@ -28,6 +28,7 @@
#include "types.h"
#include "mem.h"
#include "emufile.h"
struct DebugStatistics
{
@ -47,6 +48,7 @@ struct DebugStatistics
extern DebugStatistics DEBUG_statistics;
void DEBUG_reset();
void DEBUG_dumpMemory(EMUFILE* fp);
struct armcpu_t;

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@ -3556,6 +3556,23 @@ void SaveWindowPos(HWND hwnd)
}
static void TwiddleLayer(UINT ctlid, int core, int layer)
{
GPU* gpu = core==0?MainScreen.gpu:SubScreen.gpu;
if(CommonSettings.dispLayers[core][layer])
{
GPU_remove(gpu,layer);
MainWindow->checkMenu(ctlid, false);
}
else
{
GPU_addBack(gpu,layer);
MainWindow->checkMenu(ctlid, true);
}
}
//========================================================================================
LRESULT CALLBACK WindowProcedure (HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
{
@ -4766,128 +4783,16 @@ DOKEYDOWN:
WritePrivateProfileInt("Display","SubGpu",CommonSettings.showGpu.sub?1:0,IniName);
return 0;
case IDM_MOBJ:
if(MainScreen.gpu->dispOBJ)
{
GPU_remove(MainScreen.gpu, 4);
MainWindow->checkMenu(IDM_MOBJ, false);
}
else
{
GPU_addBack(MainScreen.gpu, 4);
MainWindow->checkMenu(IDM_MOBJ, true);
}
return 0;
case IDM_MBG0 :
if(MainScreen.gpu->dispBG[0])
{
GPU_remove(MainScreen.gpu, 0);
MainWindow->checkMenu(IDM_MBG0, false);
}
else
{
GPU_addBack(MainScreen.gpu, 0);
MainWindow->checkMenu(IDM_MBG0, true);
}
return 0;
case IDM_MBG1 :
if(MainScreen.gpu->dispBG[1])
{
GPU_remove(MainScreen.gpu, 1);
MainWindow->checkMenu(IDM_MBG1, false);
}
else
{
GPU_addBack(MainScreen.gpu, 1);
MainWindow->checkMenu(IDM_MBG1, true);
}
return 0;
case IDM_MBG2 :
if(MainScreen.gpu->dispBG[2])
{
GPU_remove(MainScreen.gpu, 2);
MainWindow->checkMenu(IDM_MBG2, false);
}
else
{
GPU_addBack(MainScreen.gpu, 2);
MainWindow->checkMenu(IDM_MBG2, true);
}
return 0;
case IDM_MBG3 :
if(MainScreen.gpu->dispBG[3])
{
GPU_remove(MainScreen.gpu, 3);
MainWindow->checkMenu(IDM_MBG3, false);
}
else
{
GPU_addBack(MainScreen.gpu, 3);
MainWindow->checkMenu(IDM_MBG3, true);
}
return 0;
case IDM_SOBJ:
if(SubScreen.gpu->dispOBJ)
{
GPU_remove(SubScreen.gpu, 4);
MainWindow->checkMenu(IDM_SOBJ, false);
}
else
{
GPU_addBack(SubScreen.gpu, 4);
MainWindow->checkMenu(IDM_SOBJ, true);
}
return 0;
case IDM_SBG0 :
if(SubScreen.gpu->dispBG[0])
{
GPU_remove(SubScreen.gpu, 0);
MainWindow->checkMenu(IDM_SBG0, false);
}
else
{
GPU_addBack(SubScreen.gpu, 0);
MainWindow->checkMenu(IDM_SBG0, true);
}
return 0;
case IDM_SBG1 :
if(SubScreen.gpu->dispBG[1])
{
GPU_remove(SubScreen.gpu, 1);
MainWindow->checkMenu(IDM_SBG1, false);
}
else
{
GPU_addBack(SubScreen.gpu, 1);
MainWindow->checkMenu(IDM_SBG1, true);
}
return 0;
case IDM_SBG2 :
if(SubScreen.gpu->dispBG[2])
{
GPU_remove(SubScreen.gpu, 2);
MainWindow->checkMenu(IDM_SBG2, false);
}
else
{
GPU_addBack(SubScreen.gpu, 2);
MainWindow->checkMenu(IDM_SBG2, true);
}
return 0;
case IDM_SBG3 :
if(SubScreen.gpu->dispBG[3])
{
GPU_remove(SubScreen.gpu, 3);
MainWindow->checkMenu(IDM_SBG3, false);
}
else
{
GPU_addBack(SubScreen.gpu, 3);
MainWindow->checkMenu(IDM_SBG3, true);
}
return 0;
case IDM_MBG0: TwiddleLayer(IDM_MBG0,0,0); return 0;
case IDM_MBG1: TwiddleLayer(IDM_MBG1,0,1); return 0;
case IDM_MBG2: TwiddleLayer(IDM_MBG2,0,2); return 0;
case IDM_MBG3: TwiddleLayer(IDM_MBG3,0,3); return 0;
case IDM_MOBJ: TwiddleLayer(IDM_MOBJ,0,4); return 0;
case IDM_SBG0: TwiddleLayer(IDM_SBG0,0,0); return 0;
case IDM_SBG1: TwiddleLayer(IDM_SBG1,0,1); return 0;
case IDM_SBG2: TwiddleLayer(IDM_SBG2,0,2); return 0;
case IDM_SBG3: TwiddleLayer(IDM_SBG3,0,3); return 0;
case IDM_SOBJ: TwiddleLayer(IDM_SOBJ,0,4); return 0;
case IDM_PAUSE:
TogglePause();

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@ -279,6 +279,7 @@ INT_PTR CALLBACK MemView_DlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lPa
}
return 1;
case IDC_DUMPALL:
case IDC_RAWDUMP:
{
char fileName[256] = "";
@ -296,16 +297,19 @@ INT_PTR CALLBACK MemView_DlgProc(HWND hDlg, UINT uMsg, WPARAM wParam, LPARAM lPa
if(GetSaveFileName(&ofn))
{
FILE *f;
u8 memory[0x100];
MMU_DumpMemBlock(wnd->cpu, wnd->address, 0x100, memory);
f = fopen(fileName, "ab");
fwrite(memory, 0x100, 1, f);
fclose(f);
if(LOWORD(wParam) == IDC_RAWDUMP)
{
EMUFILE_FILE f(fileName,"ab");
u8 memory[0x100];
MMU_DumpMemBlock(wnd->cpu, wnd->address, 0x100, memory);
f.fwrite(memory, 0x100);
}
else
{
EMUFILE_FILE f(fileName,"wb");
DEBUG_dumpMemory(&f);
}
}
}
return 1;

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@ -336,6 +336,7 @@
#define IDC_SYNCHMODE_SYNCH 1013
#define IDC_FIRMWAREBROWSE 1014
#define IDC_VOLUME 1014
#define IDC_DUMPALL 1014
#define IDC_SYNCHMETHOD_N 1015
#define IDC_FIRMWAREBOOT 1016
#define IDC_SYNCHMETHOD_Z 1016

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