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fix booting from firmware since I broke it adding the new slot-1 timing (failed to support it on arm7). fixes #64 (broken by 281268e)

This commit is contained in:
zeromus 2017-05-02 17:59:33 -05:00
parent 09ffe3545e
commit e0945c362b
3 changed files with 8 additions and 6 deletions
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2
desmume/src/MMU.cpp
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@ -1358,7 +1358,7 @@ void FASTCALL MMU_writeToGCControl(u32 val)
// Launch DMA if start flag was set to "DS Cart"
//triggerDma(EDMAMode_Card);
NDS_RescheduleReadSlot1(blocksize);
NDS_RescheduleReadSlot1(PROCNUM, blocksize);
}
/*template<int PROCNUM>

10
desmume/src/NDSSystem.cpp
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@ -1101,10 +1101,11 @@ struct TSequenceItem_ReadSlot1 : public TSequenceItem
void exec()
{
u32 procnum = param;
enabled = false;
u32 val = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4);
u32 val = T1ReadLong(MMU.MMU_MEM[procnum][0x40], 0x1A4);
val |= 0x00800000;
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4, val);
T1WriteLong(MMU.MMU_MEM[procnum][0x40], 0x1A4, val);
triggerDma(EDMAMode_Card);
}
@ -1252,9 +1253,9 @@ void NDS_RescheduleTimers()
NDS_Reschedule();
}
void NDS_RescheduleReadSlot1(int size)
void NDS_RescheduleReadSlot1(int procnum, int size)
{
u32 gcromctrl = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4);
u32 gcromctrl = T1ReadLong(MMU.MMU_MEM[procnum][0x40], 0x1A4);
u32 clocks = (gcromctrl & (1<<27)) ? 8 : 5;
u32 gap = gcromctrl & 0x1FFF;
@ -1268,6 +1269,7 @@ void NDS_RescheduleReadSlot1(int size)
//timings are basically 33mhz but internal tracking is 66mhz
delay *= 2;
sequencer.readslot1.param = procnum;
sequencer.readslot1.timestamp = nds_timer + delay;
sequencer.readslot1.enabled = true;

2
desmume/src/NDSSystem.h
View File

@ -149,7 +149,7 @@ extern u64 nds_timer;
void NDS_Reschedule();
void NDS_RescheduleGXFIFO(u32 cost);
void NDS_RescheduleDMA();
void NDS_RescheduleReadSlot1(int size);
void NDS_RescheduleReadSlot1(int procnum, int size);
void NDS_RescheduleTimers();
enum ENSATA_HANDSHAKE