fix linux build
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7a28e26a98
commit
d9fd89c4f8
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@ -269,6 +269,7 @@ static u32 bb_constant_cycles;
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#define reg_pos_thumb(x) dword_ptr(bb_cpu, offsetof(armcpu_t, R) + 4*((i>>(x))&0x7))
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#define reg_pos_thumbB(x) byte_ptr(bb_cpu, offsetof(armcpu_t, R) + 4*((i>>(x))&0x7))
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#define cp15_ptr(x) dword_ptr(bb_cp15, offsetof(armcp15_t, x))
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#define cp15_ptr_off(x, y) dword_ptr(bb_cp15, offsetof(armcp15_t, x) + y)
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#define mmu_ptr(x) dword_ptr(bb_mmu, offsetof(MMU_struct, x))
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#define mmu_ptr_byte(x) byte_ptr(bb_mmu, offsetof(MMU_struct, x))
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#define _REG_NUM(i, n) ((i>>(n))&0x7)
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@ -2615,7 +2616,7 @@ static int OP_MCR(const u32 i)
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if (CRm < 8)
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{
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//protectBaseSize[CRm] = val;
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c.mov(cp15_ptr(protectBaseSize[CRm]), data);
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c.mov(cp15_ptr_off(protectBaseSize, (CRm * sizeof(u32))), data);
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_maskPrecalc(CRm);
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break;
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}
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@ -2821,7 +2822,7 @@ static int OP_MRC(const u32 i)
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if (CRm < 8)
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{
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// *R = protectBaseSize[CRm];
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c.mov(data, cp15_ptr(protectBaseSize[CRm]));
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c.mov(data, cp15_ptr_off(protectBaseSize, (CRm * sizeof(u32))));
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break;
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}
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}
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