parent
d0a6539d3b
commit
d40eab9ef2
7446
desmume/src/MMU.cpp
7446
desmume/src/MMU.cpp
File diff suppressed because it is too large
Load Diff
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@ -158,43 +158,16 @@ void MMU_unsetRom( void);
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void print_memory_profiling( void);
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/**
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* Memory reading
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*/
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// Memory reading/writing (old)
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u8 FASTCALL MMU_read8(u32 proc, u32 adr);
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u16 FASTCALL MMU_read16(u32 proc, u32 adr);
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u32 FASTCALL MMU_read32(u32 proc, u32 adr);
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#ifdef MMU_ENABLE_ACL
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u8 FASTCALL MMU_read8_acl(u32 proc, u32 adr, u32 access);
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u16 FASTCALL MMU_read16_acl(u32 proc, u32 adr, u32 access);
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u32 FASTCALL MMU_read32_acl(u32 proc, u32 adr, u32 access);
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#else
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#define MMU_read8_acl(proc,adr,access) MMU_read8(proc,adr)
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#define MMU_read16_acl(proc,adr,access) MMU_read16(proc,adr)
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#define MMU_read32_acl(proc,adr,access) MMU_read32(proc,adr)
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#endif
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/**
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* Memory writing
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*/
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void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val);
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void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val);
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void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val);
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#ifdef MMU_ENABLE_ACL
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void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val);
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void FASTCALL MMU_write16_acl(u32 proc, u32 adr, u16 val);
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void FASTCALL MMU_write32_acl(u32 proc, u32 adr, u32 val);
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#else
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#define MMU_write8_acl MMU_write8
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#define MMU_write16_acl MMU_write16
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#define MMU_write32_acl MMU_write32
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#endif
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void FASTCALL MMU_doDMA(u32 proc, u32 num);
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/*
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* The base ARM memory interfaces
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*/
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@ -204,4 +177,46 @@ extern struct armcpu_memory_iface arm9_direct_memory_iface;
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extern u8 *MMU_RenderMapToLCD(u32 vram_addr);
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extern u8 (*_MMU_read08[2])(u32 addr);
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extern u16 (*_MMU_read16[2])(u32 addr);
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extern u32 (*_MMU_read32[2])(u32 addr);
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extern void (*_MMU_write08[2])(u32 addr, u8 val);
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extern void (*_MMU_write16[2])(u32 addr, u16 val);
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extern void (*_MMU_write32[2])(u32 addr, u32 val);
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#ifdef MMU_ENABLE_ACL
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void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val);
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void FASTCALL MMU_write16_acl(u32 proc, u32 adr, u16 val);
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void FASTCALL MMU_write32_acl(u32 proc, u32 adr, u32 val);
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u8 FASTCALL MMU_read8_acl(u32 proc, u32 adr, u32 access);
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u16 FASTCALL MMU_read16_acl(u32 proc, u32 adr, u32 access);
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u32 FASTCALL MMU_read32_acl(u32 proc, u32 adr, u32 access);
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#else
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#define MMU_write8_acl(proc, adr, val) _MMU_write08[proc](adr, val)
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#define MMU_write16_acl(proc, adr, val) _MMU_write16[proc](adr, val)
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#define MMU_write32_acl(proc, adr, val) _MMU_write32[proc][proc](adr, val)
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#define MMU_read8_acl(proc,adr,access) _MMU_read08[proc](adr)
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#define MMU_read16_acl(proc,adr,access) _MMU_read16[proc](adr)
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#define MMU_read32_acl(proc,adr,access) _MMU_read32[proc](adr)
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#endif
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// Use this macros for reading/writing, so the GDB stub isn't broken
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#ifdef GDB_STUB
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#define READ32(a,b) cpu->mem_if->read32(a,b & 0xFFFFFFFC)
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#define WRITE32(a,b,c) cpu->mem_if->write32(a,b & 0xFFFFFFFC,c)
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#define READ16(a,b) cpu->mem_if->read16(a,b & 0xFFFFFFFE)
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#define WRITE16(a,b,c) cpu->mem_if->write16(a,b & 0xFFFFFFFE,c)
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#define READ8(a,b) cpu->mem_if->read8(a,b)
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#define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c)
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#else
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#define READ32(a,b) _MMU_read32[PROCNUM](b & 0xFFFFFFFC)
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#define WRITE32(a,b,c) _MMU_write32[PROCNUM](b & 0xFFFFFFFC,c)
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#define READ16(a,b) _MMU_read16[PROCNUM](b & 0xFFFFFFFE)
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#define WRITE16(a,b,c) _MMU_write16[PROCNUM](b & 0xFFFFFFFE,c)
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#define READ8(a,b) _MMU_read08[PROCNUM](b)
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#define WRITE8(a,b,c) _MMU_write08[PROCNUM](b, c)
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#endif
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#endif
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@ -315,7 +315,7 @@ enum
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ROM_DSGBA
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};
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#if 0 /* not used */
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#if 0 /* not used */
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//http://www.aggregate.org/MAGIC/#Population%20Count%20(Ones%20Count)
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static u32 ones32(u32 x)
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{
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@ -330,7 +330,7 @@ static u32 ones32(u32 x)
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x += (x >> 16);
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return(x & 0x0000003f);
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}
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#endif
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#endif
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int NDS_LoadROM( const char *filename, int bmtype, u32 bmsize,
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const char *cflash_disk_image_file)
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@ -487,7 +487,7 @@ void NDS_Reset( void)
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for(i = 0; i < (header->ARM9binSize>>2); ++i)
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{
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MMU_write32(0, dst, T1ReadLong(MMU.CART_ROM, src));
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_MMU_write32[ARMCPU_ARM9](dst, T1ReadLong(MMU.CART_ROM, src));
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dst += 4;
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src += 4;
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}
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@ -497,7 +497,7 @@ void NDS_Reset( void)
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for(i = 0; i < (header->ARM7binSize>>2); ++i)
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{
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MMU_write32(1, dst, T1ReadLong(MMU.CART_ROM, src));
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_MMU_write32[ARMCPU_ARM7](dst, T1ReadLong(MMU.CART_ROM, src));
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dst += 4;
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src += 4;
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}
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@ -517,9 +517,9 @@ void NDS_Reset( void)
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nds.touchX = nds.touchY = 0;
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nds.isTouch = 0;
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MMU_write16(0, 0x04000130, 0x3FF);
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MMU_write16(1, 0x04000130, 0x3FF);
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MMU_write8(1, 0x04000136, 0x43);
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_MMU_write16[ARMCPU_ARM9](0x04000130, 0x3FF);
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_MMU_write16[ARMCPU_ARM7](0x04000130, 0x3FF);
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_MMU_write08[ARMCPU_ARM7](0x04000136, 0x43);
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LidClosed = FALSE;
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LidKeyCount = 0;
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@ -534,19 +534,19 @@ void NDS_Reset( void)
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if ( copy_firmware_user_data( temp_buffer, MMU.fw.data)) {
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for ( fw_index = 0; fw_index < NDS_FW_USER_SETTINGS_MEM_BYTE_COUNT; fw_index++)
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MMU_write8( 0, 0x027FFC80 + fw_index, temp_buffer[fw_index]);
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_MMU_write08[ARMCPU_ARM9](0x027FFC80 + fw_index, temp_buffer[fw_index]);
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}
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}
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// Copy the whole header to Main RAM 0x27FFE00 on startup.
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// Reference: http://nocash.emubase.de/gbatek.htm#dscartridgeheader
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for (i = 0; i < ((0x170+0x90)/4); i++) {
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MMU_write32 (0, 0x027FFE00+i*4, LE_TO_LOCAL_32(((u32*)MMU.CART_ROM)[i]));
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_MMU_write32[ARMCPU_ARM9](0x027FFE00+i*4, LE_TO_LOCAL_32(((u32*)MMU.CART_ROM)[i]));
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}
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MainScreen.offset = 0;
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SubScreen.offset = 192;
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//MMU_write32(0, 0x02007FFC, 0xE92D4030);
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//_MMU_write32[ARMCPU_ARM9](0x02007FFC, 0xE92D4030);
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FILE* inf = 0;
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@ -558,15 +558,15 @@ void NDS_Reset( void)
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NDS_ARM7.swi_tab = 0;
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} else {
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NDS_ARM7.swi_tab = ARM7_swi_tab;
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MMU_write32(1, 0x00, 0xE25EF002);
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MMU_write32(1, 0x04, 0xEAFFFFFE);
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MMU_write32(1, 0x18, 0xEA000000);
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MMU_write32(1, 0x20, 0xE92D500F);
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MMU_write32(1, 0x24, 0xE3A00301);
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MMU_write32(1, 0x28, 0xE28FE000);
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MMU_write32(1, 0x2C, 0xE510F004);
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MMU_write32(1, 0x30, 0xE8BD500F);
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MMU_write32(1, 0x34, 0xE25EF004);
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_MMU_write32[ARMCPU_ARM7](0x00, 0xE25EF002);
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_MMU_write32[ARMCPU_ARM7](0x04, 0xEAFFFFFE);
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_MMU_write32[ARMCPU_ARM7](0x18, 0xEA000000);
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_MMU_write32[ARMCPU_ARM7](0x20, 0xE92D500F);
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_MMU_write32[ARMCPU_ARM7](0x24, 0xE3A00301);
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_MMU_write32[ARMCPU_ARM7](0x28, 0xE28FE000);
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_MMU_write32[ARMCPU_ARM7](0x2C, 0xE510F004);
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_MMU_write32[ARMCPU_ARM7](0x30, 0xE8BD500F);
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_MMU_write32[ARMCPU_ARM7](0x34, 0xE25EF004);
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}
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//ARM9 BIOS IRQ HANDLER
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NDS_ARM9.swi_tab = 0;
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} else {
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NDS_ARM9.swi_tab = ARM9_swi_tab;
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MMU_write32(0, 0xFFFF0018, 0xEA000000);
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MMU_write32(0, 0xFFFF0020, 0xE92D500F);
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MMU_write32(0, 0xFFFF0024, 0xEE190F11);
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MMU_write32(0, 0xFFFF0028, 0xE1A00620);
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MMU_write32(0, 0xFFFF002C, 0xE1A00600);
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MMU_write32(0, 0xFFFF0030, 0xE2800C40);
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MMU_write32(0, 0xFFFF0034, 0xE28FE000);
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MMU_write32(0, 0xFFFF0038, 0xE510F004);
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MMU_write32(0, 0xFFFF003C, 0xE8BD500F);
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MMU_write32(0, 0xFFFF0040, 0xE25EF004);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0018, 0xEA000000);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0020, 0xE92D500F);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0024, 0xEE190F11);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0028, 0xE1A00620);
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_MMU_write32[ARMCPU_ARM9](0xFFFF002C, 0xE1A00600);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0030, 0xE2800C40);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0034, 0xE28FE000);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0038, 0xE510F004);
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_MMU_write32[ARMCPU_ARM9](0xFFFF003C, 0xE8BD500F);
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_MMU_write32[ARMCPU_ARM9](0xFFFF0040, 0xE25EF004);
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}
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MMU_write32(0, 0x0000004, 0xE3A0010E);
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MMU_write32(0, 0x0000008, 0xE3A01020);
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// MMU_write32(0, 0x000000C, 0xE1B02110);
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MMU_write32(0, 0x000000C, 0xE1B02040);
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MMU_write32(0, 0x0000010, 0xE3B02020);
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// MMU_write32(0, 0x0000010, 0xE2100202);
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_MMU_write32[ARMCPU_ARM9](0x0000004, 0xE3A0010E);
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_MMU_write32[ARMCPU_ARM9](0x0000008, 0xE3A01020);
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// _MMU_write32[ARMCPU_ARM9](0x000000C, 0xE1B02110);
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_MMU_write32[ARMCPU_ARM9](0x000000C, 0xE1B02040);
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_MMU_write32[ARMCPU_ARM9](0x0000010, 0xE3B02020);
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// _MMU_write32[ARMCPU_ARM9](0x0000010, 0xE2100202);
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delete header;
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@ -38,25 +38,6 @@
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extern volatile BOOL execute;
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// Use this macros for reading/writing, so the GDB stub isn't broken
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#ifdef GDB_STUB
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#define READ32(a,b) cpu->mem_if->read32(a,(b) & 0xFFFFFFFC)
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#define WRITE32(a,b,c) cpu->mem_if->write32(a,(b) & 0xFFFFFFFC,c)
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#define READ16(a,b) cpu->mem_if->read16(a,(b) & 0xFFFFFFFE)
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#define WRITE16(a,b,c) cpu->mem_if->write16(a,(b) & 0xFFFFFFFE,c)
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#define READ8(a,b) cpu->mem_if->read8(a,b)
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#define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c)
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#else
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#define READ32(a,b) MMU_read32(PROCNUM,(b) & 0xFFFFFFFC)
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#define WRITE32(a,b,c) MMU_write32(PROCNUM,(b) & 0xFFFFFFFC,c)
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#define READ16(a,b) MMU_read16(PROCNUM,(b) & 0xFFFFFFFE)
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#define WRITE16(a,b,c) MMU_write16(PROCNUM,(b) & 0xFFFFFFFE,c)
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#define READ8(a,b) MMU_read8(PROCNUM, b)
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#define WRITE8(a,b,c) MMU_write8(PROCNUM,b,c)
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#endif
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#define LSL_IMM shift_op = cpu->R[REG_POS(i,0)]<<((i>>7)&0x1F);
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#define S_LSL_IMM u32 shift_op = ((i>>7)&0x1F);\
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@ -219,7 +219,7 @@ static u32 intrWaitARM(armcpu_t * cpu)
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} else {
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intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
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}
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intr = MMU_read32(cpu->proc_ID, intrFlagAdr);
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intr = _MMU_read32[cpu->proc_ID]( intrFlagAdr);
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intrFlag = cpu->R[1] & intr;
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if(intrFlag)
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@ -227,7 +227,7 @@ static u32 intrWaitARM(armcpu_t * cpu)
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// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
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// on efface son(les) occurence(s).
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intr ^= intrFlag;
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MMU_write32(cpu->proc_ID, intrFlagAdr, intr);
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_MMU_write32[cpu->proc_ID]( intrFlagAdr, intr);
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//cpu->switchMode(oldmode[cpu->proc_ID]);
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return 1;
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}
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@ -253,7 +253,7 @@ static u32 waitVBlankARM(armcpu_t * cpu)
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} else {
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intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
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}
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intr = MMU_read32(cpu->proc_ID, intrFlagAdr);
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intr = _MMU_read32[cpu->proc_ID]( intrFlagAdr);
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intrFlag = 1 & intr;
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if(intrFlag)
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@ -261,7 +261,7 @@ static u32 waitVBlankARM(armcpu_t * cpu)
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// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
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// on efface son(les) occurence(s).
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intr ^= intrFlag;
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MMU_write32(cpu->proc_ID, intrFlagAdr, intr);
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_MMU_write32[cpu->proc_ID]( intrFlagAdr, intr);
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//cpu->switchMode(oldmode[cpu->proc_ID]);
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return 1;
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}
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@ -329,7 +329,7 @@ static u32 copy(armcpu_t* cpu)
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cnt &= 0x1FFFFF;
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while(cnt)
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{
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MMU_write16(cpu->proc_ID, dst, MMU_read16(cpu->proc_ID, src));
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_MMU_write16[cpu->proc_ID]( dst, _MMU_read16[cpu->proc_ID]( src));
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cnt--;
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dst+=2;
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src+=2;
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@ -337,11 +337,11 @@ static u32 copy(armcpu_t* cpu)
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break;
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case 1:
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{
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u32 val = MMU_read16(cpu->proc_ID, src);
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u32 val = _MMU_read16[cpu->proc_ID]( src);
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cnt &= 0x1FFFFF;
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while(cnt)
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{
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MMU_write16(cpu->proc_ID, dst, val);
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_MMU_write16[cpu->proc_ID]( dst, val);
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cnt--;
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dst+=2;
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}
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@ -358,7 +358,7 @@ static u32 copy(armcpu_t* cpu)
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cnt &= 0x1FFFFF;
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while(cnt)
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{
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MMU_write32(cpu->proc_ID, dst, MMU_read32(cpu->proc_ID, src));
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_MMU_write32[cpu->proc_ID]( dst, _MMU_read32[cpu->proc_ID]( src));
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cnt--;
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dst+=4;
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src+=4;
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@ -366,11 +366,11 @@ static u32 copy(armcpu_t* cpu)
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break;
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case 1:
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{
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u32 val = MMU_read32(cpu->proc_ID, src);
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u32 val = _MMU_read32[cpu->proc_ID]( src);
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cnt &= 0x1FFFFF;
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while(cnt)
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{
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MMU_write32(cpu->proc_ID, dst, val);
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_MMU_write32[cpu->proc_ID]( dst, val);
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cnt--;
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dst+=4;
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}
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@ -394,7 +394,7 @@ static u32 fastCopy(armcpu_t* cpu)
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cnt &= 0x1FFFFF;
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while(cnt)
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{
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MMU_write32(cpu->proc_ID, dst, MMU_read32(cpu->proc_ID, src));
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_MMU_write32[cpu->proc_ID]( dst, _MMU_read32[cpu->proc_ID]( src));
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cnt--;
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dst+=4;
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src+=4;
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||||
|
@ -402,11 +402,11 @@ static u32 fastCopy(armcpu_t* cpu)
|
|||
break;
|
||||
case 1:
|
||||
{
|
||||
u32 val = MMU_read32(cpu->proc_ID, src);
|
||||
u32 val = _MMU_read32[cpu->proc_ID]( src);
|
||||
cnt &= 0x1FFFFF;
|
||||
while(cnt)
|
||||
{
|
||||
MMU_write32(cpu->proc_ID, dst, val);
|
||||
_MMU_write32[cpu->proc_ID]( dst, val);
|
||||
cnt--;
|
||||
dst+=4;
|
||||
}
|
||||
|
@ -425,7 +425,7 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
|
|||
int len;
|
||||
u32 source = cpu->R[0];
|
||||
u32 dest = cpu->R[1];
|
||||
u32 header = MMU_read32(cpu->proc_ID, source);
|
||||
u32 header = _MMU_read32[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -439,7 +439,7 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
|
|||
len = header >> 8;
|
||||
|
||||
while(len > 0) {
|
||||
u8 d = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 d = _MMU_read08[cpu->proc_ID]( source++);
|
||||
|
||||
if(d) {
|
||||
for(i1 = 0; i1 < 8; i1++) {
|
||||
|
@ -447,18 +447,18 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
|
|||
int length;
|
||||
int offset;
|
||||
u32 windowOffset;
|
||||
u16 data = MMU_read8(cpu->proc_ID, source++) << 8;
|
||||
data |= MMU_read8(cpu->proc_ID, source++);
|
||||
u16 data = _MMU_read08[cpu->proc_ID]( source++) << 8;
|
||||
data |= _MMU_read08[cpu->proc_ID]( source++);
|
||||
length = (data >> 12) + 3;
|
||||
offset = (data & 0x0FFF);
|
||||
windowOffset = dest + byteCount - offset - 1;
|
||||
for(i2 = 0; i2 < length; i2++) {
|
||||
writeValue |= (MMU_read8(cpu->proc_ID, windowOffset++) << byteShift);
|
||||
writeValue |= (_MMU_read08[cpu->proc_ID]( windowOffset++) << byteShift);
|
||||
byteShift += 8;
|
||||
byteCount++;
|
||||
|
||||
if(byteCount == 2) {
|
||||
MMU_write16(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write16[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 2;
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
|
@ -469,11 +469,11 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
|
|||
return 0;
|
||||
}
|
||||
} else {
|
||||
writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
|
||||
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift);
|
||||
byteShift += 8;
|
||||
byteCount++;
|
||||
if(byteCount == 2) {
|
||||
MMU_write16(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write16[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 2;
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
|
@ -487,11 +487,11 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
|
|||
}
|
||||
} else {
|
||||
for(i1 = 0; i1 < 8; i1++) {
|
||||
writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
|
||||
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift);
|
||||
byteShift += 8;
|
||||
byteCount++;
|
||||
if(byteCount == 2) {
|
||||
MMU_write16(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write16[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 2;
|
||||
byteShift = 0;
|
||||
byteCount = 0;
|
||||
|
@ -513,7 +513,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
|
|||
u32 source = cpu->R[0];
|
||||
u32 dest = cpu->R[1];
|
||||
|
||||
u32 header = MMU_read32(cpu->proc_ID, source);
|
||||
u32 header = _MMU_read32[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -523,7 +523,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
|
|||
len = header >> 8;
|
||||
|
||||
while(len > 0) {
|
||||
u8 d = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 d = _MMU_read08[cpu->proc_ID]( source++);
|
||||
|
||||
if(d) {
|
||||
for(i1 = 0; i1 < 8; i1++) {
|
||||
|
@ -531,19 +531,19 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
|
|||
int length;
|
||||
int offset;
|
||||
u32 windowOffset;
|
||||
u16 data = MMU_read8(cpu->proc_ID, source++) << 8;
|
||||
data |= MMU_read8(cpu->proc_ID, source++);
|
||||
u16 data = _MMU_read08[cpu->proc_ID]( source++) << 8;
|
||||
data |= _MMU_read08[cpu->proc_ID]( source++);
|
||||
length = (data >> 12) + 3;
|
||||
offset = (data & 0x0FFF);
|
||||
windowOffset = dest - offset - 1;
|
||||
for(i2 = 0; i2 < length; i2++) {
|
||||
MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, windowOffset++));
|
||||
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( windowOffset++));
|
||||
len--;
|
||||
if(len == 0)
|
||||
return 0;
|
||||
}
|
||||
} else {
|
||||
MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
|
||||
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++));
|
||||
len--;
|
||||
if(len == 0)
|
||||
return 0;
|
||||
|
@ -552,7 +552,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
|
|||
}
|
||||
} else {
|
||||
for(i1 = 0; i1 < 8; i1++) {
|
||||
MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
|
||||
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++));
|
||||
len--;
|
||||
if(len == 0)
|
||||
return 0;
|
||||
|
@ -572,7 +572,7 @@ static u32 RLUnCompVram(armcpu_t* cpu)
|
|||
u32 source = cpu->R[0];
|
||||
u32 dest = cpu->R[1];
|
||||
|
||||
u32 header = MMU_read32(cpu->proc_ID, source);
|
||||
u32 header = _MMU_read32[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -585,10 +585,10 @@ static u32 RLUnCompVram(armcpu_t* cpu)
|
|||
writeValue = 0;
|
||||
|
||||
while(len > 0) {
|
||||
u8 d = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 d = _MMU_read08[cpu->proc_ID]( source++);
|
||||
int l = d & 0x7F;
|
||||
if(d & 0x80) {
|
||||
u8 data = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 data = _MMU_read08[cpu->proc_ID]( source++);
|
||||
l += 3;
|
||||
for(i = 0;i < l; i++) {
|
||||
writeValue |= (data << byteShift);
|
||||
|
@ -596,7 +596,7 @@ static u32 RLUnCompVram(armcpu_t* cpu)
|
|||
byteCount++;
|
||||
|
||||
if(byteCount == 2) {
|
||||
MMU_write16(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write16[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 2;
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
|
@ -609,11 +609,11 @@ static u32 RLUnCompVram(armcpu_t* cpu)
|
|||
} else {
|
||||
l++;
|
||||
for(i = 0; i < l; i++) {
|
||||
writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
|
||||
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift);
|
||||
byteShift += 8;
|
||||
byteCount++;
|
||||
if(byteCount == 2) {
|
||||
MMU_write16(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write16[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 2;
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
|
@ -635,7 +635,7 @@ static u32 RLUnCompWram(armcpu_t* cpu)
|
|||
u32 source = cpu->R[0];
|
||||
u32 dest = cpu->R[1];
|
||||
|
||||
u32 header = MMU_read32(cpu->proc_ID, source);
|
||||
u32 header = _MMU_read32[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -645,13 +645,13 @@ static u32 RLUnCompWram(armcpu_t* cpu)
|
|||
len = header >> 8;
|
||||
|
||||
while(len > 0) {
|
||||
u8 d = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 d = _MMU_read08[cpu->proc_ID]( source++);
|
||||
int l = d & 0x7F;
|
||||
if(d & 0x80) {
|
||||
u8 data = MMU_read8(cpu->proc_ID, source++);
|
||||
u8 data = _MMU_read08[cpu->proc_ID]( source++);
|
||||
l += 3;
|
||||
for(i = 0;i < l; i++) {
|
||||
MMU_write8(cpu->proc_ID, dest++, data);
|
||||
_MMU_write08[cpu->proc_ID]( dest++, data);
|
||||
len--;
|
||||
if(len == 0)
|
||||
return 0;
|
||||
|
@ -659,7 +659,7 @@ static u32 RLUnCompWram(armcpu_t* cpu)
|
|||
} else {
|
||||
l++;
|
||||
for(i = 0; i < l; i++) {
|
||||
MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
|
||||
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++));
|
||||
len--;
|
||||
if(len == 0)
|
||||
return 0;
|
||||
|
@ -680,14 +680,14 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
source = cpu->R[0];
|
||||
dest = cpu->R[1];
|
||||
|
||||
header = MMU_read8(cpu->proc_ID, source);
|
||||
header = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0)
|
||||
return 0;
|
||||
|
||||
treeSize = MMU_read8(cpu->proc_ID, source++);
|
||||
treeSize = _MMU_read08[cpu->proc_ID]( source++);
|
||||
|
||||
treeStart = source;
|
||||
|
||||
|
@ -696,11 +696,11 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
len = header >> 8;
|
||||
|
||||
mask = 0x80000000;
|
||||
data = MMU_read8(cpu->proc_ID, source);
|
||||
data = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
pos = 0;
|
||||
rootNode = MMU_read8(cpu->proc_ID, treeStart);
|
||||
rootNode = _MMU_read08[cpu->proc_ID]( treeStart);
|
||||
currentNode = rootNode;
|
||||
writeData = 0;
|
||||
byteShift = 0;
|
||||
|
@ -719,12 +719,12 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
// right
|
||||
if(currentNode & 0x40)
|
||||
writeData = 1;
|
||||
currentNode = MMU_read8(cpu->proc_ID, treeStart+pos+1);
|
||||
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos+1);
|
||||
} else {
|
||||
// left
|
||||
if(currentNode & 0x80)
|
||||
writeData = 1;
|
||||
currentNode = MMU_read8(cpu->proc_ID, treeStart+pos);
|
||||
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos);
|
||||
}
|
||||
|
||||
if(writeData) {
|
||||
|
@ -739,7 +739,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
if(byteCount == 4) {
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
MMU_write8(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write08[cpu->proc_ID]( dest, writeValue);
|
||||
writeValue = 0;
|
||||
dest += 4;
|
||||
len -= 4;
|
||||
|
@ -748,7 +748,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
mask >>= 1;
|
||||
if(mask == 0) {
|
||||
mask = 0x80000000;
|
||||
data = MMU_read8(cpu->proc_ID, source);
|
||||
data = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
}
|
||||
}
|
||||
|
@ -766,12 +766,12 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
// right
|
||||
if(currentNode & 0x40)
|
||||
writeData = 1;
|
||||
currentNode = MMU_read8(cpu->proc_ID, treeStart+pos+1);
|
||||
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos+1);
|
||||
} else {
|
||||
// left
|
||||
if(currentNode & 0x80)
|
||||
writeData = 1;
|
||||
currentNode = MMU_read8(cpu->proc_ID, treeStart+pos);
|
||||
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos);
|
||||
}
|
||||
|
||||
if(writeData) {
|
||||
|
@ -792,7 +792,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
if(byteCount == 4) {
|
||||
byteCount = 0;
|
||||
byteShift = 0;
|
||||
MMU_write8(cpu->proc_ID, dest, writeValue);
|
||||
_MMU_write08[cpu->proc_ID]( dest, writeValue);
|
||||
dest += 4;
|
||||
writeValue = 0;
|
||||
len -= 4;
|
||||
|
@ -805,7 +805,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
|
|||
mask >>= 1;
|
||||
if(mask == 0) {
|
||||
mask = 0x80000000;
|
||||
data = MMU_read8(cpu->proc_ID, source);
|
||||
data = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
}
|
||||
}
|
||||
|
@ -823,15 +823,15 @@ static u32 BitUnPack(armcpu_t* cpu)
|
|||
dest = cpu->R[1];
|
||||
header = cpu->R[2];
|
||||
|
||||
len = MMU_read16(cpu->proc_ID, header);
|
||||
len = _MMU_read16[cpu->proc_ID]( header);
|
||||
// check address
|
||||
bits = MMU_read8(cpu->proc_ID, header+2);
|
||||
bits = _MMU_read08[cpu->proc_ID]( header+2);
|
||||
revbits = 8 - bits;
|
||||
// u32 value = 0;
|
||||
base = MMU_read8(cpu->proc_ID, header+4);
|
||||
base = _MMU_read08[cpu->proc_ID]( header+4);
|
||||
addBase = (base & 0x80000000) ? 1 : 0;
|
||||
base &= 0x7fffffff;
|
||||
dataSize = MMU_read8(cpu->proc_ID, header+3);
|
||||
dataSize = _MMU_read08[cpu->proc_ID]( header+3);
|
||||
|
||||
data = 0;
|
||||
bitwritecount = 0;
|
||||
|
@ -840,7 +840,7 @@ static u32 BitUnPack(armcpu_t* cpu)
|
|||
if(len < 0)
|
||||
break;
|
||||
mask = 0xff >> revbits;
|
||||
b = MMU_read8(cpu->proc_ID, source);
|
||||
b = _MMU_read08[cpu->proc_ID]( source);
|
||||
source++;
|
||||
bitcount = 0;
|
||||
while(1) {
|
||||
|
@ -854,7 +854,7 @@ static u32 BitUnPack(armcpu_t* cpu)
|
|||
data |= temp << bitwritecount;
|
||||
bitwritecount += dataSize;
|
||||
if(bitwritecount >= 32) {
|
||||
MMU_write8(cpu->proc_ID, dest, data);
|
||||
_MMU_write08[cpu->proc_ID]( dest, data);
|
||||
dest += 4;
|
||||
data = 0;
|
||||
bitwritecount = 0;
|
||||
|
@ -875,7 +875,7 @@ static u32 Diff8bitUnFilterWram(armcpu_t* cpu)
|
|||
source = cpu->R[0];
|
||||
dest = cpu->R[1];
|
||||
|
||||
header = MMU_read8(cpu->proc_ID, source);
|
||||
header = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -884,14 +884,14 @@ static u32 Diff8bitUnFilterWram(armcpu_t* cpu)
|
|||
|
||||
len = header >> 8;
|
||||
|
||||
data = MMU_read8(cpu->proc_ID, source++);
|
||||
MMU_write8(cpu->proc_ID, dest++, data);
|
||||
data = _MMU_read08[cpu->proc_ID]( source++);
|
||||
_MMU_write08[cpu->proc_ID]( dest++, data);
|
||||
len--;
|
||||
|
||||
while(len > 0) {
|
||||
diff = MMU_read8(cpu->proc_ID, source++);
|
||||
diff = _MMU_read08[cpu->proc_ID]( source++);
|
||||
data += diff;
|
||||
MMU_write8(cpu->proc_ID, dest++, data);
|
||||
_MMU_write08[cpu->proc_ID]( dest++, data);
|
||||
len--;
|
||||
}
|
||||
return 1;
|
||||
|
@ -906,7 +906,7 @@ static u32 Diff16bitUnFilter(armcpu_t* cpu)
|
|||
source = cpu->R[0];
|
||||
dest = cpu->R[1];
|
||||
|
||||
header = MMU_read8(cpu->proc_ID, source);
|
||||
header = _MMU_read08[cpu->proc_ID]( source);
|
||||
source += 4;
|
||||
|
||||
if(((source & 0xe000000) == 0) ||
|
||||
|
@ -915,17 +915,17 @@ static u32 Diff16bitUnFilter(armcpu_t* cpu)
|
|||
|
||||
len = header >> 8;
|
||||
|
||||
data = MMU_read16(cpu->proc_ID, source);
|
||||
data = _MMU_read16[cpu->proc_ID]( source);
|
||||
source += 2;
|
||||
MMU_write16(cpu->proc_ID, dest, data);
|
||||
_MMU_write16[cpu->proc_ID]( dest, data);
|
||||
dest += 2;
|
||||
len -= 2;
|
||||
|
||||
while(len >= 2) {
|
||||
u16 diff = MMU_read16(cpu->proc_ID, source);
|
||||
u16 diff = _MMU_read16[cpu->proc_ID]( source);
|
||||
source += 2;
|
||||
data += diff;
|
||||
MMU_write16(cpu->proc_ID, dest, data);
|
||||
_MMU_write16[cpu->proc_ID]( dest, data);
|
||||
dest += 2;
|
||||
len -= 2;
|
||||
}
|
||||
|
@ -940,7 +940,7 @@ static u32 bios_sqrt(armcpu_t* cpu)
|
|||
|
||||
static u32 setHaltCR(armcpu_t* cpu)
|
||||
{
|
||||
MMU_write8(cpu->proc_ID, 0x4000300+cpu->proc_ID, cpu->R[0]);
|
||||
_MMU_write08[cpu->proc_ID]( 0x4000300+cpu->proc_ID, cpu->R[0]);
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return 1;
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||||
}
|
||||
|
||||
|
@ -973,7 +973,7 @@ static u32 getCRC16(armcpu_t* cpu)
|
|||
static u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 };
|
||||
for(i = 0; i < size; i++)
|
||||
{
|
||||
crc = crc ^ MMU_read8( cpu->proc_ID, datap + i);
|
||||
crc = crc ^ _MMU_read08[cpu->proc_ID]( datap + i);
|
||||
|
||||
for(j = 0; j < 8; j++) {
|
||||
int do_bit = 0;
|
||||
|
|
|
@ -760,16 +760,16 @@ static void loadstate()
|
|||
{
|
||||
// This should regenerate the vram banks
|
||||
for (int i = 0; i < 0xA; i++)
|
||||
MMU_write8(ARMCPU_ARM9, 0x04000240+i, MMU_read8(ARMCPU_ARM9, 0x04000240+i));
|
||||
_MMU_write08[ARMCPU_ARM9](0x04000240+i, _MMU_read08[ARMCPU_ARM9](0x04000240+i));
|
||||
|
||||
// This should regenerate the graphics power control register
|
||||
MMU_write16(ARMCPU_ARM9, 0x04000304, MMU_read16(ARMCPU_ARM9, 0x04000304));
|
||||
_MMU_write16[ARMCPU_ARM9](0x04000304, _MMU_read16[ARMCPU_ARM9](0x04000304));
|
||||
|
||||
// This should regenerate the graphics configuration
|
||||
for (int i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x7F; i+=2)
|
||||
MMU_write16(ARMCPU_ARM9, i, MMU_read16(ARMCPU_ARM9, i));
|
||||
_MMU_write16[ARMCPU_ARM9](i, _MMU_read16[ARMCPU_ARM9](i));
|
||||
for (int i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2)
|
||||
MMU_write16(ARMCPU_ARM9, i, MMU_read16(ARMCPU_ARM9, i));
|
||||
_MMU_write16[ARMCPU_ARM9](i, _MMU_read16[ARMCPU_ARM9](i));
|
||||
}
|
||||
|
||||
static bool savestate_load(std::istream* is)
|
||||
|
|
|
@ -41,23 +41,6 @@
|
|||
|
||||
extern volatile BOOL execute;
|
||||
|
||||
// Use this macros for reading/writing, so the GDB stub isn't broken
|
||||
#ifdef GDB_STUB
|
||||
#define READ32(a,b) cpu->mem_if->read32(a,b & 0xFFFFFFFC)
|
||||
#define WRITE32(a,b,c) cpu->mem_if->write32(a,b & 0xFFFFFFFC,c)
|
||||
#define READ16(a,b) cpu->mem_if->read16(a,b & 0xFFFFFFFE)
|
||||
#define WRITE16(a,b,c) cpu->mem_if->write16(a,b & 0xFFFFFFFE,c)
|
||||
#define READ8(a,b) cpu->mem_if->read8(a,b)
|
||||
#define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c)
|
||||
#else
|
||||
#define READ32(a,b) MMU_read32(PROCNUM, b & 0xFFFFFFFC)
|
||||
#define WRITE32(a,b,c) MMU_write32(PROCNUM,b & 0xFFFFFFFC,c)
|
||||
#define READ16(a,b) MMU_read16(PROCNUM, b & 0xFFFFFFFE)
|
||||
#define WRITE16(a,b,c) MMU_write16(PROCNUM,b & 0xFFFFFFFE,c)
|
||||
#define READ8(a,b) MMU_read8(PROCNUM, b)
|
||||
#define WRITE8(a,b,c) MMU_write8(PROCNUM,b,c)
|
||||
#endif
|
||||
|
||||
TEMPLATE static u32 FASTCALL OP_UND_THUMB()
|
||||
{
|
||||
emu_halt();
|
||||
|
|
Loading…
Reference in New Issue