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0.9.4+ branch: revert changes in r2881, that was unreliable.

This commit is contained in:
gocha 2009-10-15 12:51:29 +00:00
parent 4700ec845d
commit cee0d87320
1 changed files with 10 additions and 10 deletions
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20
src/saves.cpp
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@ -1018,19 +1018,19 @@ static void loadstate()
_MMU_write16<ARMCPU_ARM9>(0x04000304, _MMU_read16<ARMCPU_ARM9>(0x04000304)); _MMU_write16<ARMCPU_ARM9>(0x04000304, _MMU_read16<ARMCPU_ARM9>(0x04000304));
// This should regenerate the graphics configuration // This should regenerate the graphics configuration
for (int i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x66; i+=2)
_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
for (int i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2)
_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
//zero 27-jul-09 : was formerly up to 7F but that wrote to dispfifo which is dumb (one of nitsuja's desynch bugs [that he found, not caused]) //zero 27-jul-09 : was formerly up to 7F but that wrote to dispfifo which is dumb (one of nitsuja's desynch bugs [that he found, not caused])
//so then i brought it down to 66 but this resulted in a conceptual bug with affine start registers, which shouldnt get regenerated //so then i brought it down to 66 but this resulted in a conceptual bug with affine start registers, which shouldnt get regenerated
//so then i just made this exhaustive list //so then i just made this exhaustive list
// for (int i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x66; i+=2) //static const u8 mainRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x64,0x66,0x6c};
//_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i)); //static const u8 subRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x6c};
// for (int i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2) //for(u32 i=0;i<ARRAY_SIZE(mainRegenAddr);i++)
//_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i)); // _MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i]));
static const u8 mainRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x64,0x66,0x6c}; //for(u32 i=0;i<ARRAY_SIZE(subRegenAddr);i++)
static const u8 subRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x6c}; // _MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i]));
for(u32 i=0;i<ARRAY_SIZE(mainRegenAddr);i++)
_MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i]));
for(u32 i=0;i<ARRAY_SIZE(subRegenAddr);i++)
_MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i]));
// no need to restore 0x60 since control and MMU.ARM9_REG are both in the savestates, and restoring it could mess up the ack bits anyway // no need to restore 0x60 since control and MMU.ARM9_REG are both in the savestates, and restoring it could mess up the ack bits anyway
SetupMMU(nds.debugConsole); SetupMMU(nds.debugConsole);