GPU: Fix graphical issue in Billiards Action when running at custom framebuffer sizes.
- Fixes custom VRAM reads for OBJ bitmap reads when the read location doesn’t start at line 0. This behavior is now consistent with how BG extended layers do it.
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@ -470,6 +470,7 @@ void GPUEngineBase::_Reset_Base()
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this->_needUpdateWINH[1] = true;
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this->vramBlockOBJIndex = VRAM_NO_3D_USAGE;
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this->vramBlockOBJAddress = this->_sprMem;
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this->nativeLineRenderCount = GPU_FRAMEBUFFER_NATIVE_HEIGHT;
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this->nativeLineOutputCount = GPU_FRAMEBUFFER_NATIVE_HEIGHT;
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@ -3927,13 +3928,25 @@ void GPUEngineBase::_RenderLine_SetupSprites(GPUEngineCompositorInfo &compInfo)
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template <NDSColorFormat OUTPUTFORMAT, bool WILLPERFORMWINDOWTEST>
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void GPUEngineBase::_RenderLine_LayerOBJ(GPUEngineCompositorInfo &compInfo, itemsForPriority_t *__restrict item)
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{
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bool useCustomVRAM = false;
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size_t vramLine = compInfo.line.indexNative;
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if (this->vramBlockOBJIndex != VRAM_NO_3D_USAGE)
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{
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GPU->GetEngineMain()->VerifyVRAMLineDidChange(this->vramBlockOBJIndex, compInfo.line.indexNative);
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const size_t vramPixel = (size_t)((u8 *)MMU_gpu_map(this->vramBlockOBJAddress) - MMU.ARM9_LCD) / sizeof(u16);
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if (vramPixel < (GPU_FRAMEBUFFER_NATIVE_WIDTH * GPU_VRAM_BLOCK_LINES * 4))
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{
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const size_t blockID = vramPixel / (GPU_FRAMEBUFFER_NATIVE_WIDTH * GPU_VRAM_BLOCK_LINES);
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const size_t blockPixel = vramPixel % (GPU_FRAMEBUFFER_NATIVE_WIDTH * GPU_VRAM_BLOCK_LINES);
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const size_t blockLine = blockPixel / GPU_FRAMEBUFFER_NATIVE_WIDTH;
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vramLine += blockLine;
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GPU->GetEngineMain()->VerifyVRAMLineDidChange(blockID, vramLine);
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useCustomVRAM = !GPU->GetEngineMain()->isLineCaptureNative[blockID][vramLine];
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}
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}
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const bool useCustomVRAM = (this->vramBlockOBJIndex != VRAM_NO_3D_USAGE) && !GPU->GetEngineMain()->isLineCaptureNative[this->vramBlockOBJIndex][compInfo.line.indexNative];
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const u16 *__restrict srcLine = (useCustomVRAM) ? GPU->GetEngineMain()->GetCustomVRAMBlockPtr(this->vramBlockOBJIndex) + compInfo.line.blockOffsetCustom : NULL;
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if (this->isLineRenderNative[compInfo.line.indexNative] && useCustomVRAM)
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{
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switch (OUTPUTFORMAT)
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@ -3976,6 +3989,7 @@ void GPUEngineBase::_RenderLine_LayerOBJ(GPUEngineCompositorInfo &compInfo, item
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}
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else
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{
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const u16 *__restrict srcLine = (useCustomVRAM) ? GPU->GetCustomVRAMAddressUsingMappedAddress(this->vramBlockOBJAddress) + compInfo.line.blockOffsetCustom : NULL;
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void *__restrict dstColorPtr = compInfo.target.lineColorHead;
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u8 *__restrict dstLayerIDPtr = compInfo.target.lineLayerIDHead;
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@ -4475,6 +4489,7 @@ void GPUEngineBase::UpdateVRAM3DUsageProperties_OBJLayer(const size_t bankIndex)
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if( (vramAddress == (DISPCAPCNT.VRAMWriteOffset * ADDRESS_STEP_32KB)) && (sprSize.width == 64) && (sprSize.height == 64) )
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{
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this->vramBlockOBJIndex = bankIndex;
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this->vramBlockOBJAddress = this->_sprMem + (((spriteInfo.TileIndex & 0x3E0) * 64 + (spriteInfo.TileIndex & 0x1F) * 8) << 1);
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return;
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}
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}
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@ -1453,6 +1453,7 @@ public:
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void LastLineProcess();
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u8 vramBlockOBJIndex;
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u32 vramBlockOBJAddress;
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size_t nativeLineRenderCount;
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size_t nativeLineOutputCount;
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