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switch back to using templates for mmu 7/9 splitting. to make it worth the trouble, i also split the embedded bios functions in the same way

This commit is contained in:
zeromus 2008-12-29 01:32:58 +00:00
parent b85473360b
commit b4a3551b1c
9 changed files with 1179 additions and 1122 deletions
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121
desmume/src/MMU.cpp
View File

@ -56,13 +56,56 @@ static u8 FASTCALL _MMU_ARM7_read08(u32 adr);
static u16 FASTCALL _MMU_ARM7_read16(u32 adr); static u16 FASTCALL _MMU_ARM7_read16(u32 adr);
static u32 FASTCALL _MMU_ARM7_read32(u32 adr); static u32 FASTCALL _MMU_ARM7_read32(u32 adr);
u8 (* FASTCALL _MMU_read08[2])(u32 addr) = {_MMU_ARM9_read08, _MMU_ARM7_read08};
u16 (* FASTCALL _MMU_read16[2])(u32 addr) = {_MMU_ARM9_read16, _MMU_ARM7_read16};
u32 (* FASTCALL _MMU_read32[2])(u32 addr) = {_MMU_ARM9_read32, _MMU_ARM7_read32};
void (* FASTCALL _MMU_write08[2])(u32 addr, u8 val) = {_MMU_ARM9_write08, _MMU_ARM7_write08}; u8 _MMU_read08(int PROCNUM, u32 addr) {
void (* FASTCALL _MMU_write16[2])(u32 addr, u16 val) = {_MMU_ARM9_write16, _MMU_ARM7_write16}; if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read08(addr);
void (* FASTCALL _MMU_write32[2])(u32 addr, u32 val) = {_MMU_ARM9_write32, _MMU_ARM7_write32}; else return _MMU_ARM7_read08(addr);
}
u16 _MMU_read16(int PROCNUM, u32 addr) {
if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read16(addr);
else return _MMU_ARM7_read16(addr);
}
u32 _MMU_read32(int PROCNUM, u32 addr) {
if(PROCNUM==ARMCPU_ARM9) return _MMU_ARM9_read32(addr);
else return _MMU_ARM7_read32(addr);
}
void _MMU_write08(int PROCNUM, u32 addr, u8 val) {
if(PROCNUM==ARMCPU_ARM9) _MMU_ARM9_write08(addr,val);
else _MMU_ARM7_write08(addr,val);
}
void _MMU_write16(int PROCNUM, u32 addr, u16 val) {
if(PROCNUM==ARMCPU_ARM9) _MMU_ARM9_write16(addr,val);
else _MMU_ARM7_write16(addr,val);
}
void _MMU_write32(int PROCNUM, u32 addr, u32 val) {
if(PROCNUM==ARMCPU_ARM9) _MMU_ARM9_write32(addr,val);
else _MMU_ARM7_write32(addr,val);
}
template<int PROCNUM>
u8 _MMU_read08(u32 addr) { return _MMU_read08(PROCNUM, addr); }
template<int PROCNUM>
u16 _MMU_read16(u32 addr) { return _MMU_read16(PROCNUM, addr); }
template<int PROCNUM>
u32 _MMU_read32(u32 addr) { return _MMU_read32(PROCNUM, addr); }
template<int PROCNUM>
void _MMU_write08(u32 addr, u8 val) { _MMU_write08(PROCNUM, addr, val); }
template<int PROCNUM>
void _MMU_write16(u32 addr, u16 val) { _MMU_write16(PROCNUM, addr, val); }
template<int PROCNUM>
void _MMU_write32(u32 addr, u32 val) { _MMU_write32(PROCNUM, addr, val); }
//http://home.utah.edu/~nahaj/factoring/isqrt.c.html //http://home.utah.edu/~nahaj/factoring/isqrt.c.html
static u64 isqrt (u64 x) { static u64 isqrt (u64 x) {
@ -880,20 +923,26 @@ void FASTCALL MMU_doDMA(u32 proc, u32 num)
default: default:
return; return;
} }
if ((MMU.DMACrt[proc][num]>>26)&1)
for(; i < taille; ++i) #define DMA_LOOP(PROC) \
{ if ((MMU.DMACrt[proc][num]>>26)&1) \
_MMU_write32[proc](dst, _MMU_read32[proc](src)); for(; i < taille; ++i) \
dst += dstinc; { \
src += srcinc; _MMU_write32<PROC>(dst, _MMU_read32<PROC>(src)); \
} dst += dstinc; \
else src += srcinc; \
for(; i < taille; ++i) } \
{ else \
_MMU_write16[proc](dst, _MMU_read16[proc](src)); for(; i < taille; ++i) \
dst += dstinc; { \
src += srcinc; _MMU_write16<PROC>(dst, _MMU_read16<PROC>(src)); \
} dst += dstinc; \
src += srcinc; \
} \
if(proc == ARMCPU_ARM9) { DMA_LOOP(ARMCPU_ARM9); }
else { DMA_LOOP(ARMCPU_ARM7); }
//write back the addresses //write back the addresses
DMASrc[proc][num] = src; DMASrc[proc][num] = src;
@ -1119,7 +1168,7 @@ arm9_prefetch16( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read16[ARMCPU_ARM9](adr); return _MMU_read16<ARMCPU_ARM9>(adr);
} }
static u32 FASTCALL static u32 FASTCALL
arm9_prefetch32( void *data, u32 adr) { arm9_prefetch32( void *data, u32 adr) {
@ -1140,7 +1189,7 @@ arm9_prefetch32( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read32[ARMCPU_ARM9](adr); return _MMU_read32<ARMCPU_ARM9>(adr);
} }
static u8 FASTCALL static u8 FASTCALL
@ -1161,7 +1210,7 @@ arm9_read8( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read08[ARMCPU_ARM9](adr); return _MMU_read08<ARMCPU_ARM9>(adr);
} }
static u16 FASTCALL static u16 FASTCALL
arm9_read16( void *data, u32 adr) { arm9_read16( void *data, u32 adr) {
@ -1183,7 +1232,7 @@ arm9_read16( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read16[ARMCPU_ARM9](adr); return _MMU_read16<ARMCPU_ARM9>(adr);
} }
static u32 FASTCALL static u32 FASTCALL
arm9_read32( void *data, u32 adr) { arm9_read32( void *data, u32 adr) {
@ -1204,7 +1253,7 @@ arm9_read32( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read32[ARMCPU_ARM9](adr); return _MMU_read32<ARMCPU_ARM9>(adr);
} }
@ -1229,7 +1278,7 @@ arm9_write8(void *data, u32 adr, u8 val) {
} }
#endif #endif
_MMU_write08[ARMCPU_ARM9](adr, val); _MMU_write08<ARMCPU_ARM9>(adr, val);
} }
static void FASTCALL static void FASTCALL
arm9_write16(void *data, u32 adr, u16 val) { arm9_write16(void *data, u32 adr, u16 val) {
@ -1252,7 +1301,7 @@ arm9_write16(void *data, u32 adr, u16 val) {
} }
#endif #endif
_MMU_write16[ARMCPU_ARM9](adr, val); _MMU_write16<ARMCPU_ARM9>(adr, val);
} }
static void FASTCALL static void FASTCALL
arm9_write32(void *data, u32 adr, u32 val) { arm9_write32(void *data, u32 adr, u32 val) {
@ -1275,7 +1324,7 @@ arm9_write32(void *data, u32 adr, u32 val) {
} }
#endif #endif
_MMU_write32[ARMCPU_ARM9](adr, val); _MMU_write32<ARMCPU_ARM9>(adr, val);
} }
@ -1295,7 +1344,7 @@ arm7_prefetch16( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read16[ARMCPU_ARM7](adr); return _MMU_read16<ARMCPU_ARM7>(adr);
} }
static u32 FASTCALL static u32 FASTCALL
arm7_prefetch32( void *data, u32 adr) { arm7_prefetch32( void *data, u32 adr) {
@ -1311,7 +1360,7 @@ arm7_prefetch32( void *data, u32 adr) {
} }
#endif #endif
return _MMU_read32[ARMCPU_ARM7](adr); return _MMU_read32<ARMCPU_ARM7>(adr);
} }
static u8 FASTCALL static u8 FASTCALL
@ -1320,7 +1369,7 @@ arm7_read8( void *data, u32 adr) {
profile_memory_access( 0, adr, PROFILE_READ); profile_memory_access( 0, adr, PROFILE_READ);
#endif #endif
return _MMU_read08[ARMCPU_ARM7](adr); return _MMU_read08<ARMCPU_ARM7>(adr);
} }
static u16 FASTCALL static u16 FASTCALL
arm7_read16( void *data, u32 adr) { arm7_read16( void *data, u32 adr) {
@ -1328,7 +1377,7 @@ arm7_read16( void *data, u32 adr) {
profile_memory_access( 0, adr, PROFILE_READ); profile_memory_access( 0, adr, PROFILE_READ);
#endif #endif
return _MMU_read16[ARMCPU_ARM7](adr); return _MMU_read16<ARMCPU_ARM7>(adr);
} }
static u32 FASTCALL static u32 FASTCALL
arm7_read32( void *data, u32 adr) { arm7_read32( void *data, u32 adr) {
@ -1336,7 +1385,7 @@ arm7_read32( void *data, u32 adr) {
profile_memory_access( 0, adr, PROFILE_READ); profile_memory_access( 0, adr, PROFILE_READ);
#endif #endif
return _MMU_read32[ARMCPU_ARM7](adr); return _MMU_read32<ARMCPU_ARM7>(adr);
} }
static void FASTCALL static void FASTCALL
@ -1345,7 +1394,7 @@ arm7_write8(void *data, u32 adr, u8 val) {
profile_memory_access( 0, adr, PROFILE_WRITE); profile_memory_access( 0, adr, PROFILE_WRITE);
#endif #endif
_MMU_write08[ARMCPU_ARM7](adr, val); _MMU_write08<ARMCPU_ARM7>(adr, val);
} }
static void FASTCALL static void FASTCALL
arm7_write16(void *data, u32 adr, u16 val) { arm7_write16(void *data, u32 adr, u16 val) {
@ -1353,7 +1402,7 @@ arm7_write16(void *data, u32 adr, u16 val) {
profile_memory_access( 0, adr, PROFILE_WRITE); profile_memory_access( 0, adr, PROFILE_WRITE);
#endif #endif
_MMU_write16[ARMCPU_ARM7](adr, val); _MMU_write16<ARMCPU_ARM7>(adr, val);
} }
static void FASTCALL static void FASTCALL
arm7_write32(void *data, u32 adr, u32 val) { arm7_write32(void *data, u32 adr, u32 val) {
@ -1361,7 +1410,7 @@ arm7_write32(void *data, u32 adr, u32 val) {
profile_memory_access( 0, adr, PROFILE_WRITE); profile_memory_access( 0, adr, PROFILE_WRITE);
#endif #endif
_MMU_write32[ARMCPU_ARM7](adr, val); _MMU_write32<ARMCPU_ARM7>(adr, val);
} }

43
desmume/src/MMU.h
View File

@ -177,14 +177,19 @@ extern struct armcpu_memory_iface arm9_direct_memory_iface;
extern u8 *MMU_RenderMapToLCD(u32 vram_addr); extern u8 *MMU_RenderMapToLCD(u32 vram_addr);
extern u8 (* FASTCALL _MMU_read08[2])(u32 addr); template<int PROCNUM> u8 _MMU_read08(u32 addr);
extern u16 (* FASTCALL _MMU_read16[2])(u32 addr); template<int PROCNUM> u16 _MMU_read16(u32 addr);
extern u32 (* FASTCALL _MMU_read32[2])(u32 addr); template<int PROCNUM> u32 _MMU_read32(u32 addr);
template<int PROCNUM> void _MMU_write08(u32 addr, u8 val);
extern void (* FASTCALL _MMU_write08[2])(u32 addr, u8 val); template<int PROCNUM> void _MMU_write16(u32 addr, u16 val);
extern void (* FASTCALL _MMU_write16[2])(u32 addr, u16 val); template<int PROCNUM> void _MMU_write32(u32 addr, u32 val);
extern void (* FASTCALL _MMU_write32[2])(u32 addr, u32 val);
u8 _MMU_read08(int PROCNUM, u32 addr);
u16 _MMU_read16(int PROCNUM, u32 addr);
u32 _MMU_read32(int PROCNUM, u32 addr);
void _MMU_write08(int PROCNUM, u32 addr, u8 val);
void _MMU_write16(int PROCNUM, u32 addr, u16 val);
void _MMU_write32(int PROCNUM, u32 addr, u32 val);
#ifdef MMU_ENABLE_ACL #ifdef MMU_ENABLE_ACL
void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val); void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val);
@ -194,12 +199,12 @@ extern void (* FASTCALL _MMU_write32[2])(u32 addr, u32 val);
u16 FASTCALL MMU_read16_acl(u32 proc, u32 adr, u32 access); u16 FASTCALL MMU_read16_acl(u32 proc, u32 adr, u32 access);
u32 FASTCALL MMU_read32_acl(u32 proc, u32 adr, u32 access); u32 FASTCALL MMU_read32_acl(u32 proc, u32 adr, u32 access);
#else #else
#define MMU_write8_acl(proc, adr, val) _MMU_write08[proc](adr, val) #define MMU_write8_acl(proc, adr, val) _MMU_write08<proc>(adr, val)
#define MMU_write16_acl(proc, adr, val) _MMU_write16[proc](adr, val) #define MMU_write16_acl(proc, adr, val) _MMU_write16<proc>(adr, val)
#define MMU_write32_acl(proc, adr, val) _MMU_write32[proc][proc](adr, val) #define MMU_write32_acl(proc, adr, val) _MMU_write32<proc>(adr, val)
#define MMU_read8_acl(proc,adr,access) _MMU_read08[proc](adr) #define MMU_read8_acl(proc,adr,access) _MMU_read08<proc>(adr)
#define MMU_read16_acl(proc,adr,access) _MMU_read16[proc](adr) #define MMU_read16_acl(proc,adr,access) _MMU_read16<proc>(adr)
#define MMU_read32_acl(proc,adr,access) _MMU_read32[proc](adr) #define MMU_read32_acl(proc,adr,access) _MMU_read32<proc>(adr)
#endif #endif
// Use this macros for reading/writing, so the GDB stub isn't broken // Use this macros for reading/writing, so the GDB stub isn't broken
@ -211,12 +216,12 @@ extern void (* FASTCALL _MMU_write32[2])(u32 addr, u32 val);
#define READ8(a,b) cpu->mem_if->read8(a,b) #define READ8(a,b) cpu->mem_if->read8(a,b)
#define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c) #define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c)
#else #else
#define READ32(a,b) _MMU_read32[PROCNUM]((b) & 0xFFFFFFFC) #define READ32(a,b) _MMU_read32<PROCNUM>((b) & 0xFFFFFFFC)
#define WRITE32(a,b,c) _MMU_write32[PROCNUM]((b) & 0xFFFFFFFC,c) #define WRITE32(a,b,c) _MMU_write32<PROCNUM>((b) & 0xFFFFFFFC,c)
#define READ16(a,b) _MMU_read16[PROCNUM]((b) & 0xFFFFFFFE) #define READ16(a,b) _MMU_read16<PROCNUM>((b) & 0xFFFFFFFE)
#define WRITE16(a,b,c) _MMU_write16[PROCNUM]((b) & 0xFFFFFFFE,c) #define WRITE16(a,b,c) _MMU_write16<PROCNUM>((b) & 0xFFFFFFFE,c)
#define READ8(a,b) _MMU_read08[PROCNUM](b) #define READ8(a,b) _MMU_read08<PROCNUM>(b)
#define WRITE8(a,b,c) _MMU_write08[PROCNUM](b, c) #define WRITE8(a,b,c) _MMU_write08<PROCNUM>(b, c)
#endif #endif
#endif #endif

112
desmume/src/NDSSystem.cpp
View File

@ -487,7 +487,7 @@ void NDS_Reset( void)
for(i = 0; i < (header->ARM9binSize>>2); ++i) for(i = 0; i < (header->ARM9binSize>>2); ++i)
{ {
_MMU_write32[ARMCPU_ARM9](dst, T1ReadLong(MMU.CART_ROM, src)); _MMU_write32<ARMCPU_ARM9>(dst, T1ReadLong(MMU.CART_ROM, src));
dst += 4; dst += 4;
src += 4; src += 4;
} }
@ -497,7 +497,7 @@ void NDS_Reset( void)
for(i = 0; i < (header->ARM7binSize>>2); ++i) for(i = 0; i < (header->ARM7binSize>>2); ++i)
{ {
_MMU_write32[ARMCPU_ARM7](dst, T1ReadLong(MMU.CART_ROM, src)); _MMU_write32<ARMCPU_ARM7>(dst, T1ReadLong(MMU.CART_ROM, src));
dst += 4; dst += 4;
src += 4; src += 4;
} }
@ -517,9 +517,9 @@ void NDS_Reset( void)
nds.touchX = nds.touchY = 0; nds.touchX = nds.touchY = 0;
nds.isTouch = 0; nds.isTouch = 0;
_MMU_write16[ARMCPU_ARM9](0x04000130, 0x3FF); _MMU_write16<ARMCPU_ARM9>(0x04000130, 0x3FF);
_MMU_write16[ARMCPU_ARM7](0x04000130, 0x3FF); _MMU_write16<ARMCPU_ARM7>(0x04000130, 0x3FF);
_MMU_write08[ARMCPU_ARM7](0x04000136, 0x43); _MMU_write08<ARMCPU_ARM7>(0x04000136, 0x43);
LidClosed = FALSE; LidClosed = FALSE;
LidKeyCount = 0; LidKeyCount = 0;
@ -534,70 +534,70 @@ void NDS_Reset( void)
if ( copy_firmware_user_data( temp_buffer, MMU.fw.data)) { if ( copy_firmware_user_data( temp_buffer, MMU.fw.data)) {
for ( fw_index = 0; fw_index < NDS_FW_USER_SETTINGS_MEM_BYTE_COUNT; fw_index++) for ( fw_index = 0; fw_index < NDS_FW_USER_SETTINGS_MEM_BYTE_COUNT; fw_index++)
_MMU_write08[ARMCPU_ARM9](0x027FFC80 + fw_index, temp_buffer[fw_index]); _MMU_write08<ARMCPU_ARM9>(0x027FFC80 + fw_index, temp_buffer[fw_index]);
} }
} }
// Copy the whole header to Main RAM 0x27FFE00 on startup. // Copy the whole header to Main RAM 0x27FFE00 on startup.
// Reference: http://nocash.emubase.de/gbatek.htm#dscartridgeheader // Reference: http://nocash.emubase.de/gbatek.htm#dscartridgeheader
for (i = 0; i < ((0x170+0x90)/4); i++) { for (i = 0; i < ((0x170+0x90)/4); i++) {
_MMU_write32[ARMCPU_ARM9](0x027FFE00+i*4, LE_TO_LOCAL_32(((u32*)MMU.CART_ROM)[i])); _MMU_write32<ARMCPU_ARM9>(0x027FFE00+i*4, LE_TO_LOCAL_32(((u32*)MMU.CART_ROM)[i]));
} }
MainScreen.offset = 0; MainScreen.offset = 0;
SubScreen.offset = 192; SubScreen.offset = 192;
//_MMU_write32[ARMCPU_ARM9](0x02007FFC, 0xE92D4030); //_MMU_write32[ARMCPU_ARM9](0x02007FFC, 0xE92D4030);
FILE* inf = 0; FILE* inf = 0;
//ARM7 BIOS IRQ HANDLER //ARM7 BIOS IRQ HANDLER
inf = fopen("BiosNds7.ROM","rb"); inf = fopen("BiosNds7.ROM","rb");
if(inf) { if(inf) {
fread(MMU.ARM7_BIOS,1,16384,inf); fread(MMU.ARM7_BIOS,1,16384,inf);
fclose(inf); fclose(inf);
NDS_ARM7.swi_tab = 0; NDS_ARM7.swi_tab = 0;
} else { } else {
NDS_ARM7.swi_tab = ARM7_swi_tab; NDS_ARM7.swi_tab = ARM7_swi_tab;
_MMU_write32[ARMCPU_ARM7](0x00, 0xE25EF002); _MMU_write32<ARMCPU_ARM7>(0x00, 0xE25EF002);
_MMU_write32[ARMCPU_ARM7](0x04, 0xEAFFFFFE); _MMU_write32<ARMCPU_ARM7>(0x04, 0xEAFFFFFE);
_MMU_write32[ARMCPU_ARM7](0x18, 0xEA000000); _MMU_write32<ARMCPU_ARM7>(0x18, 0xEA000000);
_MMU_write32[ARMCPU_ARM7](0x20, 0xE92D500F); _MMU_write32<ARMCPU_ARM7>(0x20, 0xE92D500F);
_MMU_write32[ARMCPU_ARM7](0x24, 0xE3A00301); _MMU_write32<ARMCPU_ARM7>(0x24, 0xE3A00301);
_MMU_write32[ARMCPU_ARM7](0x28, 0xE28FE000); _MMU_write32<ARMCPU_ARM7>(0x28, 0xE28FE000);
_MMU_write32[ARMCPU_ARM7](0x2C, 0xE510F004); _MMU_write32<ARMCPU_ARM7>(0x2C, 0xE510F004);
_MMU_write32[ARMCPU_ARM7](0x30, 0xE8BD500F); _MMU_write32<ARMCPU_ARM7>(0x30, 0xE8BD500F);
_MMU_write32[ARMCPU_ARM7](0x34, 0xE25EF004); _MMU_write32<ARMCPU_ARM7>(0x34, 0xE25EF004);
} }
//ARM9 BIOS IRQ HANDLER //ARM9 BIOS IRQ HANDLER
inf = fopen("BiosNds9.ROM","rb"); inf = fopen("BiosNds9.ROM","rb");
if(inf) { if(inf) {
fread(ARM9Mem.ARM9_BIOS,1,4096,inf); fread(ARM9Mem.ARM9_BIOS,1,4096,inf);
fclose(inf); fclose(inf);
NDS_ARM9.swi_tab = 0; NDS_ARM9.swi_tab = 0;
} else { } else {
NDS_ARM9.swi_tab = ARM9_swi_tab; NDS_ARM9.swi_tab = ARM9_swi_tab;
_MMU_write32[ARMCPU_ARM9](0xFFFF0018, 0xEA000000); _MMU_write32<ARMCPU_ARM9>(0xFFFF0018, 0xEA000000);
_MMU_write32[ARMCPU_ARM9](0xFFFF0020, 0xE92D500F); _MMU_write32<ARMCPU_ARM9>(0xFFFF0020, 0xE92D500F);
_MMU_write32[ARMCPU_ARM9](0xFFFF0024, 0xEE190F11); _MMU_write32<ARMCPU_ARM9>(0xFFFF0024, 0xEE190F11);
_MMU_write32[ARMCPU_ARM9](0xFFFF0028, 0xE1A00620); _MMU_write32<ARMCPU_ARM9>(0xFFFF0028, 0xE1A00620);
_MMU_write32[ARMCPU_ARM9](0xFFFF002C, 0xE1A00600); _MMU_write32<ARMCPU_ARM9>(0xFFFF002C, 0xE1A00600);
_MMU_write32[ARMCPU_ARM9](0xFFFF0030, 0xE2800C40); _MMU_write32<ARMCPU_ARM9>(0xFFFF0030, 0xE2800C40);
_MMU_write32[ARMCPU_ARM9](0xFFFF0034, 0xE28FE000); _MMU_write32<ARMCPU_ARM9>(0xFFFF0034, 0xE28FE000);
_MMU_write32[ARMCPU_ARM9](0xFFFF0038, 0xE510F004); _MMU_write32<ARMCPU_ARM9>(0xFFFF0038, 0xE510F004);
_MMU_write32[ARMCPU_ARM9](0xFFFF003C, 0xE8BD500F); _MMU_write32<ARMCPU_ARM9>(0xFFFF003C, 0xE8BD500F);
_MMU_write32[ARMCPU_ARM9](0xFFFF0040, 0xE25EF004); _MMU_write32<ARMCPU_ARM9>(0xFFFF0040, 0xE25EF004);
} }
_MMU_write32[ARMCPU_ARM9](0x0000004, 0xE3A0010E);
_MMU_write32[ARMCPU_ARM9](0x0000008, 0xE3A01020);
// _MMU_write32[ARMCPU_ARM9](0x000000C, 0xE1B02110); _MMU_write32<ARMCPU_ARM9>(0x0000004, 0xE3A0010E);
_MMU_write32[ARMCPU_ARM9](0x000000C, 0xE1B02040); _MMU_write32<ARMCPU_ARM9>(0x0000008, 0xE3A01020);
_MMU_write32[ARMCPU_ARM9](0x0000010, 0xE3B02020); // _MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02110);
// _MMU_write32[ARMCPU_ARM9](0x0000010, 0xE2100202); _MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02040);
_MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE3B02020);
// _MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE2100202);
delete header; delete header;
@ -1826,9 +1826,9 @@ void NDS_setPad(bool R,bool L,bool D,bool U,bool T,bool S,bool B,bool A,bool Y,b
// TODO: low power IRQ // TODO: low power IRQ
} }
void emu_halt() { void emu_halt() {
execute = false; execute = false;
} }
//these templates needed to be instantiated manually //these templates needed to be instantiated manually

2
desmume/src/arm_instructions.cpp
View File

@ -7773,7 +7773,7 @@ TEMPLATE static u32 FASTCALL OP_SWI()
{ {
if(cpu->swi_tab) { if(cpu->swi_tab) {
u32 swinum = (cpu->instruction>>16)&0x1F; u32 swinum = (cpu->instruction>>16)&0x1F;
return cpu->swi_tab[swinum](cpu) + 3; return cpu->swi_tab[swinum]() + 3;
} else { } else {
/* TODO (#1#): translocated SWI vectors */ /* TODO (#1#): translocated SWI vectors */
/* we use an irq thats not in the irq tab, as /* we use an irq thats not in the irq tab, as

2
desmume/src/armcpu.h
View File

@ -182,7 +182,7 @@ typedef struct armcpu_t
BOOL wIRQ; BOOL wIRQ;
BOOL wirq; BOOL wirq;
u32 (* *swi_tab)(struct armcpu_t * cpu); u32 (* *swi_tab)();
#ifdef GDB_STUB #ifdef GDB_STUB
/** there is a pending irq for the cpu */ /** there is a pending irq for the cpu */

323
desmume/src/bios.cpp
View File

@ -25,6 +25,9 @@
#include "SPU.h" #include "SPU.h"
#include "debug.h" #include "debug.h"
#define cpu (&ARMPROC)
#define TEMPLATE template<int PROCNUM>
extern BOOL execute; extern BOOL execute;
static const u16 getsinetbl[] = { static const u16 getsinetbl[] = {
@ -186,7 +189,7 @@ static const u8 getvoltbl[] = {
0x7C, 0x7D, 0x7E, 0x7F 0x7C, 0x7D, 0x7E, 0x7F
}; };
static u32 bios_nop(armcpu_t * cpu) TEMPLATE static u32 bios_nop()
{ {
if (cpu->proc_ID == ARMCPU_ARM9) if (cpu->proc_ID == ARMCPU_ARM9)
{ {
@ -199,14 +202,14 @@ static u32 bios_nop(armcpu_t * cpu)
return 3; return 3;
} }
static u32 delayLoop(armcpu_t * cpu) TEMPLATE static u32 delayLoop()
{ {
return cpu->R[0] * 4; return cpu->R[0] * 4;
} }
//u32 oldmode[2]; //u32 oldmode[2];
static u32 intrWaitARM(armcpu_t * cpu) TEMPLATE u32 intrWaitARM()
{ {
u32 intrFlagAdr;// = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; u32 intrFlagAdr;// = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
u32 intr; u32 intr;
@ -219,7 +222,7 @@ static u32 intrWaitARM(armcpu_t * cpu)
} else { } else {
intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
} }
intr = _MMU_read32[cpu->proc_ID]( intrFlagAdr); intr = _MMU_read32(cpu->proc_ID,intrFlagAdr);
intrFlag = cpu->R[1] & intr; intrFlag = cpu->R[1] & intr;
if(intrFlag) if(intrFlag)
@ -227,7 +230,7 @@ static u32 intrWaitARM(armcpu_t * cpu)
// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s) // si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
// on efface son(les) occurence(s). // on efface son(les) occurence(s).
intr ^= intrFlag; intr ^= intrFlag;
_MMU_write32[cpu->proc_ID]( intrFlagAdr, intr); _MMU_write32(cpu->proc_ID, intrFlagAdr, intr);
//cpu->switchMode(oldmode[cpu->proc_ID]); //cpu->switchMode(oldmode[cpu->proc_ID]);
return 1; return 1;
} }
@ -240,7 +243,7 @@ static u32 intrWaitARM(armcpu_t * cpu)
return 1; return 1;
} }
static u32 waitVBlankARM(armcpu_t * cpu) TEMPLATE static u32 waitVBlankARM()
{ {
u32 intrFlagAdr;// = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; u32 intrFlagAdr;// = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
u32 intr; u32 intr;
@ -253,7 +256,7 @@ static u32 waitVBlankARM(armcpu_t * cpu)
} else { } else {
intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
} }
intr = _MMU_read32[cpu->proc_ID]( intrFlagAdr); intr = _MMU_read32(cpu->proc_ID,intrFlagAdr);
intrFlag = 1 & intr; intrFlag = 1 & intr;
if(intrFlag) if(intrFlag)
@ -261,7 +264,7 @@ static u32 waitVBlankARM(armcpu_t * cpu)
// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s) // si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
// on efface son(les) occurence(s). // on efface son(les) occurence(s).
intr ^= intrFlag; intr ^= intrFlag;
_MMU_write32[cpu->proc_ID]( intrFlagAdr, intr); _MMU_write32(cpu->proc_ID,intrFlagAdr, intr);
//cpu->switchMode(oldmode[cpu->proc_ID]); //cpu->switchMode(oldmode[cpu->proc_ID]);
return 1; return 1;
} }
@ -274,7 +277,7 @@ static u32 waitVBlankARM(armcpu_t * cpu)
return 1; return 1;
} }
static u32 wait4IRQ(armcpu_t* cpu) TEMPLATE static u32 wait4IRQ()
{ {
//execute= FALSE; //execute= FALSE;
if(cpu->wirq) if(cpu->wirq)
@ -298,7 +301,7 @@ static u32 wait4IRQ(armcpu_t* cpu)
return 1; return 1;
} }
static u32 divide(armcpu_t* cpu) TEMPLATE static u32 divide()
{ {
s32 num = (s32)cpu->R[0]; s32 num = (s32)cpu->R[0];
s32 dnum = (s32)cpu->R[1]; s32 dnum = (s32)cpu->R[1];
@ -312,7 +315,7 @@ static u32 divide(armcpu_t* cpu)
return 6; return 6;
} }
static u32 copy(armcpu_t* cpu) TEMPLATE static u32 copy()
{ {
u32 src = cpu->R[0]; u32 src = cpu->R[0];
u32 dst = cpu->R[1]; u32 dst = cpu->R[1];
@ -329,7 +332,7 @@ static u32 copy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write16[cpu->proc_ID]( dst, _MMU_read16[cpu->proc_ID]( src)); _MMU_write16(cpu->proc_ID,dst, _MMU_read16(cpu->proc_ID,src));
cnt--; cnt--;
dst+=2; dst+=2;
src+=2; src+=2;
@ -337,11 +340,11 @@ static u32 copy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = _MMU_read16[cpu->proc_ID]( src); u32 val = _MMU_read16(cpu->proc_ID, src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write16[cpu->proc_ID]( dst, val); _MMU_write16(cpu->proc_ID, dst, val);
cnt--; cnt--;
dst+=2; dst+=2;
} }
@ -358,7 +361,7 @@ static u32 copy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write32[cpu->proc_ID]( dst, _MMU_read32[cpu->proc_ID]( src)); _MMU_write32(cpu->proc_ID, dst, _MMU_read32(cpu->proc_ID, src));
cnt--; cnt--;
dst+=4; dst+=4;
src+=4; src+=4;
@ -366,11 +369,11 @@ static u32 copy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = _MMU_read32[cpu->proc_ID]( src); u32 val = _MMU_read32(cpu->proc_ID, src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write32[cpu->proc_ID]( dst, val); _MMU_write32(cpu->proc_ID,dst, val);
cnt--; cnt--;
dst+=4; dst+=4;
} }
@ -382,7 +385,7 @@ static u32 copy(armcpu_t* cpu)
return 1; return 1;
} }
static u32 fastCopy(armcpu_t* cpu) TEMPLATE static u32 fastCopy()
{ {
u32 src = cpu->R[0] & 0xFFFFFFFC; u32 src = cpu->R[0] & 0xFFFFFFFC;
u32 dst = cpu->R[1] & 0xFFFFFFFC; u32 dst = cpu->R[1] & 0xFFFFFFFC;
@ -394,7 +397,7 @@ static u32 fastCopy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write32[cpu->proc_ID]( dst, _MMU_read32[cpu->proc_ID]( src)); _MMU_write32(cpu->proc_ID,dst, _MMU_read32(cpu->proc_ID,src));
cnt--; cnt--;
dst+=4; dst+=4;
src+=4; src+=4;
@ -402,11 +405,11 @@ static u32 fastCopy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = _MMU_read32[cpu->proc_ID]( src); u32 val = _MMU_read32(cpu->proc_ID,src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
_MMU_write32[cpu->proc_ID]( dst, val); _MMU_write32(cpu->proc_ID,dst, val);
cnt--; cnt--;
dst+=4; dst+=4;
} }
@ -416,7 +419,7 @@ static u32 fastCopy(armcpu_t* cpu)
return 1; return 1;
} }
static u32 LZ77UnCompVram(armcpu_t* cpu) TEMPLATE static u32 LZ77UnCompVram()
{ {
int i1, i2; int i1, i2;
int byteCount; int byteCount;
@ -425,7 +428,7 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
int len; int len;
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = _MMU_read32[cpu->proc_ID]( source); u32 header = _MMU_read32(cpu->proc_ID,source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -439,7 +442,7 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = _MMU_read08[cpu->proc_ID]( source++); u8 d = _MMU_read08(cpu->proc_ID,source++);
if(d) { if(d) {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
@ -447,18 +450,18 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
int length; int length;
int offset; int offset;
u32 windowOffset; u32 windowOffset;
u16 data = _MMU_read08[cpu->proc_ID]( source++) << 8; u16 data = _MMU_read08(cpu->proc_ID,source++) << 8;
data |= _MMU_read08[cpu->proc_ID]( source++); data |= _MMU_read08(cpu->proc_ID,source++);
length = (data >> 12) + 3; length = (data >> 12) + 3;
offset = (data & 0x0FFF); offset = (data & 0x0FFF);
windowOffset = dest + byteCount - offset - 1; windowOffset = dest + byteCount - offset - 1;
for(i2 = 0; i2 < length; i2++) { for(i2 = 0; i2 < length; i2++) {
writeValue |= (_MMU_read08[cpu->proc_ID]( windowOffset++) << byteShift); writeValue |= (_MMU_read08(cpu->proc_ID,windowOffset++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
_MMU_write16[cpu->proc_ID]( dest, writeValue); _MMU_write16(cpu->proc_ID,dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -469,11 +472,11 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
return 0; return 0;
} }
} else { } else {
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift); writeValue |= (_MMU_read08(cpu->proc_ID,source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
_MMU_write16[cpu->proc_ID]( dest, writeValue); _MMU_write16(cpu->proc_ID,dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -487,11 +490,11 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
} }
} else { } else {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift); writeValue |= (_MMU_read08(cpu->proc_ID, source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
_MMU_write16[cpu->proc_ID]( dest, writeValue); _MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteShift = 0; byteShift = 0;
byteCount = 0; byteCount = 0;
@ -506,14 +509,14 @@ static u32 LZ77UnCompVram(armcpu_t* cpu)
return 1; return 1;
} }
static u32 LZ77UnCompWram(armcpu_t* cpu) TEMPLATE static u32 LZ77UnCompWram()
{ {
int i1, i2; int i1, i2;
int len; int len;
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = _MMU_read32[cpu->proc_ID]( source); u32 header = _MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -523,7 +526,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = _MMU_read08[cpu->proc_ID]( source++); u8 d = _MMU_read08(cpu->proc_ID, source++);
if(d) { if(d) {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
@ -531,19 +534,19 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
int length; int length;
int offset; int offset;
u32 windowOffset; u32 windowOffset;
u16 data = _MMU_read08[cpu->proc_ID]( source++) << 8; u16 data = _MMU_read08(cpu->proc_ID, source++) << 8;
data |= _MMU_read08[cpu->proc_ID]( source++); data |= _MMU_read08(cpu->proc_ID, source++);
length = (data >> 12) + 3; length = (data >> 12) + 3;
offset = (data & 0x0FFF); offset = (data & 0x0FFF);
windowOffset = dest - offset - 1; windowOffset = dest - offset - 1;
for(i2 = 0; i2 < length; i2++) { for(i2 = 0; i2 < length; i2++) {
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( windowOffset++)); _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID, windowOffset++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
} }
} else { } else {
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++)); _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID,source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -552,7 +555,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
} }
} else { } else {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++)); _MMU_write08(cpu->proc_ID,dest++, _MMU_read08(cpu->proc_ID, source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -562,7 +565,7 @@ static u32 LZ77UnCompWram(armcpu_t* cpu)
return 1; return 1;
} }
static u32 RLUnCompVram(armcpu_t* cpu) TEMPLATE static u32 RLUnCompVram()
{ {
int i; int i;
int len; int len;
@ -572,7 +575,7 @@ static u32 RLUnCompVram(armcpu_t* cpu)
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = _MMU_read32[cpu->proc_ID]( source); u32 header = _MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -585,10 +588,10 @@ static u32 RLUnCompVram(armcpu_t* cpu)
writeValue = 0; writeValue = 0;
while(len > 0) { while(len > 0) {
u8 d = _MMU_read08[cpu->proc_ID]( source++); u8 d = _MMU_read08(cpu->proc_ID, source++);
int l = d & 0x7F; int l = d & 0x7F;
if(d & 0x80) { if(d & 0x80) {
u8 data = _MMU_read08[cpu->proc_ID]( source++); u8 data = _MMU_read08(cpu->proc_ID, source++);
l += 3; l += 3;
for(i = 0;i < l; i++) { for(i = 0;i < l; i++) {
writeValue |= (data << byteShift); writeValue |= (data << byteShift);
@ -596,7 +599,7 @@ static u32 RLUnCompVram(armcpu_t* cpu)
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
_MMU_write16[cpu->proc_ID]( dest, writeValue); _MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -609,11 +612,11 @@ static u32 RLUnCompVram(armcpu_t* cpu)
} else { } else {
l++; l++;
for(i = 0; i < l; i++) { for(i = 0; i < l; i++) {
writeValue |= (_MMU_read08[cpu->proc_ID]( source++) << byteShift); writeValue |= (_MMU_read08(cpu->proc_ID, source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
_MMU_write16[cpu->proc_ID]( dest, writeValue); _MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -628,14 +631,14 @@ static u32 RLUnCompVram(armcpu_t* cpu)
return 1; return 1;
} }
static u32 RLUnCompWram(armcpu_t* cpu) TEMPLATE static u32 RLUnCompWram()
{ {
int i; int i;
int len; int len;
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = _MMU_read32[cpu->proc_ID]( source); u32 header = _MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -645,13 +648,13 @@ static u32 RLUnCompWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = _MMU_read08[cpu->proc_ID]( source++); u8 d = _MMU_read08(cpu->proc_ID, source++);
int l = d & 0x7F; int l = d & 0x7F;
if(d & 0x80) { if(d & 0x80) {
u8 data = _MMU_read08[cpu->proc_ID]( source++); u8 data = _MMU_read08(cpu->proc_ID, source++);
l += 3; l += 3;
for(i = 0;i < l; i++) { for(i = 0;i < l; i++) {
_MMU_write08[cpu->proc_ID]( dest++, data); _MMU_write08(cpu->proc_ID,dest++, data);
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -659,7 +662,7 @@ static u32 RLUnCompWram(armcpu_t* cpu)
} else { } else {
l++; l++;
for(i = 0; i < l; i++) { for(i = 0; i < l; i++) {
_MMU_write08[cpu->proc_ID]( dest++, _MMU_read08[cpu->proc_ID]( source++)); _MMU_write08(cpu->proc_ID, dest++, _MMU_read08(cpu->proc_ID,source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -669,7 +672,7 @@ static u32 RLUnCompWram(armcpu_t* cpu)
return 1; return 1;
} }
static u32 UnCompHuffman(armcpu_t* cpu) TEMPLATE static u32 UnCompHuffman()
{ {
u32 source, dest, writeValue, header, treeStart, mask; u32 source, dest, writeValue, header, treeStart, mask;
u32 data; u32 data;
@ -680,14 +683,14 @@ static u32 UnCompHuffman(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = _MMU_read08[cpu->proc_ID]( source); header = _MMU_read08(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0) ((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0)
return 0; return 0;
treeSize = _MMU_read08[cpu->proc_ID]( source++); treeSize = _MMU_read08(cpu->proc_ID,source++);
treeStart = source; treeStart = source;
@ -696,11 +699,11 @@ static u32 UnCompHuffman(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
mask = 0x80000000; mask = 0x80000000;
data = _MMU_read08[cpu->proc_ID]( source); data = _MMU_read08(cpu->proc_ID,source);
source += 4; source += 4;
pos = 0; pos = 0;
rootNode = _MMU_read08[cpu->proc_ID]( treeStart); rootNode = _MMU_read08(cpu->proc_ID,treeStart);
currentNode = rootNode; currentNode = rootNode;
writeData = 0; writeData = 0;
byteShift = 0; byteShift = 0;
@ -719,12 +722,12 @@ static u32 UnCompHuffman(armcpu_t* cpu)
// right // right
if(currentNode & 0x40) if(currentNode & 0x40)
writeData = 1; writeData = 1;
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos+1); currentNode = _MMU_read08(cpu->proc_ID,treeStart+pos+1);
} else { } else {
// left // left
if(currentNode & 0x80) if(currentNode & 0x80)
writeData = 1; writeData = 1;
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos); currentNode = _MMU_read08(cpu->proc_ID,treeStart+pos);
} }
if(writeData) { if(writeData) {
@ -739,7 +742,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
if(byteCount == 4) { if(byteCount == 4) {
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
_MMU_write08[cpu->proc_ID]( dest, writeValue); _MMU_write08(cpu->proc_ID, dest, writeValue);
writeValue = 0; writeValue = 0;
dest += 4; dest += 4;
len -= 4; len -= 4;
@ -748,7 +751,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
mask >>= 1; mask >>= 1;
if(mask == 0) { if(mask == 0) {
mask = 0x80000000; mask = 0x80000000;
data = _MMU_read08[cpu->proc_ID]( source); data = _MMU_read08(cpu->proc_ID,source);
source += 4; source += 4;
} }
} }
@ -766,12 +769,12 @@ static u32 UnCompHuffman(armcpu_t* cpu)
// right // right
if(currentNode & 0x40) if(currentNode & 0x40)
writeData = 1; writeData = 1;
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos+1); currentNode = _MMU_read08(cpu->proc_ID, treeStart+pos+1);
} else { } else {
// left // left
if(currentNode & 0x80) if(currentNode & 0x80)
writeData = 1; writeData = 1;
currentNode = _MMU_read08[cpu->proc_ID]( treeStart+pos); currentNode = _MMU_read08(cpu->proc_ID, treeStart+pos);
} }
if(writeData) { if(writeData) {
@ -792,7 +795,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
if(byteCount == 4) { if(byteCount == 4) {
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
_MMU_write08[cpu->proc_ID]( dest, writeValue); _MMU_write08(cpu->proc_ID,dest, writeValue);
dest += 4; dest += 4;
writeValue = 0; writeValue = 0;
len -= 4; len -= 4;
@ -805,7 +808,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
mask >>= 1; mask >>= 1;
if(mask == 0) { if(mask == 0) {
mask = 0x80000000; mask = 0x80000000;
data = _MMU_read08[cpu->proc_ID]( source); data = _MMU_read08(cpu->proc_ID, source);
source += 4; source += 4;
} }
} }
@ -813,7 +816,7 @@ static u32 UnCompHuffman(armcpu_t* cpu)
return 1; return 1;
} }
static u32 BitUnPack(armcpu_t* cpu) TEMPLATE static u32 BitUnPack()
{ {
u32 source,dest,header,base,d,temp; u32 source,dest,header,base,d,temp;
int len,bits,revbits,dataSize,data,bitwritecount,mask,bitcount,addBase; int len,bits,revbits,dataSize,data,bitwritecount,mask,bitcount,addBase;
@ -823,15 +826,15 @@ static u32 BitUnPack(armcpu_t* cpu)
dest = cpu->R[1]; dest = cpu->R[1];
header = cpu->R[2]; header = cpu->R[2];
len = _MMU_read16[cpu->proc_ID]( header); len = _MMU_read16(cpu->proc_ID, header);
// check address // check address
bits = _MMU_read08[cpu->proc_ID]( header+2); bits = _MMU_read08(cpu->proc_ID, header+2);
revbits = 8 - bits; revbits = 8 - bits;
// u32 value = 0; // u32 value = 0;
base = _MMU_read08[cpu->proc_ID]( header+4); base = _MMU_read08(cpu->proc_ID, header+4);
addBase = (base & 0x80000000) ? 1 : 0; addBase = (base & 0x80000000) ? 1 : 0;
base &= 0x7fffffff; base &= 0x7fffffff;
dataSize = _MMU_read08[cpu->proc_ID]( header+3); dataSize = _MMU_read08(cpu->proc_ID, header+3);
data = 0; data = 0;
bitwritecount = 0; bitwritecount = 0;
@ -840,7 +843,7 @@ static u32 BitUnPack(armcpu_t* cpu)
if(len < 0) if(len < 0)
break; break;
mask = 0xff >> revbits; mask = 0xff >> revbits;
b = _MMU_read08[cpu->proc_ID]( source); b = _MMU_read08(cpu->proc_ID, source);
source++; source++;
bitcount = 0; bitcount = 0;
while(1) { while(1) {
@ -854,7 +857,7 @@ static u32 BitUnPack(armcpu_t* cpu)
data |= temp << bitwritecount; data |= temp << bitwritecount;
bitwritecount += dataSize; bitwritecount += dataSize;
if(bitwritecount >= 32) { if(bitwritecount >= 32) {
_MMU_write08[cpu->proc_ID]( dest, data); _MMU_write08(cpu->proc_ID,dest, data);
dest += 4; dest += 4;
data = 0; data = 0;
bitwritecount = 0; bitwritecount = 0;
@ -866,7 +869,7 @@ static u32 BitUnPack(armcpu_t* cpu)
return 1; return 1;
} }
static u32 Diff8bitUnFilterWram(armcpu_t* cpu) TEMPLATE static u32 Diff8bitUnFilterWram()
{ {
u32 source,dest,header; u32 source,dest,header;
u8 data,diff; u8 data,diff;
@ -875,7 +878,7 @@ static u32 Diff8bitUnFilterWram(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = _MMU_read08[cpu->proc_ID]( source); header = _MMU_read08(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -884,20 +887,20 @@ static u32 Diff8bitUnFilterWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
data = _MMU_read08[cpu->proc_ID]( source++); data = _MMU_read08(cpu->proc_ID, source++);
_MMU_write08[cpu->proc_ID]( dest++, data); _MMU_write08(cpu->proc_ID, dest++, data);
len--; len--;
while(len > 0) { while(len > 0) {
diff = _MMU_read08[cpu->proc_ID]( source++); diff = _MMU_read08(cpu->proc_ID,source++);
data += diff; data += diff;
_MMU_write08[cpu->proc_ID]( dest++, data); _MMU_write08(cpu->proc_ID, dest++, data);
len--; len--;
} }
return 1; return 1;
} }
static u32 Diff16bitUnFilter(armcpu_t* cpu) TEMPLATE static u32 Diff16bitUnFilter()
{ {
u32 source,dest,header; u32 source,dest,header;
u16 data; u16 data;
@ -906,7 +909,7 @@ static u32 Diff16bitUnFilter(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = _MMU_read08[cpu->proc_ID]( source); header = _MMU_read08(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -915,54 +918,54 @@ static u32 Diff16bitUnFilter(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
data = _MMU_read16[cpu->proc_ID]( source); data = _MMU_read16(cpu->proc_ID,source);
source += 2; source += 2;
_MMU_write16[cpu->proc_ID]( dest, data); _MMU_write16(cpu->proc_ID, dest, data);
dest += 2; dest += 2;
len -= 2; len -= 2;
while(len >= 2) { while(len >= 2) {
u16 diff = _MMU_read16[cpu->proc_ID]( source); u16 diff = _MMU_read16(cpu->proc_ID, source);
source += 2; source += 2;
data += diff; data += diff;
_MMU_write16[cpu->proc_ID]( dest, data); _MMU_write16(cpu->proc_ID,dest, data);
dest += 2; dest += 2;
len -= 2; len -= 2;
} }
return 1; return 1;
} }
static u32 bios_sqrt(armcpu_t* cpu) TEMPLATE static u32 bios_sqrt()
{ {
cpu->R[0] = (u32)sqrt((double)(cpu->R[0])); cpu->R[0] = (u32)sqrt((double)(cpu->R[0]));
return 1; return 1;
} }
static u32 setHaltCR(armcpu_t* cpu) TEMPLATE static u32 setHaltCR()
{ {
_MMU_write08[cpu->proc_ID]( 0x4000300+cpu->proc_ID, cpu->R[0]); _MMU_write08(cpu->proc_ID,0x4000300+cpu->proc_ID, cpu->R[0]);
return 1; return 1;
} }
static u32 getSineTab(armcpu_t* cpu) TEMPLATE static u32 getSineTab()
{ {
cpu->R[0] = getsinetbl[cpu->R[0]]; cpu->R[0] = getsinetbl[cpu->R[0]];
return 1; return 1;
} }
static u32 getPitchTab(armcpu_t* cpu) TEMPLATE static u32 getPitchTab()
{ {
cpu->R[0] = getpitchtbl[cpu->R[0]]; cpu->R[0] = getpitchtbl[cpu->R[0]];
return 1; return 1;
} }
static u32 getVolumeTab(armcpu_t* cpu) TEMPLATE static u32 getVolumeTab()
{ {
cpu->R[0] = getvoltbl[cpu->R[0]]; cpu->R[0] = getvoltbl[cpu->R[0]];
return 1; return 1;
} }
static u32 getCRC16(armcpu_t* cpu) TEMPLATE static u32 getCRC16()
{ {
unsigned int i,j; unsigned int i,j;
@ -973,7 +976,7 @@ static u32 getCRC16(armcpu_t* cpu)
static u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 }; static u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 };
for(i = 0; i < size; i++) for(i = 0; i < size; i++)
{ {
crc = crc ^ _MMU_read08[cpu->proc_ID]( datap + i); crc = crc ^ _MMU_read08(cpu->proc_ID, datap + i);
for(j = 0; j < 8; j++) { for(j = 0; j < 8; j++) {
int do_bit = 0; int do_bit = 0;
@ -992,7 +995,7 @@ static u32 getCRC16(armcpu_t* cpu)
return 1; return 1;
} }
static u32 SoundBias(armcpu_t* cpu) TEMPLATE static u32 SoundBias()
{ {
u32 current = SPU_ReadLong(0x4000504); u32 current = SPU_ReadLong(0x4000504);
if (cpu->R[0] > current) if (cpu->R[0] > current)
@ -1002,72 +1005,72 @@ static u32 SoundBias(armcpu_t* cpu)
return cpu->R[1]; return cpu->R[1];
} }
u32 (* ARM9_swi_tab[32])(armcpu_t* cpu)={ u32 (* ARM9_swi_tab[32])()={
bios_nop, // 0x00 bios_nop<ARMCPU_ARM9>, // 0x00
bios_nop, // 0x01 bios_nop<ARMCPU_ARM9>, // 0x01
bios_nop, // 0x02 bios_nop<ARMCPU_ARM9>, // 0x02
delayLoop, // 0x03 delayLoop<ARMCPU_ARM9>, // 0x03
intrWaitARM, // 0x04 intrWaitARM<ARMCPU_ARM9>, // 0x04
waitVBlankARM, // 0x05 waitVBlankARM<ARMCPU_ARM9>, // 0x05
wait4IRQ, // 0x06 wait4IRQ<ARMCPU_ARM9>, // 0x06
bios_nop, // 0x07 bios_nop<ARMCPU_ARM9>, // 0x07
bios_nop, // 0x08 bios_nop<ARMCPU_ARM9>, // 0x08
divide, // 0x09 divide<ARMCPU_ARM9>, // 0x09
bios_nop, // 0x0A bios_nop<ARMCPU_ARM9>, // 0x0A
copy, // 0x0B copy<ARMCPU_ARM9>, // 0x0B
fastCopy, // 0x0C fastCopy<ARMCPU_ARM9>, // 0x0C
bios_sqrt, // 0x0D bios_sqrt<ARMCPU_ARM9>, // 0x0D
getCRC16, // 0x0E getCRC16<ARMCPU_ARM9>, // 0x0E
bios_nop, // 0x0F bios_nop<ARMCPU_ARM9>, // 0x0F
BitUnPack, // 0x10 BitUnPack<ARMCPU_ARM9>, // 0x10
LZ77UnCompWram, // 0x11 LZ77UnCompWram<ARMCPU_ARM9>, // 0x11
LZ77UnCompVram, // 0x12 LZ77UnCompVram<ARMCPU_ARM9>, // 0x12
UnCompHuffman, // 0x13 UnCompHuffman<ARMCPU_ARM9>, // 0x13
RLUnCompWram, // 0x14 RLUnCompWram<ARMCPU_ARM9>, // 0x14
RLUnCompVram, // 0x15 RLUnCompVram<ARMCPU_ARM9>, // 0x15
Diff8bitUnFilterWram, // 0x16 Diff8bitUnFilterWram<ARMCPU_ARM9>, // 0x16
bios_nop, // 0x17 bios_nop<ARMCPU_ARM9>, // 0x17
Diff16bitUnFilter, // 0x18 Diff16bitUnFilter<ARMCPU_ARM9>, // 0x18
bios_nop, // 0x19 bios_nop<ARMCPU_ARM9>, // 0x19
bios_nop, // 0x1A bios_nop<ARMCPU_ARM9>, // 0x1A
bios_nop, // 0x1B bios_nop<ARMCPU_ARM9>, // 0x1B
bios_nop, // 0x1C bios_nop<ARMCPU_ARM9>, // 0x1C
bios_nop, // 0x1D bios_nop<ARMCPU_ARM9>, // 0x1D
bios_nop, // 0x1E bios_nop<ARMCPU_ARM9>, // 0x1E
setHaltCR, // 0x1F setHaltCR<ARMCPU_ARM9>, // 0x1F
}; };
u32 (* ARM7_swi_tab[32])(armcpu_t* cpu)={ u32 (* ARM7_swi_tab[32])()={
bios_nop, // 0x00 bios_nop<ARMCPU_ARM7>, // 0x00
bios_nop, // 0x01 bios_nop<ARMCPU_ARM7>, // 0x01
bios_nop, // 0x02 bios_nop<ARMCPU_ARM7>, // 0x02
delayLoop, // 0x03 delayLoop<ARMCPU_ARM7>, // 0x03
intrWaitARM, // 0x04 intrWaitARM<ARMCPU_ARM7>, // 0x04
waitVBlankARM, // 0x05 waitVBlankARM<ARMCPU_ARM7>, // 0x05
wait4IRQ, // 0x06 wait4IRQ<ARMCPU_ARM7>, // 0x06
wait4IRQ, // 0x07 wait4IRQ<ARMCPU_ARM7>, // 0x07
SoundBias, // 0x08 SoundBias<ARMCPU_ARM7>, // 0x08
divide, // 0x09 divide<ARMCPU_ARM7>, // 0x09
bios_nop, // 0x0A bios_nop<ARMCPU_ARM7>, // 0x0A
copy, // 0x0B copy<ARMCPU_ARM7>, // 0x0B
fastCopy, // 0x0C fastCopy<ARMCPU_ARM7>, // 0x0C
bios_sqrt, // 0x0D bios_sqrt<ARMCPU_ARM7>, // 0x0D
getCRC16, // 0x0E getCRC16<ARMCPU_ARM7>, // 0x0E
bios_nop, // 0x0F bios_nop<ARMCPU_ARM7>, // 0x0F
BitUnPack, // 0x10 BitUnPack<ARMCPU_ARM7>, // 0x10
LZ77UnCompWram, // 0x11 LZ77UnCompWram<ARMCPU_ARM7>, // 0x11
LZ77UnCompVram, // 0x12 LZ77UnCompVram<ARMCPU_ARM7>, // 0x12
UnCompHuffman, // 0x13 UnCompHuffman<ARMCPU_ARM7>, // 0x13
RLUnCompWram, // 0x14 RLUnCompWram<ARMCPU_ARM7>, // 0x14
RLUnCompVram, // 0x15 RLUnCompVram<ARMCPU_ARM7>, // 0x15
Diff8bitUnFilterWram, // 0x16 Diff8bitUnFilterWram<ARMCPU_ARM7>, // 0x16
bios_nop, // 0x17 bios_nop<ARMCPU_ARM7>, // 0x17
bios_nop, // 0x18 bios_nop<ARMCPU_ARM7>, // 0x18
bios_nop, // 0x19 bios_nop<ARMCPU_ARM7>, // 0x19
getSineTab, // 0x1A getSineTab<ARMCPU_ARM7>, // 0x1A
getPitchTab, // 0x1B getPitchTab<ARMCPU_ARM7>, // 0x1B
getVolumeTab, // 0x1C getVolumeTab<ARMCPU_ARM7>, // 0x1C
bios_nop, // 0x1D bios_nop<ARMCPU_ARM7>, // 0x1D
bios_nop, // 0x1E bios_nop<ARMCPU_ARM7>, // 0x1E
setHaltCR, // 0x1F setHaltCR<ARMCPU_ARM7>, // 0x1F
}; };

4
desmume/src/bios.h
View File

@ -24,8 +24,8 @@
#include "armcpu.h" #include "armcpu.h"
extern u32 (* ARM9_swi_tab[32])(armcpu_t * cpu); extern u32 (* ARM9_swi_tab[32])();
extern u32 (* ARM7_swi_tab[32])(armcpu_t * cpu); extern u32 (* ARM7_swi_tab[32])();
#endif #endif

1682
desmume/src/saves.cpp
View File

File diff suppressed because it is too large Load Diff

12
desmume/src/thumb_instructions.cpp
View File

@ -875,22 +875,22 @@ TEMPLATE static u32 FASTCALL OP_B_COND()
TEMPLATE static u32 FASTCALL OP_SWI_THUMB() TEMPLATE static u32 FASTCALL OP_SWI_THUMB()
{ {
if(cpu->swi_tab) { if(cpu->swi_tab) {
//zero 25-dec-2008 - in arm, we were masking to 0x1F. //zero 25-dec-2008 - in arm, we were masking to 0x1F.
//this is probably safer since an invalid opcode could crash the emu //this is probably safer since an invalid opcode could crash the emu
//u32 swinum = cpu->instruction & 0xFF; //u32 swinum = cpu->instruction & 0xFF;
u32 swinum = cpu->instruction & 0x1F; u32 swinum = cpu->instruction & 0x1F;
return cpu->swi_tab[swinum](cpu) + 3; return cpu->swi_tab[swinum]() + 3;
} }
else { else {
/* we use an irq thats not in the irq tab, as /* we use an irq thats not in the irq tab, as
it was replaced duie to a changed intVector */ it was replaced duie to a changed intVector */
Status_Reg tmp = cpu->CPSR; Status_Reg tmp = cpu->CPSR;
armcpu_switchMode(cpu, SVC); /* enter svc mode */ armcpu_switchMode(cpu, SVC); /* enter svc mode */
cpu->R[14] = cpu->next_instruction; /* jump to swi Vector */ cpu->R[14] = cpu->next_instruction; /* jump to swi Vector */
cpu->SPSR = tmp; /* save old CPSR as new SPSR */ cpu->SPSR = tmp; /* save old CPSR as new SPSR */
cpu->CPSR.bits.T = 0; /* handle as ARM32 code */ cpu->CPSR.bits.T = 0; /* handle as ARM32 code */
cpu->CPSR.bits.I = 1; cpu->CPSR.bits.I = 1;
cpu->R[15] = cpu->intVector + 0x08; cpu->R[15] = cpu->intVector + 0x08;
cpu->next_instruction = cpu->R[15]; cpu->next_instruction = cpu->R[15];
return 3; return 3;