parent
e3276828f6
commit
b438ec39b7
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@ -218,8 +218,6 @@ void armcpu_init(armcpu_t *armcpu, u32 adr)
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armcpu->waitIRQ = FALSE;
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armcpu->wirq = FALSE;
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armcpu->newIrqFlags = 0;
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#ifdef GDB_STUB
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armcpu->irq_flag = 0;
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#endif
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@ -175,8 +175,6 @@ typedef struct armcpu_t
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BOOL wIRQ;
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BOOL wirq;
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u32 newIrqFlags;
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u32 (* *swi_tab)();
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#ifdef GDB_STUB
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@ -224,8 +222,6 @@ static INLINE void setIF(int PROCNUM, u32 flag)
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{
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MMU.reg_IF[PROCNUM] |= flag;
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if(ARMPROC.waitIRQ)
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ARMPROC.newIrqFlags |= flag;
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extern void NDS_Reschedule();
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NDS_Reschedule();
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}
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@ -216,49 +216,40 @@ TEMPLATE static u32 WaitByLoop()
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TEMPLATE u32 intrWaitARM()
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{
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u32 intrFlagAdr = 0;
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u32 intr = 0;
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u32 intrFlag = 0;
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u32 intrFlagAdr = 0;
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u32 intr = 0;
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u32 intrFlag = 0;
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BOOL noDiscard = ((cpu->R[0] == 0) && (PROCNUM == ARMCPU_ARM7));
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//emu_halt();
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if(PROCNUM == ARMCPU_ARM7)
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{
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intrFlagAdr = 0x380FFF8;
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} else {
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intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
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}
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intr = _MMU_read32<PROCNUM>(intrFlagAdr);
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intrFlag = (cpu->R[1] & intr);
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//INFO("ARM%c: wait for IRQ r0=0x%02X, r1=0x%08X - 0x%08X (flag 0x%08X)\n", PROCNUM?'7':'9', cpu->R[0], cpu->R[1], intr, intrFlag);
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if(!noDiscard)
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intrFlag &= cpu->newIrqFlags;
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//BOOL noDiscard = ((cpu->R[0] == 0) && (PROCNUM == ARMCPU_ARM7));
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// http://nocash.emubase.de/gbatek.htm#bioshaltfunctions
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// SWI 04h (GBA/NDS7/NDS9) - IntrWait
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// ... The function forcefully sets IME=1. ...
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_MMU_write32<PROCNUM>(0x04000208, 1);
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if(PROCNUM == ARMCPU_ARM7)
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intrFlagAdr = 0x380FFF8;
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else
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intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
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if(intrFlag)
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{
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// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
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// on efface son(les) occurence(s).
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intr ^= intrFlag;
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cpu->newIrqFlags ^= intrFlag;
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_MMU_write32<PROCNUM>(intrFlagAdr, intr);
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//cpu->switchMode(oldmode[cpu->proc_ID]);
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return 1;
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}
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u32 instructAddr = cpu->instruct_adr;
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cpu->R[15] = instructAddr;
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cpu->next_instruction = instructAddr;
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cpu->waitIRQ = 1;
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//oldmode[cpu->proc_ID] = cpu->switchMode(SVC);
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intr = _MMU_read32<PROCNUM>(intrFlagAdr);
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intrFlag = (cpu->R[1] & intr);
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return 1;
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//INFO("ARM%c: wait for IRQ r0=0x%02X, r1=0x%08X - 0x%08X (flag 0x%08X)\n", PROCNUM?'7':'9', cpu->R[0], cpu->R[1], intr, intrFlag);
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//if(!noDiscard)
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// intrFlag &= cpu->newIrqFlags;
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_MMU_write32<PROCNUM>(0x04000208, 1); // set IME=1
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if (intrFlag)
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{
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intr ^= intrFlag;
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if (intr)
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_MMU_write32<PROCNUM>(intrFlagAdr, intr);
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return wait4IRQ<PROCNUM>();
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}
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u32 instructAddr = cpu->instruct_adr;
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cpu->R[15] = instructAddr;
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cpu->next_instruction = instructAddr;
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cpu->waitIRQ = 1;
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cpu->wirq = 1;
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return 1;
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}
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TEMPLATE static u32 waitVBlankARM()
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@ -103,7 +103,6 @@ SFORMAT SF_ARM7[]={
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{ "7Wai", 4, 1, &NDS_ARM7.waitIRQ },
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{ "7wIR", 4, 1, &NDS_ARM7.wIRQ, },
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{ "7wir", 4, 1, &NDS_ARM7.wirq, },
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{ "7NIF", 4, 1, &NDS_ARM7.newIrqFlags},
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{ 0 }
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};
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@ -141,7 +140,6 @@ SFORMAT SF_ARM9[]={
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{ "9Wai", 4, 1, &NDS_ARM9.waitIRQ},
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{ "9wIR", 4, 1, &NDS_ARM9.wIRQ},
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{ "9wir", 4, 1, &NDS_ARM9.wirq},
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{ "9NIF", 4, 1, &NDS_ARM9.newIrqFlags},
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{ 0 }
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};
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