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Added emulation for 16bit writes to REG_GCROMCTRL. 

Reset slot1_device in NDS_Reset.
This commit is contained in:
normmatt234 2011-01-13 04:35:11 +00:00
parent 1d2ceefbe9
commit b14e6f01df
2 changed files with 17 additions and 1 deletions
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13
desmume/src/MMU.cpp
View File

@ -2713,6 +2713,13 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val)
DISP_FIFOsend(val);
return;
}
case REG_GCROMCTRL :
MMU_writeToGCControl<ARMCPU_ARM9>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
return;
case REG_GCROMCTRL+2 :
MMU_writeToGCControl<ARMCPU_ARM9>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | ((u32) val << 16));
return;
}
T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][adr>>20], adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val);
@ -3937,6 +3944,12 @@ void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val)
return;
}
case REG_GCROMCTRL :
MMU_writeToGCControl<ARMCPU_ARM7>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
return;
case REG_GCROMCTRL+2 :
MMU_writeToGCControl<ARMCPU_ARM7>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | ((u32) val << 16));
return;
}
T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][adr>>20], adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val);

3
desmume/src/NDSSystem.cpp
View File

@ -38,6 +38,7 @@
#include "debug.h"
#include "firmware.h"
#include "version.h"
#include "slot1.h"
#include "path.h"
@ -1866,6 +1867,7 @@ static /*donotinline*/ std::pair<s32,s32> armInnerLoop(
if(!NDS_ARM9.waitIRQ&&!nds.freezeBus)
{
arm9log();
debug();
arm9 += armcpu_exec<ARMCPU_ARM9>();
#ifdef DEVELOPER
nds_debug_continuing[0] = false;
@ -2468,6 +2470,7 @@ void NDS_Reset()
Screen_Reset();
gfx3d_reset();
gpu3D->NDS_3D_Reset();
slot1Reset();
WIFI_Reset();