Added emulation for 16bit writes to REG_GCROMCTRL.
Reset slot1_device in NDS_Reset.
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@ -2713,6 +2713,13 @@ void FASTCALL _MMU_ARM9_write16(u32 adr, u16 val)
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DISP_FIFOsend(val);
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return;
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}
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case REG_GCROMCTRL :
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MMU_writeToGCControl<ARMCPU_ARM9>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
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return;
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case REG_GCROMCTRL+2 :
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MMU_writeToGCControl<ARMCPU_ARM9>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | ((u32) val << 16));
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return;
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}
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM9][adr>>20], adr&MMU.MMU_MASK[ARMCPU_ARM9][adr>>20], val);
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@ -3936,7 +3943,13 @@ void FASTCALL _MMU_ARM7_write16(u32 adr, u16 val)
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write_timer(ARMCPU_ARM7, timerIndex, val);
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return;
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}
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case REG_GCROMCTRL :
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MMU_writeToGCControl<ARMCPU_ARM7>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
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return;
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case REG_GCROMCTRL+2 :
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MMU_writeToGCControl<ARMCPU_ARM7>( (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | ((u32) val << 16));
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return;
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}
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T1WriteWord(MMU.MMU_MEM[ARMCPU_ARM7][adr>>20], adr&MMU.MMU_MASK[ARMCPU_ARM7][adr>>20], val);
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@ -38,6 +38,7 @@
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#include "debug.h"
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#include "firmware.h"
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#include "version.h"
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#include "slot1.h"
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#include "path.h"
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@ -1866,6 +1867,7 @@ static /*donotinline*/ std::pair<s32,s32> armInnerLoop(
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if(!NDS_ARM9.waitIRQ&&!nds.freezeBus)
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{
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arm9log();
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debug();
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arm9 += armcpu_exec<ARMCPU_ARM9>();
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#ifdef DEVELOPER
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nds_debug_continuing[0] = false;
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@ -2468,6 +2470,7 @@ void NDS_Reset()
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Screen_Reset();
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gfx3d_reset();
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gpu3D->NDS_3D_Reset();
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slot1Reset();
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WIFI_Reset();
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