GPU: Fix pixel alignment bug when the framebuffer is 3x sized, running on an SSE2 system. (Regression from commit 062c0ad.)

This commit is contained in:
rogerman 2017-07-31 06:56:16 -07:00
parent c0a2193290
commit aead3f4109
1 changed files with 1 additions and 1 deletions

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@ -236,7 +236,7 @@ static FORCEINLINE void CopyLineExpand_SSE2(void *__restrict dst, const void *__
if (ELEMENTSIZE == 2) if (ELEMENTSIZE == 2)
{ {
const __m128i src16 = _mm_load_si128((__m128i *)((u16 *)src + srcX)); const __m128i src16 = _mm_load_si128((__m128i *)((u16 *)src + srcX));
const __m128i src16lo = _mm_shuffle_epi32(src16, 0x88); const __m128i src16lo = _mm_shuffle_epi32(src16, 0x44);
const __m128i src16hi = _mm_shuffle_epi32(src16, 0xEE); const __m128i src16hi = _mm_shuffle_epi32(src16, 0xEE);
const __m128i src16out[3] = { _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16lo, 0x40), 0xA5), _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16, 0xFE), 0x40), _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16hi, 0xA5), 0xFE) }; const __m128i src16out[3] = { _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16lo, 0x40), 0xA5), _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16, 0xFE), 0x40), _mm_shufflehi_epi16(_mm_shufflelo_epi16(src16hi, 0xA5), 0xFE) };