emulate firmware command 0x9F (read ID) and update test
This commit is contained in:
parent
e1901a2f08
commit
a199a91f47
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@ -1,6 +1,6 @@
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/* Copyright (C) 2006 thoduv
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Copyright (C) 2006-2007 Theo Berkau
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Copyright (C) 2008-2009 DeSmuME team
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Copyright (C) 2008-2010 DeSmuME team
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This file is part of DeSmuME
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@ -35,21 +35,22 @@
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#include <xtl.h> // it`s really need?
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#endif
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#define FW_CMD_READ 0x3
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#define FW_CMD_WRITEDISABLE 0x4
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#define FW_CMD_READSTATUS 0x5
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#define FW_CMD_WRITEENABLE 0x6
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#define FW_CMD_PAGEWRITE 0xA
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#define FW_CMD_READ 0x03
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#define FW_CMD_WRITEDISABLE 0x04
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#define FW_CMD_READSTATUS 0x05
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#define FW_CMD_WRITEENABLE 0x06
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#define FW_CMD_PAGEWRITE 0x0A
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#define FW_CMD_READ_ID 0x9F
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#define BM_CMD_AUTODETECT 0xFF
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#define BM_CMD_WRITESTATUS 0x1
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#define BM_CMD_WRITELOW 0x2
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#define BM_CMD_READLOW 0x3
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#define BM_CMD_WRITEDISABLE 0x4
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#define BM_CMD_READSTATUS 0x5
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#define BM_CMD_WRITEENABLE 0x6
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#define BM_CMD_WRITEHIGH 0xA
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#define BM_CMD_READHIGH 0xB
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#define BM_CMD_WRITESTATUS 0x01
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#define BM_CMD_WRITELOW 0x02
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#define BM_CMD_READLOW 0x03
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#define BM_CMD_WRITEDISABLE 0x04
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#define BM_CMD_READSTATUS 0x05
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#define BM_CMD_WRITEENABLE 0x06
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#define BM_CMD_WRITEHIGH 0x0A
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#define BM_CMD_READHIGH 0x0B
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/* FLASH*/
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#define COMM_PAGE_WRITE 0x0A
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@ -228,31 +229,57 @@ u8 fw_transfer(memory_chip_t *mc, u8 data)
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}
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}
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else if(mc->com == FW_CMD_READ_ID)
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{
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switch(mc->addr)
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{
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//here is an ID string measured from an old ds fat: 62 16 00 (0x62=sanyo)
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//but we chose to use an ST from martin's ds fat string so programs might have a clue as to the firmware size:
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//20 40 12
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case 0:
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data = 0x20;
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mc->addr=1;
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break;
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case 1:
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data = 0x40; //according to gbatek this is the device ID for the flash on someone's ds fat
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mc->addr=2;
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break;
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case 2:
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data = 0x12;
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mc->addr = 0;
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break;
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}
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}
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else if(mc->com == FW_CMD_READSTATUS)
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{
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return (mc->write_enable ? 0x02 : 0x00);
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}
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else /* finally, check if it's a new command */
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else //finally, check if it's a new command
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{
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switch(data)
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{
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case 0: break; /* nothing */
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case 0: break; //nothing
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case FW_CMD_READ_ID:
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mc->addr = 0;
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mc->com = FW_CMD_READ_ID;
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break;
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case FW_CMD_READ: /* read command */
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case FW_CMD_READ: //read command
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mc->addr = 0;
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mc->addr_shift = 3;
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mc->com = FW_CMD_READ;
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break;
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case FW_CMD_WRITEENABLE: /* enable writing */
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case FW_CMD_WRITEENABLE: //enable writing
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if(mc->writeable_buffer) { mc->write_enable = TRUE; }
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break;
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case FW_CMD_WRITEDISABLE: /* disable writing */
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case FW_CMD_WRITEDISABLE: //disable writing
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mc->write_enable = FALSE;
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break;
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case FW_CMD_PAGEWRITE: /* write command */
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case FW_CMD_PAGEWRITE: //write command
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if(mc->write_enable)
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{
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mc->addr = 0;
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@ -262,7 +289,7 @@ u8 fw_transfer(memory_chip_t *mc, u8 data)
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else { data = 0; }
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break;
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case FW_CMD_READSTATUS: /* status register command */
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case FW_CMD_READSTATUS: //status register command
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mc->com = FW_CMD_READSTATUS;
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break;
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@ -1,6 +1,6 @@
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/* Copyright (C) 2006 thoduv
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Copyright (C) 2006 Theo Berkau
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Copyright (C) 2008-2009 DeSmuME team
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Copyright (C) 2008-2010 DeSmuME team
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This file is part of DeSmuME
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@ -50,24 +50,24 @@
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#define MC_SIZE_256MBITS 0x2000000
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#define MC_SIZE_512MBITS 0x4000000
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typedef struct
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struct memory_chip_t
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{
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u8 com; /* persistent command actually handled */
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u32 addr; /* current address for reading/writing */
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u8 addr_shift; /* shift for address (since addresses are transfered by 3 bytes units) */
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u8 addr_size; /* size of addr when writing/reading */
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BOOL write_enable; /* is write enabled ? */
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u8 *data; /* memory data */
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u32 size; /* memory size */
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BOOL writeable_buffer; /* is "data" writeable ? */
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int type; /* type of Memory */
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char *filename;
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FILE *fp;
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u8 autodetectbuf[32768];
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int autodetectsize;
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} memory_chip_t;
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u8 com; //persistent command actually handled
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u32 addr; //current address for reading/writing
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u8 addr_shift; //shift for address (since addresses are transfered by 3 bytes units)
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u8 addr_size; //size of addr when writing/reading
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BOOL write_enable; //is write enabled ?
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u8 *data; //memory data
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u32 size; //memory size
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BOOL writeable_buffer; //is "data" writeable ?
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int type; //type of Memory
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char *filename;
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FILE *fp;
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u8 autodetectbuf[32768];
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int autodetectsize;
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};
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//the new backup system by zeromus
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class BackupDevice
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@ -1,122 +1,162 @@
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/*---------------------------------------------------------------------------------
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once upon a time, this was: default ARM7 core
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Copyright (C) 2005
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Michael Noland (joat)
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Jason Rogers (dovoto)
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Dave Murphy (WinterMute)
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any
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damages arising from the use of this software.
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Permission is granted to anyone to use this software for any
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purpose, including commercial applications, and to alter it and
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redistribute it freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you
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must not claim that you wrote the original software. If you use
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this software in a product, an acknowledgment in the product
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documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and
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must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source
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distribution.
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---------------------------------------------------------------------------------*/
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#include <nds.h>
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#include <dswifi7.h>
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#include <maxmod7.h>
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#include "../../regstest.h"
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/*---------------------------------------------------------------------------------
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once upon a time, this was: default ARM7 core
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Copyright (C) 2005
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Michael Noland (joat)
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Jason Rogers (dovoto)
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Dave Murphy (WinterMute)
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any
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damages arising from the use of this software.
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Permission is granted to anyone to use this software for any
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purpose, including commercial applications, and to alter it and
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redistribute it freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you
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must not claim that you wrote the original software. If you use
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this software in a product, an acknowledgment in the product
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documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and
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must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source
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distribution.
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---------------------------------------------------------------------------------*/
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#include <nds.h>
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#include <dswifi7.h>
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#include <maxmod7.h>
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#include "../../regstest.h"
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#include <nds/arm7/serial.h>
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arm7comm_t *arm7comm;
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//---------------------------------------------------------------------------------
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void VcountHandler() {
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//---------------------------------------------------------------------------------
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inputGetAndSend();
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}
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//---------------------------------------------------------------------------------
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void VblankHandler(void) {
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//---------------------------------------------------------------------------------
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Wifi_Update();
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}
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void pokeMessage(const char* msg)
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{
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const char* cp = msg;
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int i=0;
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while(*cp)
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arm7comm->message[i++] = *cp++;
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arm7comm->message[i] = 0;
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}
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void fail(const char* msg, u32 offender=0)
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{
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arm7comm->code = 1;
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arm7comm->offender = offender;
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pokeMessage(msg);
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fifoSendValue32(FIFO_USER_01,0);
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while (1) swiWaitForVBlank();
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}
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//---------------------------------------------------------------------------------
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int main() {
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//---------------------------------------------------------------------------------
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irqInit();
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fifoInit();
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// read User Settings from firmware
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readUserSettings();
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// Start the RTC tracking IRQ
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initClockIRQ();
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SetYtrigger(80);
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installWifiFIFO();
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installSoundFIFO();
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mmInstall(FIFO_MAXMOD);
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installSystemFIFO();
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irqSet(IRQ_VCOUNT, VcountHandler);
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irqSet(IRQ_VBLANK, VblankHandler);
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irqEnable( IRQ_VBLANK | IRQ_VCOUNT | IRQ_NETWORK);
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//find out where the arm9 wants us to stash our info
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while(!fifoCheckAddress(FIFO_USER_01)) swiWaitForVBlank();
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arm7comm = (arm7comm_t*)fifoGetAddress(FIFO_USER_01);
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//spu source reg should only be 27bit
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//but it is not readable so what does it matter
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for(int i=0;i<16;i++)
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{
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vu32* reg = (vu32*)(0x04000404 + (i<<4));
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*reg = 0xFFFFFFFF;
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//if(*reg != 0x07FFFFFF) fail("spu source reg is only 27bit.\nshould be 0x07FFFFFF",*reg);
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if(*reg != 0x00000000) fail("spu source reg is not readable!",*reg);
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}
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//spu length reg should only be 22bit
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for(int i=0;i<16;i++)
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{
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vu32* reg = (vu32*)(0x0400040C + (i<<4));
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*reg = 0xFFFFFFFF;
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//if(*reg != 0x003FFFFF) fail("spu length reg is only 22bit.\nshould be 0x003FFFFF",*reg);
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if(*reg != 0x00000000) fail("spu length reg is not readable!",*reg);
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}
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arm7comm->code = 2;
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fifoSendValue32(FIFO_USER_01,0);
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while (1) swiWaitForVBlank();
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}
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//---------------------------------------------------------------------------------
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void VcountHandler() {
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//---------------------------------------------------------------------------------
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inputGetAndSend();
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}
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//---------------------------------------------------------------------------------
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void VblankHandler(void) {
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//---------------------------------------------------------------------------------
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Wifi_Update();
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}
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//modified from: http://www.bottledlight.com/ds/index.php/Main/Firmware
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#define FW_READ_ID 0x9F
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#define FW_READ 0x03
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#define FW_READ_STATUS 0x05
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u32 getFirmwareType()
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{
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u32 result;
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// Get ID
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while (REG_SPICNT & SPI_BUSY);
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REG_SPICNT = SPI_ENABLE | SPI_CONTINUOUS | SPI_DEVICE_FIRMWARE;
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REG_SPIDATA = FW_READ_ID;
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while (REG_SPICNT & SPI_BUSY);
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result = 0;
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for (int i = 0; i < 3; i++) {
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REG_SPIDATA = 0;
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while (REG_SPICNT & SPI_BUSY);
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result = (REG_SPIDATA & 0xFF) | (result<<8);
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}
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// Get status
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//zeromus note: this is broken. not only does it put the byte in a different spot than the docs said it does,
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//it is coded otherwise glitchily and just returns bytes of the 3-Byte flash ID
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//(desmume shows five reads during the ID command; apparently this code fails to reset correctly)
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while (REG_SPICNT & SPI_BUSY);
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REG_SPICNT = SPI_ENABLE | SPI_CONTINUOUS | SPI_DEVICE_FIRMWARE;
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REG_SPIDATA = FW_READ_STATUS;
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while (REG_SPICNT & SPI_BUSY);
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REG_SPIDATA = 0;
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while (REG_SPICNT & SPI_BUSY);
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result = ((REG_SPIDATA & 0xFF) << 24) | result;
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return result;
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}
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void pokeMessage(const char* msg)
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{
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const char* cp = msg;
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int i=0;
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while(*cp)
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arm7comm->message[i++] = *cp++;
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arm7comm->message[i] = 0;
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}
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void fail(const char* msg, u32 offender=0)
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{
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arm7comm->code = 1;
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arm7comm->offender = offender;
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pokeMessage(msg);
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fifoSendValue32(FIFO_USER_01,0);
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while (1) swiWaitForVBlank();
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}
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//---------------------------------------------------------------------------------
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int main() {
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//---------------------------------------------------------------------------------
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irqInit();
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fifoInit();
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// read User Settings from firmware
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readUserSettings();
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// Start the RTC tracking IRQ
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initClockIRQ();
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SetYtrigger(80);
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installWifiFIFO();
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installSoundFIFO();
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mmInstall(FIFO_MAXMOD);
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installSystemFIFO();
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irqSet(IRQ_VCOUNT, VcountHandler);
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irqSet(IRQ_VBLANK, VblankHandler);
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irqEnable( IRQ_VBLANK | IRQ_VCOUNT | IRQ_NETWORK);
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//find out where the arm9 wants us to stash our info
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while(!fifoCheckAddress(FIFO_USER_01)) swiWaitForVBlank();
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arm7comm = (arm7comm_t*)fifoGetAddress(FIFO_USER_01);
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//spu source reg should only be 27bit
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//but it is not readable so what does it matter
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for(int i=0;i<16;i++)
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{
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vu32* reg = (vu32*)(0x04000404 + (i<<4));
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*reg = 0xFFFFFFFF;
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//if(*reg != 0x07FFFFFF) fail("spu source reg is only 27bit.\nshould be 0x07FFFFFF",*reg);
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if(*reg != 0x00000000) fail("spu source reg is not readable!",*reg);
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}
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//spu length reg should only be 22bit
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for(int i=0;i<16;i++)
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{
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vu32* reg = (vu32*)(0x0400040C + (i<<4));
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*reg = 0xFFFFFFFF;
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//if(*reg != 0x003FFFFF) fail("spu length reg is only 22bit.\nshould be 0x003FFFFF",*reg);
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if(*reg != 0x00000000) fail("spu length reg is not readable!",*reg);
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}
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arm7comm->firmwareId = getFirmwareType();
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arm7comm->code = 2;
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fifoSendValue32(FIFO_USER_01,0);
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while (1) swiWaitForVBlank();
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}
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@ -90,6 +90,7 @@ int main(void) {
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swiWaitForVBlank();
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}
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iprintf("firmwareID: %08X\n",arm7comm.firmwareId);
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iprintf("arm7 finish code: %d\n",arm7comm.code);
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if(arm7comm.code == 1)
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@ -1,8 +1,9 @@
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typedef struct _arm7comm_t
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struct arm7comm_t
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{
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int code;
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u32 offender;
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char message[1024];
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} arm7comm_t;
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u32 firmwareId;
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};
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//#define arm7comm ( (arm7comm_t*)0x02200000 )
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