core:
- some fixes sprites and background; - some others fixes; - some speedup; winport: - fixes textures in OGL; - some other fixes; Can yet something, I do not remember :)
This commit is contained in:
parent
9bca9c442f
commit
9ccd29f043
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@ -383,138 +383,6 @@ void GPU_setBGProp(GPU * gpu, u16 num, u16 p)
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gpu->BGSize[num][1] = sizeTab[mode][cnt->ScreenSize][1];
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}
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void GPU_setWIN0_H0 (GPU *gpu, u8 val)
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{
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gpu->WIN0H0 = val;
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}
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void GPU_setWIN0_H1 (GPU *gpu, u8 val)
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{
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gpu->WIN0H1 = val;
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}
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void GPU_setWIN0_V0 (GPU *gpu, u8 val)
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{
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gpu->WIN0V0 = val;
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}
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void GPU_setWIN0_V1 (GPU *gpu, u8 val)
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{
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gpu->WIN0V1 = val;
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}
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void GPU_setWIN1_H0 (GPU *gpu, u8 val)
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{
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gpu->WIN1H0 = val;
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}
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void GPU_setWIN1_H1 (GPU *gpu, u8 val)
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{
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gpu->WIN1H1 = val;
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}
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void GPU_setWIN1_V0 (GPU *gpu, u8 val)
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{
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gpu->WIN1V0;
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}
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void GPU_setWIN1_V1 (GPU *gpu, u8 val)
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{
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gpu->WIN1V1 = val;
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}
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void GPU_setWININ0 (GPU *gpu, u8 val)
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{
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gpu->WININ0 = val&0x1F;
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gpu->WININ0_SPECIAL = (val>>5)&1;
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}
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void GPU_setWININ1 (GPU *gpu, u8 val)
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{
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gpu->WININ1 = val&0x1F;
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gpu->WININ1_SPECIAL = (val>>5)&1;
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}
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void GPU_setWINOUT (GPU *gpu, u8 val)
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{
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gpu->WINOUT = val&0x1F;
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gpu->WINOUT_SPECIAL = (val>>5)&1;
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}
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void GPU_setWINOBJ (GPU *gpu, u8 val)
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{
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gpu->WINOBJ = val&0x1F;
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gpu->WINOBJ_SPECIAL = (val>>5)&1;
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}
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void GPU_setWIN0_H (GPU *gpu, u16 val)
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{
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gpu->WIN0H0 = val >> 8;
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gpu->WIN0H1 = val&0xFF;
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}
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void GPU_setWIN0_V (GPU *gpu, u16 val)
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{
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gpu->WIN0V0 = val >> 8;
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gpu->WIN0V1 = val&0xFF;
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}
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void GPU_setWIN1_H (GPU *gpu, u16 val)
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{
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gpu->WIN1H0 = val >> 8;
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gpu->WIN1H1 = val&0xFF;
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}
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void GPU_setWIN1_V (GPU *gpu, u16 val)
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{
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gpu->WIN1V0 = val >> 8;
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gpu->WIN1V1 = val&0xFF;
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}
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void GPU_setWININ (GPU *gpu, u16 val)
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{
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gpu->WININ0 = val&0x1F;
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gpu->WININ0_SPECIAL = (val>>5)&1;
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val >>= 8;
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gpu->WININ1 = val&0x1F;
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gpu->WININ1_SPECIAL = (val>>5)&1;
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}
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void GPU_setWINOUT16(GPU *gpu, u16 val)
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{
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gpu->WINOUT = val&0x1F;
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gpu->WINOUT_SPECIAL = (val>>5)&1;
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val >>= 8;
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gpu->WINOBJ = val&0x1F;
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gpu->WINOBJ_SPECIAL = (val>>5)&1;
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}
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// Blending
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void GPU_setBLDCNT_LOW (GPU *gpu, u8 val)
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{
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gpu->BLDCNT = (gpu->BLDCNT&0xFF00) | val;
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SetupFinalPixelBlitter (gpu);
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}
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void GPU_setBLDCNT_HIGH (GPU *gpu, u8 val)
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{
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gpu->BLDCNT = (gpu->BLDCNT&0xFF) | (val<<8);
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SetupFinalPixelBlitter (gpu);
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}
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void GPU_setBLDCNT (GPU *gpu, u16 val)
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{
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gpu->BLDCNT = val;
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SetupFinalPixelBlitter (gpu);
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}
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void GPU_setBLDALPHA (GPU *gpu, u16 val)
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{
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gpu->BLDALPHA_EVA = (val&0x1f) > 16 ? 16 : (val&0x1f);
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val >>= 8;
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gpu->BLDALPHA_EVB = (val&0x1f) > 16 ? 16 : (val&0x1f);
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}
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void GPU_setBLDALPHA_EVA (GPU *gpu, u8 val)
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{
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gpu->BLDALPHA_EVA = (val&0x1f) > 16 ? 16 : (val&0x1f);
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}
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void GPU_setBLDALPHA_EVB (GPU *gpu, u8 val)
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{
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gpu->BLDALPHA_EVB = (val&0x1f) > 16 ? 16 : (val&0x1f);
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}
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void GPU_setBLDY_EVY (GPU *gpu, u8 val)
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{
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gpu->BLDY_EVY = (val&0x1f) > 16 ? 16 : (val&0x1f);
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}
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/*****************************************************************************/
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// ENABLING / DISABLING LAYERS
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/*****************************************************************************/
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@ -619,6 +487,7 @@ static BOOL setFinalColorSpecialBlend (const GPU *gpu, u32 passing, u8 bgnum, u8
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if ((gpu->BLDCNT >> bgnum)&1 && gpu->BLDALPHA_EVA)
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{
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u16 sourceFraction = gpu->BLDALPHA_EVA, sourceR, sourceG, sourceB,targetFraction;
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if (!sourceFraction) return 0;
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// no fraction of this BG to be showed, so don't do anything
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sourceR = ((color & 0x1F) * sourceFraction) >> 4 ;
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@ -1655,9 +1524,10 @@ void sprite1D(GPU * gpu, u16 l, u8 * dst, u8 * prioTab)
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if (spriteInfo->Mode == 3) /* sprite is in BMP format */
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{
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/* sprMemory + sprBoundary + 16Bytes per line (8pixels a 2 bytes) */
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src = (gpu->sprMem) + (spriteInfo->TileIndex<<4) + (y<<gpu->sprBMPBoundary);
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/* sprMemory + sprBoundary + 16Bytes per line (8pixels a 2 bytes) */
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//src = (gpu->sprMem) + (spriteInfo->TileIndex<<4) + (y<<gpu->sprBMPBoundary);
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// FIXME:this no correct, but work ???
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src = (gpu->sprMem) + (((spriteInfo->TileIndex&0x3E0) * 64 + (spriteInfo->TileIndex&0x1F) *8 + ( y << 8)) << 1);
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render_sprite_BMP (gpu, l, dst, (u16*)src, prioTab, prio, lg, sprX, x, xdir);
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continue;
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@ -1915,12 +1785,11 @@ void sprite2D(GPU * gpu, u16 l, u8 * dst, u8 * prioTab)
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if (spriteInfo->Mode == 3) /* sprite is in BMP format */
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{
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if (dispCnt->OBJ_BMP_2D_dim) // 256*256
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src = (gpu->sprMem) + (((spriteInfo->TileIndex&0x3F0) * 64 + (spriteInfo->TileIndex&0x0F) *8 + ( y << 8)) << 1);
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else // 128 * 512
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src = (gpu->sprMem) + (((spriteInfo->TileIndex&0x3E0) * 64 + (spriteInfo->TileIndex&0x1F) *8 + ( y << 8)) << 1);
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else // 128 * 512
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src = (gpu->sprMem) + (((spriteInfo->TileIndex&0x3F0) * 64 + (spriteInfo->TileIndex&0x0F) *8 + ( y << 8)) << 1);
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render_sprite_BMP (gpu, l, dst, (u16*)src,
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prioTab, prio, lg, sprX, x, xdir);
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render_sprite_BMP (gpu, l, dst, (u16*)src, prioTab, prio, lg, sprX, x, xdir);
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continue;
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}
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@ -2265,7 +2134,7 @@ void GPU_ligne(NDS_Screen * screen, u16 l)
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capDst = (ARM9Mem.ARM9_LCD
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+ (capcnt->VRAM_Write_Block * 0x20000)
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+ ((dispCnt->BG_Mode != 2) ? (capcnt->VRAM_Write_Offset * 0x8000) : 0)
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+ l * capx * 2); /* read offset ignored in VRAM display mode*/
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+ l * (capx<<1)); /* read offset ignored in VRAM display mode*/
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// LOG("Capture line %d (%X) [dst: %X]...\n", l, gpu->dispCapCnt.val, capDst - ARM9Mem.ARM9_LCD);
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@ -2276,11 +2145,11 @@ void GPU_ligne(NDS_Screen * screen, u16 l)
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{
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u16 cap3DLine[256]; /* temp buffer for 3D line reading */
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gpu3D->NDS_3D_GetLine (l, cap3DLine); /*FIXME: not sure it's good, since I hadn't seen how 3D works in desmume */
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for(i = 0; i < capx; i++) T1WriteWord(capDst, i, cap3DLine[i]); /* copy this line to buffer */
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for(i = 0; i < (capx<<1); i++) T1WriteWord(capDst, i, cap3DLine[i]); /* copy this line to buffer */
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}
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else /* capture all screen (BG + OBJ + 3D) */
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{
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for(i = 0; i < capx; i++) T1WriteWord(capDst, i, T2ReadWord(dst, i)); /* plain copy from screen to buffer */
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for(i = 0; i < (capx<<1); i++) T1WriteWord(capDst, i, T2ReadWord(dst, i)); /* plain copy from screen to buffer */
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}
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break;
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@ -2297,7 +2166,7 @@ void GPU_ligne(NDS_Screen * screen, u16 l)
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+ ((dispCnt->BG_Mode != 2) ? (capcnt->VRAM_Write_Offset * 0x8000) : 0)
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+ l * capx * 2); /* write offset ignored in VRAM display mode*/
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for(i = 0; i < capx; i++) T1WriteWord(capDst, i, T2ReadWord(capSrc, i)); /* plain copy from source to dest */
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for(i = 0; i < (capx<<1); i++) T1WriteWord(capDst, i, T2ReadWord(capSrc, i)); /* plain copy from source to dest */
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}
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break;
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@ -771,39 +771,49 @@ void GPU_set_DISPCAPCNT(GPU * gpu, u32 val) ;
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void GPU_ligne(NDS_Screen * screen, u16 l) ;
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void GPU_setMasterBrightness (GPU *gpu, u16 val);
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void GPU_setWIN0_H (GPU *gpu, u16 val);
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void GPU_setWIN0_H0 (GPU *gpu, u8 val);
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void GPU_setWIN0_H1 (GPU *gpu, u8 val);
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#define GPU_setWIN0_H(gpu, val) {gpu->WIN0H0 = val >> 8; gpu->WIN0H1 = val&0xFF;}
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#define GPU_setWIN0_H0(gpu, val) gpu->WIN0H0 = val
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#define GPU_setWIN0_H1(gpu, val) gpu->WIN0H1 = val
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void GPU_setWIN0_V (GPU *gpu, u16 val);
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void GPU_setWIN0_V0 (GPU *gpu, u8 val);
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void GPU_setWIN0_V1 (GPU *gpu, u8 val);
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#define GPU_setWIN0_V(gpu, val) {gpu->WIN0V0 = val >> 8; gpu->WIN0V1 = val&0xFF;}
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#define GPU_setWIN0_V0(gpu, val) gpu->WIN0V0 = val
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#define GPU_setWIN0_V1(gpu, val) gpu->WIN0V1 = val
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void GPU_setWIN1_H (GPU *gpu, u16 val);
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void GPU_setWIN1_H0 (GPU *gpu, u8 val);
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void GPU_setWIN1_H1 (GPU *gpu, u8 val);
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#define GPU_setWIN1_H(gpu, val) {gpu->WIN1H0 = val >> 8; gpu->WIN1H1 = val&0xFF;}
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#define GPU_setWIN1_H0(gpu, val) gpu->WIN1H0 = val
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#define GPU_setWIN1_H1(gpu, val) gpu->WIN1H1 = val
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void GPU_setWIN1_V (GPU *gpu, u16 val);
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void GPU_setWIN1_V0 (GPU *gpu, u8 val);
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void GPU_setWIN1_V1 (GPU *gpu, u8 val);
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#define GPU_setWIN1_V(gpu, val) {gpu->WIN1V0 = val >> 8; gpu->WIN1V1 = val&0xFF;}
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#define GPU_setWIN1_V0(gpu, val) gpu->WIN1V0 = val
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#define GPU_setWIN1_V1(gpu, val) gpu->WIN1V1 = val
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void GPU_setWININ (GPU *gpu, u16 val);
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void GPU_setWININ0 (GPU *gpu, u8 val);
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void GPU_setWININ1 (GPU *gpu, u8 val);
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#define GPU_setWININ(gpu, val) {gpu->WININ0=val&0x1F;\
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gpu->WININ0_SPECIAL=(val>>5)&1;\
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gpu->WININ1=(val>>8)&0x1F;\
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gpu->WININ1_SPECIAL=(val>>13)&1;\
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}
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#define GPU_setWININ0(gpu, val) {gpu->WININ0 = val&0x1F; gpu->WININ0_SPECIAL = (val>>5)&1;}
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#define GPU_setWININ1(gpu, val) {gpu->WININ1 = val&0x1F; gpu->WININ1_SPECIAL = (val>>5)&1;}
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void GPU_setWINOUT16(GPU *gpu, u16 val);
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void GPU_setWINOUT (GPU *gpu, u8 val);
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void GPU_setWINOBJ (GPU *gpu, u8 val);
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#define GPU_setWINOUT16(gpu, val) { gpu->WINOUT=val&0x1F;\
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gpu->WINOUT_SPECIAL=(val>>5)&1;\
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gpu->WINOBJ=(val>>8)&0x1F;\
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gpu->WINOBJ_SPECIAL=(val>>13)&1;\
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}
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#define GPU_setWINOUT(gpu, val) {gpu->WINOUT = val&0x1F; gpu->WINOUT_SPECIAL = (val>>5)&1;}
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#define GPU_setWINOBJ(gpu, val) {gpu->WINOBJ = val&0x1F; gpu->WINOBJ_SPECIAL = (val>>5)&1;}
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void GPU_setBLDCNT_LOW (GPU *gpu, u8 val);
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void GPU_setBLDCNT_HIGH (GPU *gpu, u8 val);
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void GPU_setBLDCNT (GPU *gpu, u16 val);
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// Blending
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#define GPU_setBLDCNT_LOW(gpu, val) {gpu->BLDCNT = (gpu->BLDCNT&0xFF00) | val; SetupFinalPixelBlitter (gpu);}
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#define GPU_setBLDCNT_HIGH(gpu, val) {gpu->BLDCNT = (gpu->BLDCNT&0xFF) | (val<<8); SetupFinalPixelBlitter (gpu);}
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#define GPU_setBLDCNT(gpu, val) {gpu->BLDCNT = val; SetupFinalPixelBlitter (gpu);}
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void GPU_setBLDALPHA (GPU *gpu, u16 val);
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void GPU_setBLDALPHA_EVA(GPU *gpu, u8 val);
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void GPU_setBLDALPHA_EVB(GPU *gpu, u8 val);
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#define GPU_setBLDALPHA(gpu, val) {gpu->BLDALPHA_EVA = (val&0x1f) > 16 ? 16 : (val&0x1f);\
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gpu->BLDALPHA_EVB = (val>>8&0x1f) > 16 ? 16 : (val>>8&0x1f);}
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#define GPU_setBLDALPHA_EVA(gpu, val) {gpu->BLDALPHA_EVA = (val&0x1f) > 16 ? 16 : (val&0x1f);}
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#define GPU_setBLDALPHA_EVB(gpu, val) {gpu->BLDALPHA_EVB = (val&0x1f) > 16 ? 16 : (val&0x1f);}
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void GPU_setBLDY_EVY (GPU *gpu, u8 val);
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#define GPU_setBLDY_EVY(gpu, val) {gpu->BLDY_EVY = (val&0x1f) > 16 ? 16 : (val&0x1f);}
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#ifdef __cplusplus
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}
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@ -309,12 +309,12 @@ void MMU_VRAMWriteBackToLCD(u8 block)
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u8 *source;
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u32 size ;
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u8 VRAMBankCnt;
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#if 1
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return ;
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#endif
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destination = 0 ;
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source = 0;
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VRAMBankCnt = MMU_read8(ARMCPU_ARM9,REG_VRAMCNTA+block) ;
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VRAMBankCnt = MMU_read8(ARMCPU_ARM9,REG_VRAMCNTA+block);
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if(!(VRAMBankCnt&0x80))return;
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switch (block)
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{
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case 0: // Bank A
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@ -359,56 +359,70 @@ void MMU_VRAMWriteBackToLCD(u8 block)
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switch (VRAMBankCnt & 7) {
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case 0:
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/* vram is allready stored at LCD, we dont need to write it back */
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MMU.vScreen = 1;
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break ;
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case 1:
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switch(block){
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case 0:
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case 1:
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case 2:
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case 3:
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/* banks are in use for BG at ABG + ofs * 0x20000 */
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source = ARM9Mem.ARM9_ABG + ((VRAMBankCnt >> 3) & 3) * 0x20000 ;
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break ;
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case 4:
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/* bank E is in use at ABG */
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source = ARM9Mem.ARM9_ABG ;
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break;
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case 5:
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case 6:
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/* banks are in use for BG at ABG + (0x4000*OFS.0)+(0x10000*OFS.1)*/
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source = ARM9Mem.ARM9_ABG + (((VRAMBankCnt >> 3) & 1) * 0x4000) + (((VRAMBankCnt >> 2) & 1) * 0x10000) ;
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break;
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case 8:
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/* bank H is in use at BBG */
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source = ARM9Mem.ARM9_BBG ;
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break ;
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case 9:
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/* bank I is in use at BBG */
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source = ARM9Mem.ARM9_BBG + 0x8000 ;
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break;
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default: return ;
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}
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switch(block){
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case 0:
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case 1:
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case 2:
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case 3:
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/* banks are in use for BG at ABG + ofs * 0x20000 */
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source = ARM9Mem.ARM9_ABG + ((VRAMBankCnt >> 3) & 3) * 0x20000 ;
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break ;
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case 4:
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/* bank E is in use at ABG */
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source = ARM9Mem.ARM9_ABG ;
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break;
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case 5:
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case 6:
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/* banks are in use for BG at ABG + (0x4000*OFS.0)+(0x10000*OFS.1)*/
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source = ARM9Mem.ARM9_ABG + (((VRAMBankCnt >> 3) & 1) * 0x4000) + (((VRAMBankCnt >> 2) & 1) * 0x10000) ;
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break;
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case 8:
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/* bank H is in use at BBG */
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source = ARM9Mem.ARM9_BBG ;
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break ;
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case 9:
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/* bank I is in use at BBG */
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source = ARM9Mem.ARM9_BBG + 0x8000 ;
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break;
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default: return ;
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}
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break ;
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case 2:
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if (block < 2)
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switch(block)
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{
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/* banks A,B are in use for OBJ at AOBJ + ofs * 0x20000 */
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source = ARM9Mem.ARM9_AOBJ + ((VRAMBankCnt >> 3) & 1) * 0x20000 ;
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} else return ;
|
||||
case 0:
|
||||
case 1:
|
||||
// banks A,B are in use for OBJ at AOBJ + ofs * 0x20000
|
||||
source=ARM9Mem.ARM9_AOBJ+(((VRAMBankCnt>>3)&1)*0x20000);
|
||||
break;
|
||||
case 4:
|
||||
source=ARM9Mem.ARM9_AOBJ;
|
||||
break;
|
||||
case 5:
|
||||
case 6:
|
||||
source=ARM9Mem.ARM9_AOBJ+(((VRAMBankCnt>>3)&1)*0x4000)+(((VRAMBankCnt>>4)&1)*0x10000);
|
||||
break;
|
||||
case 9:
|
||||
// source=ARM9Mem.ARM9_BOBJ;
|
||||
break;
|
||||
}
|
||||
break ;
|
||||
case 3: break;
|
||||
case 4:
|
||||
switch(block){
|
||||
case 2:
|
||||
/* bank C is in use at BBG */
|
||||
source = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 3:
|
||||
/* bank D is in use at BOBJ */
|
||||
source = ARM9Mem.ARM9_BOBJ ;
|
||||
break ;
|
||||
default: return ;
|
||||
}
|
||||
switch(block)
|
||||
{
|
||||
case 2:
|
||||
/* bank C is in use at BBG */
|
||||
source = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 3:
|
||||
/* bank D is in use at BOBJ */
|
||||
source = ARM9Mem.ARM9_BOBJ ;
|
||||
break ;
|
||||
default: return ;
|
||||
}
|
||||
break ;
|
||||
default:
|
||||
return ;
|
||||
|
@ -423,9 +437,8 @@ void MMU_VRAMReloadFromLCD(u8 block,u8 VRAMBankCnt)
|
|||
u8 *destination;
|
||||
u8 *source;
|
||||
u32 size;
|
||||
#if 1
|
||||
return ;
|
||||
#endif
|
||||
|
||||
if(!(VRAMBankCnt&0x80))return;
|
||||
destination = 0;
|
||||
source = 0;
|
||||
size = 0;
|
||||
|
@ -470,59 +483,66 @@ void MMU_VRAMReloadFromLCD(u8 block,u8 VRAMBankCnt)
|
|||
default:
|
||||
return ;
|
||||
}
|
||||
switch (VRAMBankCnt & 7) {
|
||||
case 0:
|
||||
/* vram is allready stored at LCD, we dont need to write it back */
|
||||
MMU.vScreen = 1;
|
||||
switch (VRAMBankCnt & 7) {
|
||||
case 0: // vram is allready stored at LCD, we dont need to write it back
|
||||
break ;
|
||||
case 1:
|
||||
if (block < 4)
|
||||
{
|
||||
/* banks are in use for BG at ABG + ofs * 0x20000 */
|
||||
destination = ARM9Mem.ARM9_ABG + ((VRAMBankCnt >> 3) & 3) * 0x20000 ;
|
||||
} else return ;
|
||||
switch(block){
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
case 3: // banks are in use for BG at ABG + ofs * 0x20000
|
||||
destination = ARM9Mem.ARM9_ABG + ((VRAMBankCnt >> 3) & 3) * 0x20000 ;
|
||||
break ;
|
||||
case 4: // bank E is in use at ABG
|
||||
destination = ARM9Mem.ARM9_ABG ;
|
||||
break;
|
||||
case 5:
|
||||
case 6: // banks are in use for BG at ABG + (0x4000*OFS.0)+(0x10000*OFS.1)
|
||||
destination = ARM9Mem.ARM9_ABG + (((VRAMBankCnt >> 3) & 1) * 0x4000) + (((VRAMBankCnt >> 4) & 1) * 0x10000) ;
|
||||
break;
|
||||
case 7:
|
||||
case 8: // bank H is in use at BBG
|
||||
destination = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 9: // bank I is in use at BBG
|
||||
//destination = ARM9Mem.ARM9_BBG + 0x8000 ;
|
||||
break;
|
||||
default: return ;
|
||||
}
|
||||
break ;
|
||||
case 2:
|
||||
switch(block){
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
/* banks are in use for BG at ABG + ofs * 0x20000 */
|
||||
destination = ARM9Mem.ARM9_ABG + ((VRAMBankCnt >> 3) & 3) * 0x20000 ;
|
||||
break ;
|
||||
case 4:
|
||||
/* bank E is in use at ABG */
|
||||
destination = ARM9Mem.ARM9_ABG ;
|
||||
break;
|
||||
case 5:
|
||||
case 6:
|
||||
/* banks are in use for BG at ABG + (0x4000*OFS.0)+(0x10000*OFS.1)*/
|
||||
destination = ARM9Mem.ARM9_ABG + (((VRAMBankCnt >> 3) & 1) * 0x4000) + (((VRAMBankCnt >> 2) & 1) * 0x10000) ;
|
||||
break;
|
||||
case 8:
|
||||
/* bank H is in use at BBG */
|
||||
destination = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 9:
|
||||
/* bank I is in use at BBG */
|
||||
destination = ARM9Mem.ARM9_BBG + 0x8000 ;
|
||||
break;
|
||||
default: return ;
|
||||
}
|
||||
break ;
|
||||
switch(block)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
destination=ARM9Mem.ARM9_AOBJ+(((VRAMBankCnt>>3)&3)*0x20000);
|
||||
break;
|
||||
case 4:
|
||||
destination=ARM9Mem.ARM9_AOBJ;
|
||||
break;
|
||||
case 5:
|
||||
case 6:
|
||||
destination=ARM9Mem.ARM9_AOBJ+(((VRAMBankCnt>>3)&1)*0x4000)+(((VRAMBankCnt>>4)&1)*0x10000);
|
||||
break;
|
||||
case 9:
|
||||
// destination=ARM9Mem.ARM9_BOBJ;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
case 3: break;
|
||||
case 4:
|
||||
switch(block){
|
||||
case 2:
|
||||
/* bank C is in use at BBG */
|
||||
destination = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 3:
|
||||
/* bank D is in use at BOBJ */
|
||||
destination = ARM9Mem.ARM9_BOBJ ;
|
||||
break ;
|
||||
default: return ;
|
||||
}
|
||||
switch(block){
|
||||
case 2: // bank C is in use at BBG
|
||||
destination = ARM9Mem.ARM9_BBG ;
|
||||
break ;
|
||||
case 3:
|
||||
// bank D is in use at BOBJ
|
||||
destination = ARM9Mem.ARM9_BOBJ ;
|
||||
break ;
|
||||
default: return ;
|
||||
}
|
||||
break ;
|
||||
default:
|
||||
return ;
|
||||
|
@ -703,22 +723,11 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr)
|
|||
// This is hacked due to the only current 3D core
|
||||
case 0x04000600:
|
||||
{
|
||||
/*
|
||||
u32 fifonum = IPCFIFO+proc;
|
||||
|
||||
u32 gxstat = (MMU.fifos[fifonum].empty<<26) |
|
||||
(1<<25) |
|
||||
(MMU.fifos[fifonum].full<<24) |
|
||||
/*((NDS_nbpush[0]&1)<<13) | ((NDS_nbpush[2]&0x1F)<<8) |*/
|
||||
// 2;
|
||||
u32 gxstat =(2|(MMU.gfxfifo.hits_count<<16)|
|
||||
(MMU.gfxfifo.full<<24)|
|
||||
(MMU.gfxfifo.empty<<25)|
|
||||
(MMU.gfxfifo.half<<26)|
|
||||
(MMU.gfxfifo.irq<<30));
|
||||
|
||||
//printlog("GXSTAT: 0x%X\n", gxstat);
|
||||
|
||||
return gxstat;
|
||||
}
|
||||
|
||||
|
@ -862,7 +871,8 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
if(proc==ARMCPU_ARM9 && adr<0x02000000)
|
||||
{
|
||||
//printlog("MMU ITCM (08) Write %08X: %08X\n", adr, val);
|
||||
return T1WriteByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
T1WriteByte(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
return ;
|
||||
}
|
||||
// CFlash writing, Mic
|
||||
if ((adr>=0x9000000)&&(adr<0x9900000)) {
|
||||
|
@ -892,7 +902,7 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
switch(adr)
|
||||
{
|
||||
case REG_DISPA_WIN0H:
|
||||
if(proc == ARMCPU_ARM9) GPU_setWIN0_H1 (MainScreen.gpu, val);
|
||||
if(proc == ARMCPU_ARM9) GPU_setWIN0_H1(MainScreen.gpu, val);
|
||||
break ;
|
||||
case REG_DISPA_WIN0H+1:
|
||||
if(proc == ARMCPU_ARM9) GPU_setWIN0_H0 (MainScreen.gpu, val);
|
||||
|
@ -1013,52 +1023,27 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
case REG_VRAMCNTD:
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
|
||||
|
||||
MMU_VRAMWriteBackToLCD(0) ;
|
||||
MMU_VRAMWriteBackToLCD(1) ;
|
||||
MMU_VRAMWriteBackToLCD(2) ;
|
||||
MMU_VRAMWriteBackToLCD(3) ;
|
||||
if (!(val&0x80))
|
||||
{
|
||||
u8 tmp=T1ReadByte(ARM9Mem.ARM9_REG, 0x240);
|
||||
switch(tmp & 7)
|
||||
{
|
||||
case 0:
|
||||
memset(ARM9Mem.ARM9_LCD,0,0x20000);
|
||||
break;
|
||||
case 1:
|
||||
memset(ARM9Mem.ARM9_ABG+(0x20000*OFS(tmp)),0,0x20000);
|
||||
break;
|
||||
case 2:
|
||||
memset(ARM9Mem.ARM9_AOBJ+(0x20000*(OFS(tmp)&1)),0,0x20000);
|
||||
//memset(ARM9Mem.ARM9_ABG+0x40000,0,0x20000);
|
||||
break;
|
||||
case 3:
|
||||
memset(ARM9Mem.textureSlotAddr[OFS(tmp)], 0, 0x20000);
|
||||
break;
|
||||
}
|
||||
} else
|
||||
MMU_VRAMWriteBackToLCD(adr-REG_VRAMCNTA) ;
|
||||
switch(val & 0x1F)
|
||||
{
|
||||
case 1 :
|
||||
MMU.vram_mode[adr-REG_VRAMCNTA] = 0; // BG-VRAM
|
||||
memset(ARM9Mem.ARM9_ABG,0,0x20000);
|
||||
//memset(ARM9Mem.ARM9_ABG,0,0x20000);
|
||||
//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*0); // BG-VRAM
|
||||
break;
|
||||
case 1 | (1 << 3) :
|
||||
MMU.vram_mode[adr-REG_VRAMCNTA] = 1; // BG-VRAM
|
||||
memset(ARM9Mem.ARM9_ABG+0x20000,0,0x20000);
|
||||
//memset(ARM9Mem.ARM9_ABG+0x20000,0,0x20000);
|
||||
//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*1); // BG-VRAM
|
||||
break;
|
||||
case 1 | (2 << 3) :
|
||||
MMU.vram_mode[adr-REG_VRAMCNTA] = 2; // BG-VRAM
|
||||
memset(ARM9Mem.ARM9_ABG+0x40000,0,0x20000);
|
||||
//memset(ARM9Mem.ARM9_ABG+0x40000,0,0x20000);
|
||||
//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*2); // BG-VRAM
|
||||
break;
|
||||
case 1 | (3 << 3) :
|
||||
MMU.vram_mode[adr-REG_VRAMCNTA] = 3; // BG-VRAM
|
||||
memset(ARM9Mem.ARM9_ABG+0x60000,0,0x20000);
|
||||
//memset(ARM9Mem.ARM9_ABG+0x60000,0,0x20000);
|
||||
//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*3); // BG-VRAM
|
||||
break;
|
||||
case 0: // mapped to lcd
|
||||
|
@ -1088,7 +1073,7 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
case REG_VRAMCNTE :
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
MMU_VRAMWriteBackToLCD((u8)REG_VRAMCNTE) ;
|
||||
MMU_VRAMWriteBackToLCD(4);
|
||||
if((val & 7) == 5)
|
||||
{
|
||||
ARM9Mem.ExtPal[0][0] = ARM9Mem.ARM9_LCD + 0x80000;
|
||||
|
@ -1111,13 +1096,14 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
ARM9Mem.ExtPal[0][3] = ARM9Mem.ARM9_LCD + 0x86000;
|
||||
}
|
||||
|
||||
MMU_VRAMReloadFromLCD(adr-REG_VRAMCNTE,val) ;
|
||||
MMU_VRAMReloadFromLCD(4,val) ;
|
||||
}
|
||||
break;
|
||||
|
||||
case REG_VRAMCNTF :
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
MMU_VRAMWriteBackToLCD(5);
|
||||
switch(val & 0x1F)
|
||||
{
|
||||
case 4 :
|
||||
|
@ -1154,11 +1140,13 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
ARM9Mem.ObjExtPal[0][1] = ARM9Mem.ARM9_LCD + 0x92000;
|
||||
break;
|
||||
}
|
||||
MMU_VRAMReloadFromLCD(5,val);
|
||||
}
|
||||
break;
|
||||
case REG_VRAMCNTG :
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
MMU_VRAMWriteBackToLCD(6);
|
||||
switch(val & 0x1F)
|
||||
{
|
||||
case 4 :
|
||||
|
@ -1195,13 +1183,14 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
ARM9Mem.ObjExtPal[0][1] = ARM9Mem.ARM9_LCD + 0x96000;
|
||||
break;
|
||||
}
|
||||
MMU_VRAMReloadFromLCD(6,val);
|
||||
}
|
||||
break;
|
||||
|
||||
case REG_VRAMCNTH :
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
MMU_VRAMWriteBackToLCD((u8)REG_VRAMCNTH) ;
|
||||
MMU_VRAMWriteBackToLCD(7);
|
||||
|
||||
if((val & 7) == 2)
|
||||
{
|
||||
|
@ -1211,14 +1200,14 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
ARM9Mem.ExtPal[1][3] = ARM9Mem.ARM9_LCD + 0x9E000;
|
||||
}
|
||||
|
||||
MMU_VRAMReloadFromLCD(adr-REG_VRAMCNTH,val) ;
|
||||
MMU_VRAMReloadFromLCD(7,val);
|
||||
}
|
||||
break;
|
||||
|
||||
case REG_VRAMCNTI :
|
||||
if(proc == ARMCPU_ARM9)
|
||||
{
|
||||
MMU_VRAMWriteBackToLCD((u8)REG_VRAMCNTI) ;
|
||||
MMU_VRAMWriteBackToLCD(8);
|
||||
|
||||
if((val & 7) == 3)
|
||||
{
|
||||
|
@ -1226,7 +1215,7 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
|
|||
ARM9Mem.ObjExtPal[1][1] = ARM9Mem.ARM9_LCD + 0xA2000;
|
||||
}
|
||||
|
||||
MMU_VRAMReloadFromLCD(adr-REG_VRAMCNTI,val) ;
|
||||
MMU_VRAMReloadFromLCD(8,val);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -1268,7 +1257,8 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
|
|||
if(proc==ARMCPU_ARM9 && adr<0x02000000)
|
||||
{
|
||||
//printlog("MMU ITCM (16) Write %08X: %08X\n", adr, val);
|
||||
return T1WriteWord(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
T1WriteWord(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
return ;
|
||||
}
|
||||
|
||||
// CFlash writing, Mic
|
||||
|
@ -1622,8 +1612,16 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
|
|||
if ( new_val && old_val != new_val) {
|
||||
/* raise an interrupt request to the CPU if needed */
|
||||
if ( MMU.reg_IE[proc] & MMU.reg_IF[proc]) {
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
if (proc==ARMCPU_ARM7)
|
||||
{
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
NDS_ARM9.wIRQ = TRUE;
|
||||
NDS_ARM9.waitIRQ = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
@ -1653,8 +1651,16 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
|
|||
if ( MMU.reg_IME[proc]) {
|
||||
/* raise an interrupt request to the CPU if needed */
|
||||
if ( MMU.reg_IE[proc] & MMU.reg_IF[proc]) {
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
if (proc==ARMCPU_ARM7)
|
||||
{
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
NDS_ARM9.wIRQ = TRUE;
|
||||
NDS_ARM9.waitIRQ = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
@ -1906,7 +1912,8 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
|
|||
if(proc==ARMCPU_ARM9 && adr<0x02000000)
|
||||
{
|
||||
//printlog("MMU ITCM (32) Write %08X: %08X\n", adr, val);
|
||||
return T1WriteLong(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
T1WriteLong(ARM9Mem.ARM9_ITCM, adr&0x7FFF, val);
|
||||
return ;
|
||||
}
|
||||
|
||||
// CFlash writing, Mic
|
||||
|
@ -2362,6 +2369,43 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
|
|||
break;
|
||||
}
|
||||
|
||||
case REG_DISPA_WIN0H:
|
||||
{
|
||||
if(proc==ARMCPU_ARM9)
|
||||
{
|
||||
GPU_setWIN0_H(MainScreen.gpu, val&0xFFFF);
|
||||
GPU_setWIN1_H(MainScreen.gpu, val>>16);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case REG_DISPA_WIN0V:
|
||||
{
|
||||
if(proc==ARMCPU_ARM9)
|
||||
{
|
||||
GPU_setWIN0_V(MainScreen.gpu, val&0xFFFF);
|
||||
GPU_setWIN1_V(MainScreen.gpu, val>>16);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case REG_DISPB_WIN0H:
|
||||
{
|
||||
if(proc==ARMCPU_ARM9)
|
||||
{
|
||||
GPU_setWIN0_H(SubScreen.gpu, val&0xFFFF);
|
||||
GPU_setWIN1_H(SubScreen.gpu, val>>16);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case REG_DISPB_WIN0V:
|
||||
{
|
||||
if(proc==ARMCPU_ARM9)
|
||||
{
|
||||
GPU_setWIN0_V(SubScreen.gpu, val&0xFFFF);
|
||||
GPU_setWIN1_V(SubScreen.gpu, val>>16);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case REG_DISPA_BLDCNT:
|
||||
{
|
||||
if (proc == ARMCPU_ARM9)
|
||||
|
@ -2411,8 +2455,16 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
|
|||
if ( new_val && old_val != new_val) {
|
||||
/* raise an interrupt request to the CPU if needed */
|
||||
if ( MMU.reg_IE[proc] & MMU.reg_IF[proc]) {
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
if (proc==ARMCPU_ARM7)
|
||||
{
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
NDS_ARM9.wIRQ = TRUE;
|
||||
NDS_ARM9.waitIRQ = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
@ -2423,8 +2475,16 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
|
|||
if ( MMU.reg_IME[proc]) {
|
||||
/* raise an interrupt request to the CPU if needed */
|
||||
if ( MMU.reg_IE[proc] & MMU.reg_IF[proc]) {
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
if (proc==ARMCPU_ARM7)
|
||||
{
|
||||
NDS_ARM7.wIRQ = TRUE;
|
||||
NDS_ARM7.waitIRQ = FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
NDS_ARM9.wIRQ = TRUE;
|
||||
NDS_ARM9.waitIRQ = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
@ -2898,7 +2958,7 @@ void FASTCALL MMU_doDMA(u32 proc, u32 num)
|
|||
if ((MMU.DMAStartTime[proc][num]==4) && // Must be in main memory display mode
|
||||
(taille==4) && // Word must be 4
|
||||
(((MMU.DMACrt[proc][num]>>26)&1) == 1)) // Transfer mode must be 32bit wide
|
||||
taille = 256*192/2;
|
||||
taille = 24576; //256*192/2;
|
||||
|
||||
if(MMU.DMAStartTime[proc][num] == 5)
|
||||
taille *= 0x80;
|
||||
|
|
|
@ -829,7 +829,7 @@ NDS_exec(s32 nb, BOOL force)
|
|||
|
||||
for(; (nb >= nds.cycles) && ((force)||(execute)); )
|
||||
{
|
||||
for (j = 0; j < 4 && (!force); j++)
|
||||
for (j = 0; j < 4 && (!force) && (execute); j++)
|
||||
{
|
||||
if(nds.ARM9Cycle<=nds.cycles)
|
||||
{
|
||||
|
@ -846,7 +846,7 @@ NDS_exec(s32 nb, BOOL force)
|
|||
LOG(logbuf);
|
||||
}
|
||||
#endif
|
||||
for (i = 0; i < 4 && (!force); i++)
|
||||
for (i = 0; i < 4 && (!force) && (execute); i++)
|
||||
{
|
||||
if(NDS_ARM9.waitIRQ)
|
||||
nds.ARM9Cycle += 100;
|
||||
|
@ -879,7 +879,7 @@ NDS_exec(s32 nb, BOOL force)
|
|||
LOG(logbuf);
|
||||
}
|
||||
#endif
|
||||
for (i = 0; i < 4 && (!force); i++)
|
||||
for (i = 0; i < 4 && (!force) && (execute); i++)
|
||||
{
|
||||
if(NDS_ARM7.waitIRQ)
|
||||
nds.ARM7Cycle += 100;
|
||||
|
|
|
@ -53,7 +53,7 @@ void LogStop(void);
|
|||
#ifdef DEBUG
|
||||
#define LOG(...) DebugPrintf(MainLog, __FILE__, __LINE__, __VA_ARGS__)
|
||||
#else
|
||||
#if defined(WIN32) && defined(BETAVERSION) && defined(OLD_LOG)
|
||||
#if defined(WIN32) && defined(BETA_VERSION) && defined(OLD_LOG)
|
||||
#define LOG(...) printlog(__VA_ARGS__)
|
||||
#else
|
||||
#define LOG(...)
|
||||
|
|
|
@ -23,20 +23,20 @@
|
|||
#include <stdlib.h>
|
||||
#include "matrix.h"
|
||||
|
||||
void FASTCALL MatrixInit (float *matrix)
|
||||
void MatrixInit (float *matrix)
|
||||
{
|
||||
memset (matrix, 0, sizeof(float)*16);
|
||||
matrix[0] = matrix[5] = matrix[10] = matrix[15] = 1.f;
|
||||
}
|
||||
|
||||
#ifdef SSE2
|
||||
void FASTCALL MatrixIdentity (float *matrix) //============== TODO
|
||||
void __fastcall MatrixIdentity (float *matrix) //============== TODO
|
||||
{
|
||||
memset (matrix, 0, sizeof(float)*16);
|
||||
matrix[0] = matrix[5] = matrix[10] = matrix[15] = 1.f;
|
||||
}
|
||||
|
||||
float FASTCALL MatrixGetMultipliedIndex (int index, float *matrix, float *rightMatrix)
|
||||
float __fastcall MatrixGetMultipliedIndex (int index, float *matrix, float *rightMatrix)
|
||||
{
|
||||
int iMod = index%4, iDiv = (index>>2)<<2;
|
||||
|
||||
|
@ -44,12 +44,12 @@ float FASTCALL MatrixGetMultipliedIndex (int index, float *matrix, float *rightM
|
|||
(matrix[iMod+8]*rightMatrix[iDiv+2])+(matrix[iMod+12]*rightMatrix[iDiv+3]);
|
||||
}
|
||||
|
||||
void FASTCALL MatrixSet (float *matrix, int x, int y, float value) // TODO
|
||||
void __fastcall MatrixSet (float *matrix, int x, int y, float value) // TODO
|
||||
{
|
||||
matrix [x+(y<<2)] = value;
|
||||
}
|
||||
|
||||
void FASTCALL MatrixCopy (float *matrixDST, float *matrixSRC)
|
||||
void __fastcall MatrixCopy (float *matrixDST, float *matrixSRC)
|
||||
{
|
||||
memcpy (matrixDST, matrixSRC, sizeof(float)*16);
|
||||
}
|
||||
|
|
|
@ -43,20 +43,19 @@ typedef struct MatrixStack
|
|||
int size;
|
||||
} MatrixStack;
|
||||
|
||||
void MatrixInit (float *matrix);
|
||||
#ifdef SSE2
|
||||
void FASTCALL MatrixInit (float *matrix);
|
||||
extern void FASTCALL MatrixMultVec3x3 (const gMatrix matrix, const gMatrix vecPtr);
|
||||
extern void FASTCALL MatrixMultVec4x4 (const gMatrix matrix, const gMatrix vecPtr);
|
||||
void FASTCALL MatrixIdentity (float *matrix);
|
||||
extern void FASTCALL MatrixMultiply (const gMatrix matrix, const gMatrix rightMatrix);
|
||||
float FASTCALL MatrixGetMultipliedIndex (int index, float *matrix, float *rightMatrix);
|
||||
void FASTCALL MatrixSet (float *matrix, int x, int y, float value);
|
||||
void FASTCALL MatrixCopy (const gMatrix matrixDST, const gMatrix matrixSRC);
|
||||
extern void FASTCALL MatrixTranslate (const gMatrix matrix, const gMatrix ptr);
|
||||
extern void FASTCALL MatrixScale (const gMatrix matrix, const gMatrix ptr);
|
||||
void FASTCALL MatrixScale (const gMatrix matrix, const gMatrix ptr);
|
||||
extern void __fastcall MatrixMultVec3x3 (const gMatrix matrix, const gMatrix vecPtr);
|
||||
extern void __fastcall MatrixMultVec4x4 (const gMatrix matrix, const gMatrix vecPtr);
|
||||
void __fastcall MatrixIdentity (float *matrix);
|
||||
extern void __fastcall MatrixMultiply (const gMatrix matrix, const gMatrix rightMatrix);
|
||||
float __fastcall MatrixGetMultipliedIndex (int index, float *matrix, float *rightMatrix);
|
||||
void __fastcall MatrixSet (float *matrix, int x, int y, float value);
|
||||
void __fastcall MatrixCopy (const gMatrix matrixDST, const gMatrix matrixSRC);
|
||||
extern void __fastcall MatrixTranslate (float *matrix, float *ptr);
|
||||
extern void __fastcall MatrixScale (const gMatrix matrix, const gMatrix ptr);
|
||||
void __fastcall MatrixScale (const gMatrix matrix, const gMatrix ptr);
|
||||
#else
|
||||
void FASTCALL MatrixInit (float *matrix);
|
||||
void MatrixMultVec3x3 (float *matrix, float *vecPtr);
|
||||
void MatrixMultVec4x4 (float *matrix, float *vecPtr);
|
||||
void MatrixIdentity (float *matrix);
|
||||
|
|
|
@ -25,9 +25,6 @@
|
|||
.code
|
||||
|
||||
@MatrixMultVec4x4@8 PROC PUBLIC
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
movaps xmm0, XMMWORD PTR [ecx]
|
||||
movaps xmm1, XMMWORD PTR [ecx+16]
|
||||
movaps xmm2, XMMWORD PTR [ecx+32]
|
||||
|
@ -46,16 +43,10 @@
|
|||
addps xmm4, xmm6
|
||||
addps xmm4, xmm3
|
||||
movaps XMMWORD PTR [edx], xmm4
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
ret 0
|
||||
@MatrixMultVec4x4@8 ENDP
|
||||
|
||||
PUBLIC @MatrixMultVec3x3@8
|
||||
@MatrixMultVec3x3@8 PROC
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
@MatrixMultVec3x3@8 PROC PUBLIC
|
||||
movaps xmm0, XMMWORD PTR [ecx]
|
||||
movaps xmm1, XMMWORD PTR [ecx+16]
|
||||
movaps xmm2, XMMWORD PTR [ecx+32]
|
||||
|
@ -72,18 +63,10 @@ PUBLIC @MatrixMultVec3x3@8
|
|||
addps xmm4, xmm5
|
||||
addps xmm4, xmm6
|
||||
movaps XMMWORD PTR [edx], xmm4
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
ret 0
|
||||
@MatrixMultVec3x3@8 ENDP
|
||||
|
||||
|
||||
PUBLIC @MatrixMultiply@8
|
||||
@MatrixMultiply@8 PROC
|
||||
; mov eax, DWORD PTR[esp+4]
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
@MatrixMultiply@8 PROC PUBLIC
|
||||
movaps xmm0, XMMWORD PTR [ecx]
|
||||
movaps xmm1, XMMWORD PTR [ecx+16]
|
||||
movaps xmm2, XMMWORD PTR [ecx+32]
|
||||
|
@ -152,16 +135,10 @@ PUBLIC @MatrixMultiply@8
|
|||
addps xmm4,xmm6
|
||||
addps xmm4,xmm7
|
||||
movaps XMMWORD PTR [ecx+48],xmm4
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
ret 0
|
||||
@MatrixMultiply@8 ENDP
|
||||
|
||||
PUBLIC @MatrixTranslate@8
|
||||
@MatrixTranslate@8 PROC
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
@MatrixTranslate@8 PROC PUBLIC
|
||||
movaps xmm0, XMMWORD PTR [ecx]
|
||||
movaps xmm1, XMMWORD PTR [ecx+16]
|
||||
movaps xmm2, XMMWORD PTR [ecx+32]
|
||||
|
@ -180,16 +157,10 @@ PUBLIC @MatrixTranslate@8
|
|||
addps xmm4, xmm6
|
||||
addps xmm4, xmm3
|
||||
movaps XMMWORD PTR [ecx+48], xmm4
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
ret 0
|
||||
@MatrixTranslate@8 ENDP
|
||||
|
||||
PUBLIC @MatrixScale@8
|
||||
@MatrixScale@8 PROC
|
||||
push ebp
|
||||
mov ebp, esp
|
||||
|
||||
@MatrixScale@8 PROC PUBLIC
|
||||
movaps xmm0, XMMWORD PTR [ecx]
|
||||
movaps xmm1, XMMWORD PTR [ecx+16]
|
||||
movaps xmm2, XMMWORD PTR [ecx+32]
|
||||
|
@ -205,9 +176,6 @@ PUBLIC @MatrixScale@8
|
|||
movaps XMMWORD PTR [ecx],xmm4
|
||||
movaps XMMWORD PTR [ecx+16],xmm5
|
||||
movaps XMMWORD PTR [ecx+32],xmm6
|
||||
|
||||
mov esp, ebp
|
||||
pop ebp
|
||||
ret 0
|
||||
@MatrixScale@8 ENDP
|
||||
|
||||
|
|
|
@ -522,14 +522,15 @@ void NDS_glMultMatrix4x4(signed long v)
|
|||
if (txt_slot_current_size<=0)\
|
||||
{\
|
||||
txt_slot_current++;\
|
||||
adr=ARM9Mem.textureSlotAddr[txt_slot_current];\
|
||||
*adr=(unsigned char *)ARM9Mem.textureSlotAddr[txt_slot_current];\
|
||||
adr-=txt_slot_size;\
|
||||
txt_slot_size=(txt_slot_current_size=0x020000);\
|
||||
txt_slot_size=txt_slot_current_size=0x020000;\
|
||||
}
|
||||
//#define CHECKSLOT ;
|
||||
|
||||
#define RGB16TO32(col,alpha) (((alpha)<<24) | ((((col) & 0x7C00)>>7)<<16) | ((((col) & 0x3E0)>>2)<<8) | (((col) & 0x1F)<<3))
|
||||
|
||||
static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
||||
__forceinline void SetupTexture (unsigned int format, unsigned int palette)
|
||||
{
|
||||
unsigned short *pal = NULL;
|
||||
unsigned int mode = (unsigned short)((format>>26)&0x7);
|
||||
|
@ -544,7 +545,10 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
unsigned char * adr = (unsigned char *)(ARM9Mem.textureSlotAddr[txt_slot_current]+((format&0x3FFF)<<3));
|
||||
//printlog("Format: %04X\n",(format >> 14 & 3));
|
||||
//printlog("Texture %08X: width=%d, height=%d\n", format, sizeX, sizeY);
|
||||
|
||||
|
||||
//printlog("Texture slot: %02X\n",(format >> 14 & 3));
|
||||
//printlog("Texture slot offset: %02X\n",(format&0x3FFF)<<3);
|
||||
|
||||
switch(mode)
|
||||
{
|
||||
case 1:
|
||||
|
@ -591,7 +595,7 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//printlog("Texture mode %02i: x=%04d, colors=%04X, index=%04d\n",mode,x,pal[adr[x]],adr[x]);
|
||||
switch(mode)
|
||||
{
|
||||
|
@ -641,8 +645,9 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
dst += 4;
|
||||
CHECKSLOT;
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
{
|
||||
for(x = 0; x < imageSize; x++)
|
||||
|
@ -662,23 +667,24 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
dst += 4;
|
||||
CHECKSLOT;
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 4: //===================== ?
|
||||
case 4:
|
||||
{
|
||||
//printlog("texture mode 4");
|
||||
for(x = 0; x < imageSize; ++x, dst += 4)
|
||||
for(x = 0; x < imageSize; ++x)
|
||||
{
|
||||
unsigned short c = pal[adr[x]];
|
||||
dst[0] = (unsigned char)((c & 0x1F)<<3);
|
||||
dst[1] = (unsigned char)((c & 0x3E0)>>2);
|
||||
dst[2] = (unsigned char)((c & 0x7C00)>>7);
|
||||
dst[3] = (adr[x] == 0) ? palZeroTransparent : 255;
|
||||
dst += 4;
|
||||
CHECKSLOT;
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 5:
|
||||
{
|
||||
|
@ -687,16 +693,16 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
unsigned int * map = (unsigned int *)adr;
|
||||
unsigned i = 0;
|
||||
unsigned int * dst = (unsigned int *)texMAP;
|
||||
|
||||
if ( (format & 0xc000) == 0x8000)
|
||||
// texel are in slot 2
|
||||
slot1=(const unsigned short*)&ARM9Mem.textureSlotAddr[1][((format&0x3FFF)<<2)+0x010000];
|
||||
else
|
||||
slot1=(const unsigned short*)&ARM9Mem.textureSlotAddr[1][(format&0x3FFF)<<2];
|
||||
|
||||
for (y = 0; y < (sizeY/4); y ++)
|
||||
for (y = 0; y < (sizeY>>2); y ++)
|
||||
{
|
||||
for (x = 0; x < (sizeX/4); x ++, i++)
|
||||
u32 tmpPos[4]={(y<<2)*sizeX,((y<<2)+1)*sizeX,((y<<2)+2)*sizeX,((y<<2)+3)*sizeX};
|
||||
for (x = 0; x < (sizeX>>2); x ++, i++)
|
||||
{
|
||||
u32 currBlock = map[i], sy;
|
||||
u16 pal1 = slot1[i];
|
||||
|
@ -753,36 +759,38 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
for (sy = 0; sy < 4; sy++)
|
||||
{
|
||||
// Texture offset
|
||||
u32 currentPos = (x<<2) + ((y<<2) + sy)*sizeX;
|
||||
u8 currRow = (u8)((currBlock>>(sy*8))&0xFF);
|
||||
u32 currentPos = (x<<2) + tmpPos[sy];
|
||||
u8 currRow = (u8)((currBlock>>(sy<<3))&0xFF);
|
||||
|
||||
dst[currentPos+0] = tmp_col[(currRow>>0)&3];
|
||||
dst[currentPos] = tmp_col[currRow&3];
|
||||
dst[currentPos+1] = tmp_col[(currRow>>2)&3];
|
||||
dst[currentPos+2] = tmp_col[(currRow>>4)&3];
|
||||
dst[currentPos+3] = tmp_col[(currRow>>6)&3];
|
||||
//=====================================
|
||||
txt_slot_current_size-=4;;
|
||||
if (txt_slot_current_size<=0)
|
||||
{
|
||||
txt_slot_current++;
|
||||
*map=(unsigned char *)ARM9Mem.textureSlotAddr[txt_slot_current];
|
||||
map-=txt_slot_size>>2;
|
||||
txt_slot_size=txt_slot_current_size=0x020000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
txt_slot_current_size-=4;;
|
||||
if (txt_slot_current_size<=0)
|
||||
{
|
||||
txt_slot_current++;
|
||||
map=ARM9Mem.textureSlotAddr[txt_slot_current];
|
||||
map-=txt_slot_size>>2;
|
||||
txt_slot_size=(txt_slot_current_size=0x020000);
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
case 6:
|
||||
{
|
||||
for(x = 0; x < imageSize; x++, dst += 4)
|
||||
for(x = 0; x < imageSize; x++)
|
||||
{
|
||||
unsigned short c = pal[adr[x]&7];
|
||||
unsigned short c = pal[adr[x]&0x07];
|
||||
dst[0] = (unsigned char)((c & 0x1F)<<3);
|
||||
dst[1] = (unsigned char)((c & 0x3E0)>>2);
|
||||
dst[2] = (unsigned char)((c & 0x7C00)>>7);
|
||||
dst[3] = (adr[x]&0xF8);
|
||||
if (dst[3]!=0) dst[3]|=0x07;
|
||||
dst += 4;
|
||||
CHECKSLOT;
|
||||
}
|
||||
break;
|
||||
|
@ -790,7 +798,7 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
case 7:
|
||||
{
|
||||
unsigned short * map = ((unsigned short *)adr);
|
||||
for(x = 0; x < imageSize; ++x, dst += 4)
|
||||
for(x = 0; x < imageSize; ++x)
|
||||
{
|
||||
unsigned short c = map[x];
|
||||
dst[0] = ((c & 0x1F)<<3);
|
||||
|
@ -798,19 +806,19 @@ static __inline u32 *SetupTexture (unsigned int format, unsigned int palette)
|
|||
dst[2] = ((c & 0x7C00)>>7);
|
||||
dst[3] = (c>>15)*255;
|
||||
|
||||
dst += 4;
|
||||
txt_slot_current_size-=2;;
|
||||
if (txt_slot_current_size<=0)
|
||||
{
|
||||
txt_slot_current++;
|
||||
*map=(unsigned char *)ARM9Mem.textureSlotAddr[txt_slot_current];
|
||||
map-=txt_slot_size>>1;
|
||||
txt_slot_size=txt_slot_current_size=0x020000;
|
||||
}
|
||||
}
|
||||
txt_slot_current_size-=2;;
|
||||
if (txt_slot_current_size<=0)
|
||||
{
|
||||
txt_slot_current++;
|
||||
map=ARM9Mem.textureSlotAddr[txt_slot_current];
|
||||
map-=txt_slot_size>>1;
|
||||
txt_slot_size=(txt_slot_current_size=0x020000);
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
return texMAP;
|
||||
}
|
||||
|
||||
void NDS_glBegin(unsigned long v)
|
||||
|
@ -823,24 +831,14 @@ void NDS_glBegin(unsigned long v)
|
|||
// Light enable/disable
|
||||
if (lightMask)
|
||||
{
|
||||
if (lightMask&1) glEnable (GL_LIGHT0);
|
||||
else glDisable(GL_LIGHT0);
|
||||
|
||||
if (lightMask&2) glEnable (GL_LIGHT1);
|
||||
else glDisable(GL_LIGHT1);
|
||||
|
||||
if (lightMask&4) glEnable (GL_LIGHT2);
|
||||
else glDisable(GL_LIGHT2);
|
||||
|
||||
if (lightMask&8) glEnable (GL_LIGHT3);
|
||||
else glDisable(GL_LIGHT3);
|
||||
|
||||
glEnable (GL_LIGHTING);
|
||||
(lightMask&1)?glEnable (GL_LIGHT0):glDisable(GL_LIGHT0);
|
||||
(lightMask&2)?glEnable (GL_LIGHT1):glDisable(GL_LIGHT1);
|
||||
(lightMask&4)?glEnable (GL_LIGHT2):glDisable(GL_LIGHT2);
|
||||
(lightMask&8)?glEnable (GL_LIGHT3):glDisable(GL_LIGHT3);
|
||||
}
|
||||
else
|
||||
{
|
||||
glDisable (GL_LIGHTING);
|
||||
}
|
||||
|
||||
glDepthFunc (depthFuncMode);
|
||||
|
||||
|
@ -851,9 +849,7 @@ void NDS_glBegin(unsigned long v)
|
|||
glCullFace(map3d_cull[cullingMask>>6]);
|
||||
}
|
||||
else
|
||||
{
|
||||
glDisable(GL_CULL_FACE);
|
||||
}
|
||||
|
||||
// Alpha value, actually not well handled, 0 should be wireframe
|
||||
if (colorAlpha > 0.0f)
|
||||
|
@ -878,37 +874,36 @@ void NDS_glBegin(unsigned long v)
|
|||
}
|
||||
|
||||
// texture environment
|
||||
if (textureFormat!=0)
|
||||
//printlog("textureFormat=%i\n",((textureFormat>>26)&0x07));
|
||||
if (((textureFormat>>26)&0x07)!=0)
|
||||
{
|
||||
glTexEnvi (GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, texEnv[envMode]);
|
||||
glTexEnvi (GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, envMode);
|
||||
glEnable(GL_TEXTURE_2D);
|
||||
glBindTexture(GL_TEXTURE_2D, oglTextureID);
|
||||
|
||||
if (textureFormat != lastTextureFormat || texturePalette != lastTexturePalette)
|
||||
{
|
||||
u32 *tmp;
|
||||
|
||||
sizeX = (1<<(((textureFormat>>20)&0x7)+3));
|
||||
sizeY = (1<<(((textureFormat>>23)&0x7)+3));
|
||||
tmp=SetupTexture (textureFormat, texturePalette);
|
||||
glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, sizeX, sizeY, 0, GL_RGBA, GL_UNSIGNED_BYTE, tmp);
|
||||
SetupTexture (textureFormat, texturePalette);
|
||||
glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, sizeX, sizeY, 0, GL_RGBA, GL_UNSIGNED_BYTE, texMAP);
|
||||
glTexParameteri(GL_TEXTURE_2D,GL_TEXTURE_MIN_FILTER,GL_NEAREST);
|
||||
glTexParameteri(GL_TEXTURE_2D,GL_TEXTURE_MAG_FILTER,GL_NEAREST);
|
||||
// S Coordinate options
|
||||
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, (BIT16(textureFormat) ? GL_REPEAT : GL_CLAMP));
|
||||
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, (BIT16(textureFormat) ? (BIT18(textureFormat)?GL_MIRRORED_REPEAT:GL_REPEAT) : GL_CLAMP));
|
||||
// T Coordinate options
|
||||
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, (BIT17(textureFormat) ? GL_REPEAT : GL_CLAMP));
|
||||
glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, (BIT17(textureFormat) ? (BIT18(textureFormat)?GL_MIRRORED_REPEAT:GL_REPEAT) : GL_CLAMP));
|
||||
|
||||
lastTextureFormat = textureFormat;
|
||||
lastTexturePalette = texturePalette;
|
||||
|
||||
texCoordinateTransform = (textureFormat>>30);
|
||||
invTexWidth = 1.f/((float)sizeX*(1<<4));
|
||||
invTexHeight = 1.f/((float)sizeY*(1<<4));
|
||||
invTexWidth = 1.0f/((float)sizeX*(1<<4));
|
||||
invTexHeight = 1.0f/((float)sizeY*(1<<4));
|
||||
}
|
||||
|
||||
glMatrixMode (GL_TEXTURE);
|
||||
glLoadIdentity ();
|
||||
glScaled (invTexWidth, invTexHeight, 1.f);
|
||||
glScaled (invTexWidth, invTexHeight, 1.0f);
|
||||
}
|
||||
else
|
||||
glDisable(GL_TEXTURE_2D);
|
||||
|
|
|
@ -46,6 +46,7 @@
|
|||
#include "mapview.h"
|
||||
#include "matrixview.h"
|
||||
#include "lightview.h"
|
||||
#include "textureview.h"
|
||||
#include "ConfigKeys.h"
|
||||
#include "FirmConfig.h"
|
||||
#include "AboutBox.h"
|
||||
|
@ -95,7 +96,7 @@ BOOL click = FALSE;
|
|||
BOOL finished = FALSE;
|
||||
BOOL romloaded = FALSE;
|
||||
|
||||
BOOL ForceRatio = FALSE;
|
||||
BOOL ForceRatio = TRUE;
|
||||
float DefaultWidth;
|
||||
float DefaultHeight;
|
||||
float widthTradeOff;
|
||||
|
@ -787,6 +788,7 @@ int WINAPI WinMain (HINSTANCE hThisInstance,
|
|||
hwnd = MainWindow.hwnd;
|
||||
menu = LoadMenu(hThisInstance, "MENU_PRINCIPAL");
|
||||
SetMenu(hwnd, menu);
|
||||
CheckMenuItem(menu, IDC_FORCERATIO, MF_BYCOMMAND | MF_CHECKED);
|
||||
hdc = GetDC(hwnd);
|
||||
DragAcceptFiles(hwnd, TRUE);
|
||||
|
||||
|
@ -1389,6 +1391,14 @@ LRESULT CALLBACK WindowProcedure (HWND hwnd, UINT message, WPARAM wParam, LPARAM
|
|||
if ((PalView = PalView_Init(hAppInst, HWND_DESKTOP)) != NULL)
|
||||
CWindow_Show(PalView);
|
||||
}
|
||||
return 0;
|
||||
case IDM_TEX:
|
||||
{
|
||||
texview_struct *TexView;
|
||||
|
||||
if ((TexView = TexView_Init(hAppInst, HWND_DESKTOP)) != NULL)
|
||||
CWindow_Show(TexView);
|
||||
}
|
||||
return 0;
|
||||
case IDM_TILE:
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue