GDB Stub:

- Fix bug where set breakpoints were being ignored. (Regression from r5061.)
- Do some more cleanup on the GDB stub init code.
This commit is contained in:
rogerman 2015-01-04 04:45:53 +00:00
parent a987ce8ad2
commit 9273aa58cd
12 changed files with 288 additions and 170 deletions

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@ -1,7 +1,7 @@
/*
Copyright (C) 2006 yopyop
Copyright (C) 2007 shash
Copyright (C) 2007-2013 DeSmuME team
Copyright (C) 2007-2015 DeSmuME team
This file is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -5494,30 +5494,34 @@ static void FASTCALL arm7_write32(void *data, u32 adr, u32 val) {
/*
* the base memory interfaces
*/
struct armcpu_memory_iface arm9_base_memory_iface = {
arm9_prefetch32,
arm9_prefetch16,
arm9_read8,
arm9_read16,
arm9_read32,
arm9_write8,
arm9_write16,
arm9_write32
const armcpu_memory_iface arm9_base_memory_iface = {
arm9_prefetch32,
arm9_prefetch16,
arm9_read8,
arm9_read16,
arm9_read32,
arm9_write8,
arm9_write16,
arm9_write32,
NULL
};
struct armcpu_memory_iface arm7_base_memory_iface = {
arm7_prefetch32,
arm7_prefetch16,
arm7_read8,
arm7_read16,
arm7_read32,
arm7_write8,
arm7_write16,
arm7_write32
const armcpu_memory_iface arm7_base_memory_iface = {
arm7_prefetch32,
arm7_prefetch16,
arm7_read8,
arm7_read16,
arm7_read32,
arm7_write8,
arm7_write16,
arm7_write32,
NULL
};
/*
@ -5525,17 +5529,19 @@ struct armcpu_memory_iface arm7_base_memory_iface = {
* This avoids the ARM9 protection unit when accessing
* memory.
*/
struct armcpu_memory_iface arm9_direct_memory_iface = {
NULL,
NULL,
arm9_read8,
arm9_read16,
arm9_read32,
arm9_write8,
arm9_write16,
arm9_write32
const armcpu_memory_iface arm9_direct_memory_iface = {
NULL,
NULL,
arm9_read8,
arm9_read16,
arm9_read32,
arm9_write8,
arm9_write16,
arm9_write32,
NULL
};

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@ -1,7 +1,7 @@
/*
Copyright (C) 2006 yopyop
Copyright (C) 2007 shash
Copyright (C) 2007-2012 DeSmuME team
Copyright (C) 2007-2015 DeSmuME team
This file is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -513,7 +513,7 @@ extern MMU_struct MMU;
extern MMU_struct_new MMU_new;
struct armcpu_memory_iface {
typedef struct {
/** the 32 bit instruction prefetch */
u32 FASTCALL (*prefetch32)( void *data, u32 adr);
@ -535,7 +535,7 @@ struct armcpu_memory_iface {
void FASTCALL (*write32)( void *data, u32 adr, u32 val);
void *data;
};
} armcpu_memory_iface;
void MMU_Init(void);
@ -556,9 +556,9 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val);
//template<int PROCNUM> void FASTCALL MMU_doDMA(u32 num);
//The base ARM memory interfaces
extern struct armcpu_memory_iface arm9_base_memory_iface;
extern struct armcpu_memory_iface arm7_base_memory_iface;
extern struct armcpu_memory_iface arm9_direct_memory_iface;
extern const armcpu_memory_iface arm9_base_memory_iface;
extern const armcpu_memory_iface arm7_base_memory_iface;
extern const armcpu_memory_iface arm9_direct_memory_iface;
#define VRAM_BANKS 9
#define VRAM_BANK_A 0

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@ -139,10 +139,15 @@ int NDS_Init()
gfx3d_init();
armcpu_new(&NDS_ARM7,1);
armcpu_new(&NDS_ARM9,0);
NDS_ARM9.InitCtrlInterface(&arm9_base_memory_iface);
NDS_ARM7.InitCtrlInterface(&arm7_base_memory_iface);
NDS_ARM9.SetBaseMemoryInterface(&arm9_base_memory_iface);
NDS_ARM9.SetBaseMemoryInterfaceData(NULL);
NDS_ARM9.ResetMemoryInterfaceToBase();
armcpu_new(&NDS_ARM7,1);
NDS_ARM7.SetBaseMemoryInterface(&arm7_base_memory_iface);
NDS_ARM7.SetBaseMemoryInterfaceData(NULL);
NDS_ARM7.ResetMemoryInterfaceToBase();
if (SPU_Init(SNDCORE_DUMMY, 740) != 0)
return -1;

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@ -123,33 +123,97 @@ int armcpu_new( armcpu_t *armcpu, u32 id)
{
armcpu->proc_ID = id;
armcpu->stalled = 0;
armcpu->base_mem_if.prefetch32 = NULL;
armcpu->base_mem_if.prefetch16 = NULL;
armcpu->base_mem_if.read8 = NULL;
armcpu->base_mem_if.read16 = NULL;
armcpu->base_mem_if.read32 = NULL;
armcpu->base_mem_if.write8 = NULL;
armcpu->base_mem_if.write16 = NULL;
armcpu->base_mem_if.write32 = NULL;
armcpu->base_mem_if.data = NULL;
armcpu->SetControlInterface(&arm_default_ctrl_iface);
armcpu->SetControlInterfaceData(armcpu);
armcpu->SetCurrentMemoryInterface(NULL);
armcpu->SetCurrentMemoryInterfaceData(NULL);
armcpu->post_ex_fn = NULL;
armcpu->post_ex_fn_data = NULL;
armcpu_init(armcpu, 0);
return 0;
}
armcpu_ctrl_iface* armcpu_t::InitCtrlInterface(armcpu_memory_iface *mem_iface)
void armcpu_t::SetControlInterface(const armcpu_ctrl_iface *theControlInterface)
{
this->ctrl_iface = *theControlInterface;
}
armcpu_ctrl_iface* armcpu_t::GetControlInterface()
{
this->mem_if = mem_iface;
/* populate the control interface */
this->ctrl_iface.stall = stall_cpu;
this->ctrl_iface.unstall = unstall_cpu;
this->ctrl_iface.read_reg = read_cpu_reg;
this->ctrl_iface.set_reg = set_cpu_reg;
this->ctrl_iface.install_post_ex_fn = install_post_exec_fn;
this->ctrl_iface.remove_post_ex_fn = remove_post_exec_fn;
this->ctrl_iface.data = this;
this->post_ex_fn = NULL;
return &this->ctrl_iface;
}
armcpu_ctrl_iface* armcpu_t::GetCtrlInterface()
void armcpu_t::SetControlInterfaceData(void *theData)
{
return &this->ctrl_iface;
this->ctrl_iface.data = theData;
}
void* armcpu_t::GetControlInterfaceData()
{
return this->ctrl_iface.data;
}
void armcpu_t::SetCurrentMemoryInterface(armcpu_memory_iface *theMemoryInterface)
{
this->mem_if = theMemoryInterface;
}
armcpu_memory_iface* armcpu_t::GetCurrentMemoryInterface()
{
return this->mem_if;
}
void armcpu_t::SetCurrentMemoryInterfaceData(void *theData)
{
if (this->mem_if != NULL)
{
this->mem_if->data = theData;
}
}
void* armcpu_t::GetCurrentMemoryInterfaceData()
{
return (this->mem_if != NULL) ? this->mem_if->data : NULL;
}
void armcpu_t::SetBaseMemoryInterface(const armcpu_memory_iface *theMemInterface)
{
this->base_mem_if = *theMemInterface;
}
armcpu_memory_iface* armcpu_t::GetBaseMemoryInterface()
{
return &this->base_mem_if;
}
void armcpu_t::SetBaseMemoryInterfaceData(void *theData)
{
this->base_mem_if.data = theData;
}
void* armcpu_t::GetBaseMemoryInterfaceData()
{
return this->base_mem_if.data;
}
void armcpu_t::ResetMemoryInterfaceToBase()
{
this->SetCurrentMemoryInterface(this->GetBaseMemoryInterface());
this->SetCurrentMemoryInterfaceData(this->GetBaseMemoryInterfaceData());
}
//call this whenever CPSR is changed (other than CNVZQ or T flags); interrupts may need to be unleashed
@ -681,3 +745,12 @@ template u32 armcpu_exec<1,false>();
template u32 armcpu_exec<1,true>();
#endif
const armcpu_ctrl_iface arm_default_ctrl_iface = {
stall_cpu,
unstall_cpu,
read_cpu_reg,
set_cpu_reg,
install_post_exec_fn,
remove_post_exec_fn,
NULL
};

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@ -223,7 +223,7 @@ typedef union
/**
* The control interface to a CPU
*/
struct armcpu_ctrl_iface {
typedef struct {
/** stall the processor */
void (*stall)( void *instance);
@ -246,7 +246,7 @@ struct armcpu_ctrl_iface {
/** the private data passed to all interface functions */
void *data;
};
} armcpu_ctrl_iface;
typedef void* armcp_t;
@ -262,8 +262,23 @@ struct armcpu_t
Status_Reg CPSR; //80
Status_Reg SPSR;
armcpu_ctrl_iface* InitCtrlInterface(armcpu_memory_iface *mem_iface);
armcpu_ctrl_iface* GetCtrlInterface();
void SetControlInterface(const armcpu_ctrl_iface *theCtrlInterface);
armcpu_ctrl_iface* GetControlInterface();
void SetControlInterfaceData(void *theData);
void* GetControlInterfaceData();
void SetCurrentMemoryInterface(armcpu_memory_iface *theMemInterface);
armcpu_memory_iface* GetCurrentMemoryInterface();
void SetCurrentMemoryInterfaceData(void *theData);
void* GetCurrentMemoryInterfaceData();
void SetBaseMemoryInterface(const armcpu_memory_iface *theMemInterface);
armcpu_memory_iface* GetBaseMemoryInterface();
void SetBaseMemoryInterfaceData(void *theData);
void* GetBaseMemoryInterfaceData();
void ResetMemoryInterfaceToBase();
void changeCPSR();
u32 R13_usr, R14_usr;
@ -290,23 +305,22 @@ struct armcpu_t
#if defined(_M_X64) || defined(__x86_64__)
u8 cond_table[16*16];
#endif
/** there is a pending irq for the cpu */
int irq_flag;
/** the post executed function (if installed) */
void (*post_ex_fn)( void *, u32 adr, int thumb);
/** data for the post executed function */
void *post_ex_fn_data;
/** the memory interface */
struct armcpu_memory_iface *mem_if;
/** the ctrl interface */
struct armcpu_ctrl_iface ctrl_iface;
/** there is a pending irq for the cpu */
int irq_flag;
/** the post executed function (if installed) */
void (*post_ex_fn)( void *, u32 adr, int thumb);
/** data for the post executed function */
void *post_ex_fn_data;
/** the memory interface */
armcpu_memory_iface *mem_if; // This is the memory interface currently in use.
armcpu_memory_iface base_mem_if; // This is the CPU's base memory interface.
/** the ctrl interface */
armcpu_ctrl_iface ctrl_iface;
};
int armcpu_new( armcpu_t *armcpu, u32 id);
@ -322,6 +336,7 @@ u32 armcpu_Wait4IRQ(armcpu_t *cpu);
extern armcpu_t NDS_ARM7;
extern armcpu_t NDS_ARM9;
extern const armcpu_ctrl_iface arm_default_ctrl_iface;
template<int PROCNUM> u32 armcpu_exec();
#ifdef HAVE_JIT

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@ -1,6 +1,6 @@
/* main.c - this file is part of DeSmuME
*
* Copyright (C) 2006,2007 DeSmuME Team
* Copyright (C) 2006-2015 DeSmuME Team
* Copyright (C) 2007 Pascal Giard (evilynux)
*
* This file is free software; you can redistribute it and/or modify
@ -598,12 +598,10 @@ int main(int argc, char ** argv) {
*/
gdbstub_handle_t arm9_gdb_stub = NULL;
gdbstub_handle_t arm7_gdb_stub = NULL;
struct armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface;
struct armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface;
if ( my_config.arm9_gdb_port > 0) {
arm9_gdb_stub = createStub_gdb( my_config.arm9_gdb_port,
&arm9_memio,
&NDS_ARM9,
&arm9_direct_memory_iface);
if ( arm9_gdb_stub == NULL) {
@ -612,12 +610,12 @@ int main(int argc, char ** argv) {
exit( 1);
}
else {
activateStub_gdb( arm9_gdb_stub, NDS_ARM9.GetCtrlInterface());
activateStub_gdb( arm9_gdb_stub);
}
}
if ( my_config.arm7_gdb_port > 0) {
arm7_gdb_stub = createStub_gdb( my_config.arm7_gdb_port,
&arm7_memio,
&NDS_ARM7,
&arm7_base_memory_iface);
if ( arm7_gdb_stub == NULL) {
@ -626,7 +624,7 @@ int main(int argc, char ** argv) {
exit( 1);
}
else {
activateStub_gdb( arm7_gdb_stub, NDS_ARM7.GetCtrlInterface());
activateStub_gdb( arm7_gdb_stub);
}
}
#endif

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@ -75,7 +75,7 @@ volatile bool execute = true;
@dynamic speedScalar;
@dynamic isGdbStubStarted;
@synthesize isInDebugTrap;
@dynamic isInDebugTrap;
@synthesize enableGdbStubARM9;
@synthesize enableGdbStubARM7;
@synthesize gdbStubPortARM9;
@ -362,16 +362,14 @@ volatile bool execute = true;
const uint16_t arm9Port = (uint16_t)[self gdbStubPortARM9];
if(arm9Port > 0)
{
armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface;
gdbStubHandleARM9 = createStub_gdb(arm9Port, &arm9_memio, &arm9_direct_memory_iface);
gdbStubHandleARM9 = createStub_gdb(arm9Port, &NDS_ARM9, &arm9_direct_memory_iface);
if (gdbStubHandleARM9 == NULL)
{
NSLog(@"Failed to create ARM9 gdbstub on port %d\n", arm9Port);
}
else
{
activateStub_gdb(gdbStubHandleARM9, NDS_ARM9.GetCtrlInterface());
activateStub_gdb(gdbStubHandleARM9);
}
}
}
@ -386,16 +384,14 @@ volatile bool execute = true;
const uint16_t arm7Port = (uint16_t)[self gdbStubPortARM7];
if (arm7Port > 0)
{
armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface;
gdbStubHandleARM7 = createStub_gdb(arm7Port, &arm7_memio, &arm7_base_memory_iface);
gdbStubHandleARM7 = createStub_gdb(arm7Port, &NDS_ARM7, &arm7_base_memory_iface);
if (gdbStubHandleARM7 == NULL)
{
NSLog(@"Failed to create ARM7 gdbstub on port %d\n", arm7Port);
}
else
{
activateStub_gdb(gdbStubHandleARM7, NDS_ARM7.GetCtrlInterface());
activateStub_gdb(gdbStubHandleARM7);
}
}
}
@ -427,6 +423,23 @@ volatile bool execute = true;
return isGdbStubStarted;
}
- (void) setIsInDebugTrap:(BOOL)theState
{
// If we're transitioning out of the debug trap, then ignore
// frame skipping this time.
if (isInDebugTrap && !theState)
{
threadParam.framesToSkip = 0;
}
isInDebugTrap = theState;
}
- (BOOL) isInDebugTrap
{
return isInDebugTrap;
}
- (void) setEmulationFlags:(NSUInteger)theFlags
{
OSSpinLockLock(&spinlockEmulationFlags);

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@ -23,21 +23,24 @@
typedef void *gdbstub_handle_t;
#ifdef GDB_STUB
extern const armcpu_memory_iface gdb_memory_iface;
#endif
/*
* The function interface
*/
gdbstub_handle_t
createStub_gdb( u16 port,
struct armcpu_memory_iface **cpu_memio,
struct armcpu_memory_iface *direct_memio);
armcpu_t *theCPU,
const armcpu_memory_iface *direct_memio);
void
destroyStub_gdb( gdbstub_handle_t stub);
void
activateStub_gdb( gdbstub_handle_t stub,
struct armcpu_ctrl_iface *cpu_ctrl);
activateStub_gdb( gdbstub_handle_t stub);
/*
* An implementation of the following functions is required

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@ -301,7 +301,7 @@ hexToInt( const uint8_t **ptr, uint32_t *intValue)
*/
static uint8_t *
mem2hex ( struct armcpu_memory_iface *memio, uint32_t mem_addr,
mem2hex ( armcpu_memory_iface *memio, uint32_t mem_addr,
uint8_t *buf, int count)
{
uint8_t ch;
@ -638,7 +638,7 @@ processPacket_gdb( SOCKET_TYPE sock, const uint8_t *packet,
if ( *rx_ptr++ == ',') {
if ( hexToInt( &rx_ptr, &length)) {
//DEBUG_LOG("mem read from %08x (%d)\n", addr, length);
if ( !mem2hex( stub->direct_memio, addr, out_ptr, length)) {
if ( !mem2hex( &stub->direct_memio, addr, out_ptr, length)) {
strcpy ( (char *)out_ptr, "E03");
send_size = 3;
}
@ -674,8 +674,8 @@ processPacket_gdb( SOCKET_TYPE sock, const uint8_t *packet,
for ( i = 0; i < length; i++) {
rx_ptr = hex2mem( rx_ptr, &write_byte, 1);
stub->direct_memio->write8( stub->direct_memio->data,
addr++, write_byte);
stub->direct_memio.write8( stub->direct_memio.data,
addr++, write_byte);
}
strcpy( (char *)out_ptr, "OK");
@ -1300,9 +1300,8 @@ gdb_read8( void *data, uint32_t adr) {
uint8_t value = 0;
int breakpoint;
/* pass down to the real memory interace */
value = stub->real_cpu_memio->read8( stub->real_cpu_memio->data,
adr);
/* pass down to the CPU's memory interface */
value = stub->cpu_memio->read8( stub->cpu_memio->data, adr);
breakpoint = check_breaks_gdb( stub, stub->read_breakpoints, adr, 1,
STOP_RWATCHPOINT);
@ -1320,9 +1319,8 @@ gdb_read16( void *data, uint32_t adr) {
uint16_t value;
int breakpoint;
/* pass down to the real memory interace */
value = stub->real_cpu_memio->read16( stub->real_cpu_memio->data,
adr);
/* pass down to the CPU's memory interface */
value = stub->cpu_memio->read16( stub->cpu_memio->data, adr);
breakpoint = check_breaks_gdb( stub, stub->read_breakpoints, adr, 2,
STOP_RWATCHPOINT);
@ -1339,9 +1337,8 @@ gdb_read32( void *data, uint32_t adr) {
uint32_t value;
int breakpoint;
/* pass down to the real memory interace */
value = stub->real_cpu_memio->read32( stub->real_cpu_memio->data,
adr);
/* pass down to the CPU's memory interface */
value = stub->cpu_memio->read32( stub->cpu_memio->data, adr);
breakpoint = check_breaks_gdb( stub, stub->read_breakpoints, adr, 4,
STOP_RWATCHPOINT);
@ -1358,9 +1355,8 @@ gdb_write8( void *data, uint32_t adr, uint8_t val) {
struct gdb_stub_state *stub = (struct gdb_stub_state *)data;
int breakpoint;
/* pass down to the real memory interace */
stub->real_cpu_memio->write8( stub->real_cpu_memio->data,
adr, val);
/* pass down to the CPU's memory interface */
stub->cpu_memio->write8( stub->cpu_memio->data, adr, val);
breakpoint = check_breaks_gdb( stub, stub->write_breakpoints, adr, 1,
STOP_WATCHPOINT);
@ -1375,9 +1371,8 @@ gdb_write16( void *data, uint32_t adr, uint16_t val) {
struct gdb_stub_state *stub = (struct gdb_stub_state *)data;
int breakpoint;
/* pass down to the real memory interace */
stub->real_cpu_memio->write16( stub->real_cpu_memio->data,
adr, val);
/* pass down to the CPU's memory interface */
stub->cpu_memio->write16( stub->cpu_memio->data, adr, val);
breakpoint = check_breaks_gdb( stub, stub->write_breakpoints, adr, 2,
STOP_WATCHPOINT);
@ -1392,9 +1387,8 @@ gdb_write32( void *data, uint32_t adr, uint32_t val) {
struct gdb_stub_state *stub = (struct gdb_stub_state *)data;
int breakpoint;
/* pass down to the real memory interace */
stub->real_cpu_memio->write32( stub->real_cpu_memio->data,
adr, val);
/* pass down to the CPU's memory interface */
stub->cpu_memio->write32( stub->cpu_memio->data, adr, val);
breakpoint = check_breaks_gdb( stub, stub->write_breakpoints, adr, 4,
STOP_WATCHPOINT);
@ -1449,39 +1443,32 @@ control_creator( LPVOID lpParameter)
*/
gdbstub_handle_t
createStub_gdb( uint16_t port,
struct armcpu_memory_iface **cpu_memio,
struct armcpu_memory_iface *direct_memio) {
struct gdb_stub_state *stub;
armcpu_t *theCPU,
const armcpu_memory_iface *direct_memio) {
struct gdb_stub_state *stub = NULL;
int i;
int res = 0;
if (theCPU == NULL) {
return stub;
}
stub = (gdb_stub_state*)malloc( sizeof (struct gdb_stub_state));
if ( stub == NULL) {
return NULL;
return stub;
}
stub->arm_cpu_object = theCPU;
stub->active = 0;
/* keep the memory interfaces */
stub->real_cpu_memio = *cpu_memio;
stub->direct_memio = direct_memio;
*cpu_memio = &stub->cpu_memio;
/* fill in the memory interface */
stub->cpu_memio.data = stub;
stub->cpu_memio.prefetch32 = gdb_prefetch32;
stub->cpu_memio.prefetch16 = gdb_prefetch16;
stub->cpu_memio.read8 = gdb_read8;
stub->cpu_memio.read16 = gdb_read16;
stub->cpu_memio.read32 = gdb_read32;
stub->cpu_memio.write8 = gdb_write8;
stub->cpu_memio.write16 = gdb_write16;
stub->cpu_memio.write32 = gdb_write32;
stub->cpu_memio = theCPU->GetBaseMemoryInterface();
stub->direct_memio = *direct_memio;
stub->gdb_memio = gdb_memory_iface;
stub->gdb_memio.data = stub;
stub->cpu_ctrl = theCPU->GetControlInterface();
/* put the breakpoint descriptors onto the free list */
for ( i = 0; i < BREAKPOINT_POOL_SIZE - 1; i++) {
@ -1602,6 +1589,7 @@ destroyStub_gdb( gdbstub_handle_t instance) {
if (instance == NULL) return;
struct gdb_stub_state *stub = (struct gdb_stub_state *)instance;
armcpu_t *theCPU = (armcpu_t *)stub->arm_cpu_object;
causeQuit_gdb( stub);
@ -1610,21 +1598,39 @@ destroyStub_gdb( gdbstub_handle_t instance) {
//stub->cpu_ctl->unstall( stub->cpu_ctl->data);
//stub->cpu_ctl->remove_post_ex_fn( stub->cpu_ctl->data);
theCPU->ResetMemoryInterfaceToBase();
DEBUG_LOG("Destroyed GDB stub on port %d\n", stub->port_num);
free( stub);
}
void
activateStub_gdb( gdbstub_handle_t instance,
struct armcpu_ctrl_iface *cpu_ctrl) {
if (instance == NULL || cpu_ctrl == NULL) return;
activateStub_gdb( gdbstub_handle_t instance) {
if (instance == NULL) return;
struct gdb_stub_state *stub = (struct gdb_stub_state *)instance;
armcpu_t *theCPU = (armcpu_t *)stub->arm_cpu_object;
stub->cpu_ctrl = cpu_ctrl;
theCPU->SetCurrentMemoryInterface(&stub->gdb_memio);
/* stall the cpu */
stub->cpu_ctrl->stall( stub->cpu_ctrl->data);
stub->active = 1;
}
// GDB memory interface for the ARM CPUs
const armcpu_memory_iface gdb_memory_iface = {
gdb_prefetch32,
gdb_prefetch16,
gdb_read8,
gdb_read16,
gdb_read32,
gdb_write8,
gdb_write16,
gdb_write32,
NULL
};

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@ -1,5 +1,5 @@
/*
Copyright (C) 2008-2009 DeSmuME team
Copyright (C) 2008-2015 DeSmuME team
Originally written by Ben Jaques.
@ -86,21 +86,23 @@ struct gdb_stub_state {
/** the listener thread */
void *thread;
void *arm_cpu_object;
/** the id of the cpu the is under control */
//u32 cpu_id;
/** the interface used to control the CPU */
struct armcpu_ctrl_iface *cpu_ctrl;
armcpu_ctrl_iface *cpu_ctrl;
/** the memory interface passed to the CPU */
struct armcpu_memory_iface cpu_memio;
/** the CPU's memory interface */
armcpu_memory_iface *cpu_memio;
/** the direct interface to the memory system */
struct armcpu_memory_iface *direct_memio;
armcpu_memory_iface direct_memio;
/** the CPU memory interface to the real memory system */
struct armcpu_memory_iface *real_cpu_memio;
/** GDB stub's memory interface passed to the CPU */
armcpu_memory_iface gdb_memio;
/** the list of active instruction breakpoints */
struct breakpoint_gdb *instr_breakpoints;

View File

@ -2918,13 +2918,11 @@ common_gtk_main( class configured_features *my_config)
#ifdef GDB_STUB
gdbstub_handle_t arm9_gdb_stub = NULL;
gdbstub_handle_t arm7_gdb_stub = NULL;
struct armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface;
struct armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface;
if ( my_config->arm9_gdb_port > 0) {
arm9_gdb_stub = createStub_gdb( my_config->arm9_gdb_port,
&arm9_memio,
&arm9_base_memory_iface);
&NDS_ARM9,
&arm9_direct_memory_iface);
if ( arm9_gdb_stub == NULL) {
g_printerr("Failed to create ARM9 gdbstub on port %d\n",
@ -2932,12 +2930,12 @@ common_gtk_main( class configured_features *my_config)
exit( -1);
}
else {
activateStub_gdb( arm9_gdb_stub, NDS_ARM9.GetCtrlInterface());
activateStub_gdb( arm9_gdb_stub);
}
}
if ( my_config->arm7_gdb_port > 0) {
arm7_gdb_stub = createStub_gdb( my_config->arm7_gdb_port,
&arm7_memio,
&NDS_ARM7,
&arm7_base_memory_iface);
if ( arm7_gdb_stub == NULL) {
@ -2946,7 +2944,7 @@ common_gtk_main( class configured_features *my_config)
exit( -1);
}
else {
activateStub_gdb( arm7_gdb_stub, NDS_ARM7.GetCtrlInterface());
activateStub_gdb( arm7_gdb_stub);
}
}
#endif
@ -3272,7 +3270,10 @@ common_gtk_main( class configured_features *my_config)
#ifdef GDB_STUB
destroyStub_gdb( arm9_gdb_stub);
arm9_gdb_stub = NULL;
destroyStub_gdb( arm7_gdb_stub);
arm7_gdb_stub = NULL;
#endif
return EXIT_SUCCESS;

View File

@ -3248,9 +3248,7 @@ int _main()
if (cmdline.arm9_gdb_port > 0)
{
armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface;
arm9_gdb_stub = createStub_gdb(cmdline.arm9_gdb_port, &arm9_memio, &arm9_direct_memory_iface);
arm9_gdb_stub = createStub_gdb(cmdline.arm9_gdb_port, &NDS_ARM9, &arm9_direct_memory_iface);
if (arm9_gdb_stub == NULL)
{
MessageBox(MainWindow->getHWnd(), "Failed to create ARM9 gdbstub", "Error", MB_OK);
@ -3258,15 +3256,13 @@ int _main()
}
else
{
activateStub_gdb(arm9_gdb_stub, NDS_ARM9.GetCtrlInterface());
activateStub_gdb(arm9_gdb_stub);
}
}
if (cmdline.arm7_gdb_port > 0)
{
armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface;
arm7_gdb_stub = createStub_gdb(cmdline.arm7_gdb_port, &arm7_memio, &arm7_base_memory_iface);
arm7_gdb_stub = createStub_gdb(cmdline.arm7_gdb_port, &NDS_ARM7, &arm7_base_memory_iface);
if (arm7_gdb_stub == NULL)
{
MessageBox(MainWindow->getHWnd(), "Failed to create ARM7 gdbstub", "Error", MB_OK);
@ -3274,7 +3270,7 @@ int _main()
}
else
{
activateStub_gdb(arm7_gdb_stub, NDS_ARM7.GetCtrlInterface());
activateStub_gdb(arm7_gdb_stub);
}
}
#endif