Stub implementation for ARM7 SWI #7 (Sleep), by writing 0xC0 to HALTCNT, exactly as on the DS.
TODO: implement HALTCNT at the MMU side.
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@ -312,6 +312,12 @@ TEMPLATE static u32 wait4IRQ()
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return 1;
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}
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TEMPLATE static u32 sleep()
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{
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_MMU_write08(cpu->proc_ID, 0x04000301, 0xC0);
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return 1;
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}
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TEMPLATE static u32 divide()
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{
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s32 num = (s32)cpu->R[0];
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@ -1059,7 +1065,7 @@ u32 (* ARM7_swi_tab[32])()={
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intrWaitARM<ARMCPU_ARM7>, // 0x04
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waitVBlankARM<ARMCPU_ARM7>, // 0x05
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wait4IRQ<ARMCPU_ARM7>, // 0x06
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wait4IRQ<ARMCPU_ARM7>, // 0x07
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sleep<ARMCPU_ARM7>, // 0x07
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SoundBias<ARMCPU_ARM7>, // 0x08
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divide<ARMCPU_ARM7>, // 0x09
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bios_nop<ARMCPU_ARM7>, // 0x0A
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