framebuffer mode now also works from LCD memory
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540ffbbcda
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@ -105,6 +105,11 @@ void GPU_Reset(GPU *g, u8 l)
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g->BGSize[0][1] = g->BGSize[1][1] = g->BGSize[2][1] = g->BGSize[3][1] = 256;
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g->BGSize[0][1] = g->BGSize[1][1] = g->BGSize[2][1] = g->BGSize[3][1] = 256;
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g->dispOBJ = g->dispBG[0] = g->dispBG[1] = g->dispBG[2] = g->dispBG[3] = TRUE;
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g->dispOBJ = g->dispBG[0] = g->dispBG[1] = g->dispBG[2] = g->dispBG[3] = TRUE;
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MMU.vram_mode[0] = 4 ;
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MMU.vram_mode[1] = 5 ;
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MMU.vram_mode[2] = 6 ;
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MMU.vram_mode[3] = 7 ;
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g->spriteRender = sprite1D;
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g->spriteRender = sprite1D;
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if(g->core == GPU_SUB)
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if(g->core == GPU_SUB)
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@ -1210,7 +1215,7 @@ INLINE void extRotBG2(GPU * gpu, u8 num, u8 * DST, u16 H, s32 X, s32 Y, s16 PA,
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y1 = (mapinfo & 0x800) ? 7 - (auxY&7) : (auxY&7);
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y1 = (mapinfo & 0x800) ? 7 - (auxY&7) : (auxY&7);
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coul = tile[(mapinfo&0x3FF)*64 + x1 + (y1<<3)];
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coul = tile[(mapinfo&0x3FF)*64 + x1 + (y1<<3)];
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if(coul)
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if(coul)
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renderline_setFinalColor(gpu,0,num,dst, T1ReadWord(pal, (coul + (mapinfo>>12)*0x100) << 1),x,Y);
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renderline_setFinalColor(gpu,0,num,dst, T1ReadWord(pal, (coul + (mapinfo>>12)*0x100) << 1),i,Y);
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})
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})
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}
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}
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@ -1223,7 +1228,7 @@ INLINE void extRotBG2(GPU * gpu, u8 num, u8 * DST, u16 H, s32 X, s32 Y, s16 PA,
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{
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{
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mapinfo = map[auxX + auxY * lg];
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mapinfo = map[auxX + auxY * lg];
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if(mapinfo)
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if(mapinfo)
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renderline_setFinalColor(gpu,0,num,dst, T1ReadWord(pal, mapinfo << 1),x,Y);
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renderline_setFinalColor(gpu,0,num,dst, T1ReadWord(pal, mapinfo << 1),i,Y);
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})
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})
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}
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}
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return;
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return;
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@ -1234,7 +1239,7 @@ INLINE void extRotBG2(GPU * gpu, u8 num, u8 * DST, u16 H, s32 X, s32 Y, s16 PA,
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{
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{
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mapinfo = T1ReadWord(map, (auxX + auxY * lg) << 1);
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mapinfo = T1ReadWord(map, (auxX + auxY * lg) << 1);
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if ((mapinfo) && (mapinfo & 0x8000))
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if ((mapinfo) && (mapinfo & 0x8000))
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renderline_setFinalColor(gpu,0,num,dst, mapinfo,x,Y);
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renderline_setFinalColor(gpu,0,num,dst, mapinfo,i,Y);
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})
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})
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}
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}
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return;
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return;
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@ -1298,19 +1303,19 @@ void extRotBG(GPU * gpu, u8 num, u8 * DST)
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#define RENDERS_A(a) \
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#define RENDERS_A(a) \
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if((a)&&(prioTab[sprX]>=prio)) \
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if((a)&&(prioTab[sprX]>=prio)) \
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{ \
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{ \
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renderline_setFinalColor(gpu, sprX << 1,4,dst, c,sprX,l); \
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renderline_setFinalColor(gpu, sprX << 1,4,dst, c,i,l); \
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prioTab[sprX] = prio; \
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prioTab[sprX] = prio; \
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}
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}
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#define RENDERS_B(c) \
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#define RENDERS_B(c) \
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if((c)&&(prioTab[sprX]>=prio)) \
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if((c)&&(prioTab[sprX]>=prio)) \
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{ \
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{ \
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renderline_setFinalColor(gpu, sprX << 1,4,dst, T1ReadWord(pal, (c) << 1),sprX,l); \
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renderline_setFinalColor(gpu, sprX << 1,4,dst, T1ReadWord(pal, (c) << 1),i,l); \
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prioTab[sprX] = prio; \
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prioTab[sprX] = prio; \
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}
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}
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#define RENDERS_C(c,d) \
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#define RENDERS_C(c,d) \
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if((c)&&(prioTab[sprX]>=prio)) \
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if((c)&&(prioTab[sprX]>=prio)) \
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{ \
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{ \
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renderline_setFinalColor(gpu, (sprX d) << 1,4,dst, T1ReadWord(pal, ((c)+(spriteInfo->PaletteIndex<<4)) << 1),(sprX d),l); \
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renderline_setFinalColor(gpu, (sprX d) << 1,4,dst, T1ReadWord(pal, ((c)+(spriteInfo->PaletteIndex<<4)) << 1),i,l); \
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prioTab[sprX d] = prio; \
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prioTab[sprX d] = prio; \
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}
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}
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@ -422,6 +422,7 @@ static INLINE void GPU_ligne(Screen * screen, u16 l)
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GPU * gpu = screen->gpu;
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GPU * gpu = screen->gpu;
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u8 * dst = GPU_screen + (screen->offset + l) * 512;
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u8 * dst = GPU_screen + (screen->offset + l) * 512;
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u8 * mdst = GPU_screen + (MainScreen.offset + l) * 512;
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u8 * mdst = GPU_screen + (MainScreen.offset + l) * 512;
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u8 * sdst = GPU_screen + (SubScreen.offset + l) * 512;
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itemsForPriority_t * item;
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itemsForPriority_t * item;
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u8 spr[512];
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u8 spr[512];
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u8 sprPrio[256];
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u8 sprPrio[256];
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@ -454,29 +455,26 @@ static INLINE void GPU_ligne(Screen * screen, u16 l)
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/* we only draw one of the VRAM blocks */
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/* we only draw one of the VRAM blocks */
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vram_bank = gpu->dispCnt.bits.VRAM_Block ;
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vram_bank = gpu->dispCnt.bits.VRAM_Block ;
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if(!(MMU.vScreen&1)) dest = mdst; else dest = dst;
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// if(!(gpu->lcd)) dest = mdst; else dest = sdst;
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dest = dst ;
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switch (MMU.vram_mode[vram_bank])
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{
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case 0:
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case 1:
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case 2:
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case 3:
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{
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{
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int ii = l * 256 * 2;
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int ii = l * 256 * 2;
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for (i=0; i<(256 * 2); i+=2)
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for (i=0; i<(256 * 2); i+=2)
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{
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{
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u8 * vram = ARM9Mem.ARM9_ABG + MMU.vram_mode[vram_bank] * 0x20000;
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u8 * vram ;
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if (MMU.vram_mode[vram_bank] & 4)
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{
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vram = ARM9Mem.ARM9_LCD + (MMU.vram_mode[vram_bank] & 3) * 0x20000;
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} else
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{
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vram = ARM9Mem.ARM9_ABG + MMU.vram_mode[vram_bank] * 0x20000;
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}
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T2WriteWord(dest, i, T1ReadWord(vram, ii));
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T2WriteWord(dest, i, T1ReadWord(vram, ii));
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ii+=2;
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ii+=2;
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}
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}
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return;
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return;
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}
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}
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break;
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default:
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break;
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}
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}
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}
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return;
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return;
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case 3:
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case 3:
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@ -881,6 +881,9 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
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MMU.vram_mode[adr-REG_VRAMCNTA] = 3; // BG-VRAM
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MMU.vram_mode[adr-REG_VRAMCNTA] = 3; // BG-VRAM
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//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*3); // BG-VRAM
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//MMU.vram_offset[0] = ARM9Mem.ARM9_ABG+(0x20000*3); // BG-VRAM
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break;
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break;
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case 0: /* mapped to lcd */
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MMU.vram_mode[adr-REG_VRAMCNTA] = 4 | (adr-REG_VRAMCNTA) ;
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break ;
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}
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}
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MMU_VRAMReloadFromLCD(adr-REG_VRAMCNTA,val) ;
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MMU_VRAMReloadFromLCD(adr-REG_VRAMCNTA,val) ;
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}
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}
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