parent
f302f00e0d
commit
85599d83e5
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@ -301,7 +301,6 @@ const static u32 LCDdata[10][2]= {
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{0, 0},
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{0, 0},
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{0x6898000, 2}, // Bank H
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{0x6898000, 2}, // Bank H
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{0x68A0000, 1}}; // Bank I
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{0x68A0000, 1}}; // Bank I
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u8 VRAM_blockEnabled[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0 };
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void MMU_Init(void) {
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void MMU_Init(void) {
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int i;
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int i;
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@ -336,7 +335,6 @@ void MMU_Init(void) {
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mc_alloc(&MMU.bupmem, 1);
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mc_alloc(&MMU.bupmem, 1);
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MMU.bupmem.fp = NULL;
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MMU.bupmem.fp = NULL;
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rtcInit();
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rtcInit();
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memset(VRAM_blockEnabled, 0, sizeof(VRAM_blockEnabled));
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addonsInit();
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addonsInit();
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if(Mic_Init() == FALSE)
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if(Mic_Init() == FALSE)
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INFO("Microphone init failed.\n");
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INFO("Microphone init failed.\n");
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@ -473,7 +471,6 @@ void MMU_clearMem()
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rtcInit();
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rtcInit();
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partie = 1;
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partie = 1;
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memset(VRAM_blockEnabled, 0, sizeof(VRAM_blockEnabled));
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addonsReset();
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addonsReset();
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Mic_Reset();
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Mic_Reset();
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}
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}
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@ -495,7 +492,6 @@ u8 *MMU_RenderMapToLCD(u32 vram_addr)
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u8 engine_offset = (vram_addr >> 14);
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u8 engine_offset = (vram_addr >> 14);
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u8 block = MMU.VRAM_MAP[engine][engine_offset];
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u8 block = MMU.VRAM_MAP[engine][engine_offset];
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if (block == 7) return (EngineAddr[engine] + vram_addr); // not mapped to LCD
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if (block == 7) return (EngineAddr[engine] + vram_addr); // not mapped to LCD
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if (!VRAM_blockEnabled[block]) return NULL;
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vram_addr -= MMU.LCD_VRAM_ADDR[block];
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vram_addr -= MMU.LCD_VRAM_ADDR[block];
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return (LCDdst[block] + vram_addr);
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return (LCDdst[block] + vram_addr);
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}
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}
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@ -553,12 +549,11 @@ void DMAtoVRAMmapping()
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static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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{
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{
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if ( !(VRAMBankCnt & 0x80) && (VRAMBankCnt & 0x07) )
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if (!(VRAMBankCnt & 0x80)) return; // disabled
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{
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VRAM_blockEnabled[block] = 0;
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u32 vram_map_addr = 0xFFFFFFFF;
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return;
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u8 *LCD_addr = LCDdst[block];
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}
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bool changingTexOrTexPalette = false;
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if (!(VRAMBankCnt & 0x07)) return;
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for (int i = 0; i < 4; i++)
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for (int i = 0; i < 4; i++)
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{
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{
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@ -567,13 +562,11 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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MMU.VRAM_MAP[i][t] = 7;
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MMU.VRAM_MAP[i][t] = 7;
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}
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}
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u32 vram_map_addr = 0xFFFFFFFF;
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u8 *LCD_addr = LCDdst[block];
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bool changingTexOrTexPalette = false;
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switch (VRAMBankCnt & 0x07)
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switch (VRAMBankCnt & 0x07)
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{
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{
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case 0: // not mapped
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MMU.LCDCenable[block] = FALSE;
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return;
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case 1:
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case 1:
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switch(block)
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switch(block)
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{
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{
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@ -741,7 +734,6 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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//INFO("VRAM %i mapping: eng=%i (offs=%i, size=%i), addr = 0x%X, MST=%i\n",
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//INFO("VRAM %i mapping: eng=%i (offs=%i, size=%i), addr = 0x%X, MST=%i\n",
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// block, engine, engine_offset, LCDdata[block][1]*0x4000, MMU.LCD_VRAM_ADDR[block], VRAMBankCnt & 0x07);
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// block, engine, engine_offset, LCDdata[block][1]*0x4000, MMU.LCD_VRAM_ADDR[block], VRAMBankCnt & 0x07);
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VRAM_blockEnabled[block] = 1;
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//unmap texmem
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//unmap texmem
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for(int i=0;i<4;i++)
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for(int i=0;i<4;i++)
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@ -760,7 +752,6 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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}
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}
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MMU.LCDCenable[block] = FALSE;
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MMU.LCDCenable[block] = FALSE;
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VRAM_blockEnabled[block] = 0;
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}
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}
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void MMU_setRom(u8 * rom, u32 mask)
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void MMU_setRom(u8 * rom, u32 mask)
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