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simplify irq and wait4IRQ handling and related cleanup. this could potentially cause bugs.

This commit is contained in:
zeromus 2010-09-26 08:23:44 +00:00
parent ec51fa5be0
commit 6a33eb0cf8
16 changed files with 417 additions and 690 deletions
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23
desmume/src/FIFO.cpp
View File

@ -241,30 +241,23 @@ BOOL GFX_PIPErecv(u8 *cmd, u32 *param)
void GFX_FIFOcnt(u32 val) void GFX_FIFOcnt(u32 val)
{ {
//zeromus: i dont like any of this.
////INFO("gxFIFO: write cnt 0x%08X (prev 0x%08X) FIFO size %03i PIPE size %03i\n", val, gxstat, gxFIFO.size, gxPIPE.size); ////INFO("gxFIFO: write cnt 0x%08X (prev 0x%08X) FIFO size %03i PIPE size %03i\n", val, gxstat, gxFIFO.size, gxPIPE.size);
//if (val & (1<<29)) // clear? (only in homebrew?) if (val & (1<<29)) // clear? (only in homebrew?)
//{ {
// GFX_PIPEclear(); GFX_PIPEclear();
// GFX_FIFOclear(); GFX_FIFOclear();
// return; return;
//} }
//zeromus says: what happened to clear stack?
//if (val & (1<<15)) // projection stack pointer reset //if (val & (1<<15)) // projection stack pointer reset
//{ //{
// gfx3d_ClearStack(); // gfx3d_ClearStack();
// val &= 0xFFFF5FFF; // clear reset (bit15) & stack level (bit13) // val &= 0xFFFF5FFF; // clear reset (bit15) & stack level (bit13)
//} //}
//T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, val); T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, val);
//if (gxFIFO.size == 0) // empty
//{
// if (val & 0x80000000) // IRQ: empty
// setIF(0, (1<<21));
//}
} }
// ========================================================= DISP FIFO // ========================================================= DISP FIFO

57
desmume/src/GPU.cpp
View File

@ -1,24 +1,20 @@
/* GPU.cpp /* Copyright (C) 2006 yopyop
Copyright (C) 2006 yopyop
Copyright (C) 2006-2007 Theo Berkau Copyright (C) 2006-2007 Theo Berkau
Copyright (C) 2007 shash Copyright (C) 2007 shash
Copyright (C) 2008-2010 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <algorithm> #include <algorithm>
@ -2754,49 +2750,6 @@ template<bool MOSAIC> void GPU::modeRender(int layer)
} }
} }
void gpu_UpdateRender()
{
/*int x = 0, y = 0;
u16 *src = (u16*)GPU_screen;
u16 *dst = (u16*)GPU_screen;
switch (gpu_angle)
{
case 0:
memcpy(dst, src, 256*192*4);
break;
case 90:
for(y = 0; y < 384; y++)
{
for(x = 0; x < 256; x++)
{
dst[(383 - y) + (x * 384)] = src[x + (y * 256)];
}
}
break;
case 180:
for(y = 0; y < 384; y++)
{
for(x = 0; x < 256; x++)
{
dst[(255 - x) + ((383 - y) * 256)] = src[x + (y * 256)];
}
}
break;
case 270:
for(y = 0; y < 384; y++)
{
for(x = 0; x < 256; x++)
{
dst[y + ((255 - x) * 384)] = src[x + (y * 256)];
}
}
default:
break;
}*/
}
void gpu_SetRotateScreen(u16 angle) void gpu_SetRotateScreen(u16 angle)
{ {
gpu_angle = angle; gpu_angle = angle;

18
desmume/src/GPU.h
View File

@ -1,26 +1,20 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
yopyop156@ifrance.com
yopyop156.ifrance.com
Copyright (C) 2006-2007 Theo Berkau Copyright (C) 2006-2007 Theo Berkau
Copyright (C) 2007 shash Copyright (C) 2007 shash
Copyright (C) 2009-2009 DeSmuME team Copyright (C) 2009-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#ifndef GPU_H #ifndef GPU_H
@ -992,8 +986,6 @@ void SetupFinalPixelBlitter (GPU *gpu);
//#define GPU_setBGxHOFS(bg, gpu, val) gpu->dispx_st->dispx_BGxOFS[bg].BGxHOFS = ((val) & 0x1FF) //#define GPU_setBGxHOFS(bg, gpu, val) gpu->dispx_st->dispx_BGxOFS[bg].BGxHOFS = ((val) & 0x1FF)
//#define GPU_setBGxVOFS(bg, gpu, val) gpu->dispx_st->dispx_BGxOFS[bg].BGxVOFS = ((val) & 0x1FF) //#define GPU_setBGxVOFS(bg, gpu, val) gpu->dispx_st->dispx_BGxOFS[bg].BGxVOFS = ((val) & 0x1FF)
// render
void gpu_UpdateRender();
void gpu_SetRotateScreen(u16 angle); void gpu_SetRotateScreen(u16 angle);
//#undef FORCEINLINE //#undef FORCEINLINE

7
desmume/src/MMU.cpp
View File

@ -1197,7 +1197,7 @@ u32 MMU_readFromGC()
// if needed, throw irq for the end of transfer // if needed, throw irq for the end of transfer
if(MMU.AUX_SPI_CNT & 0x4000) if(MMU.AUX_SPI_CNT & 0x4000)
NDS_makeInt(TEST_PROCNUM, 19); NDS_makeIrq(TEST_PROCNUM, IRQ_BIT_GC_TRANSFER_COMPLETE);
return val; return val;
} }
@ -1244,8 +1244,6 @@ template<int PROCNUM> static void REG_IF_WriteLong(u32 val)
template<int PROCNUM> template<int PROCNUM>
u32 MMU_struct::gen_IF() u32 MMU_struct::gen_IF()
{ {
//TODO - analyze setIF behaviour in GXF_FIFO_handleEvents
u32 IF = reg_IF_bits[PROCNUM]; u32 IF = reg_IF_bits[PROCNUM];
if(PROCNUM==ARMCPU_ARM9) if(PROCNUM==ARMCPU_ARM9)
@ -1904,8 +1902,7 @@ void DmaController::doStop()
running = FALSE; running = FALSE;
if(!repeatMode) enable = FALSE; if(!repeatMode) enable = FALSE;
if(irq) { if(irq) {
if(procnum==0) NDS_makeARM9Int(8+chan); NDS_makeIrq(procnum,IRQ_BIT_DMA_0+chan);
else NDS_makeARM7Int(8+chan);
} }
} }

82
desmume/src/NDSSystem.cpp
View File

@ -1,21 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
Copyright (C) 2008-2010 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <string.h> #include <string.h>
@ -942,7 +939,7 @@ void NDS_ToggleCardEject()
if(!nds.cardEjected) if(!nds.cardEjected)
{ {
//staff of kings will test this (it also uses the arm9 0xB8 poll) //staff of kings will test this (it also uses the arm9 0xB8 poll)
NDS_makeInt(1, 20); NDS_makeIrq(ARMCPU_ARM7, IRQ_BIT_GC_IREQ_MC);
} }
nds.cardEjected ^= TRUE; nds.cardEjected ^= TRUE;
} }
@ -1171,8 +1168,7 @@ template<int procnum, int num> struct TSequenceItem_Timer : public TSequenceItem
MMU.timer[procnum][i] = MMU.timerReload[procnum][i]; MMU.timer[procnum][i] = MMU.timerReload[procnum][i];
if(T1ReadWord(regs, 0x102 + i*4) & 0x40) if(T1ReadWord(regs, 0x102 + i*4) & 0x40)
{ {
if(procnum==0) NDS_makeARM9Int(3 + i); NDS_makeIrq(procnum, IRQ_BIT_TIMER_0 + i);
else NDS_makeARM7Int(3 + i);
} }
} }
else else
@ -1488,8 +1484,8 @@ static void execHardware_hblank()
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 2); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 2);
//fire hblank interrupts if necessary //fire hblank interrupts if necessary
NDS_ARM9HBlankInt(); if(T1ReadWord(MMU.ARM9_REG, 4) & 0x10) NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_LCD_HBLANK);
NDS_ARM7HBlankInt(); if(T1ReadWord(MMU.ARM7_REG, 4) & 0x10) NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_LCD_HBLANK);
//emulation housekeeping. for some reason we always do this at hblank, //emulation housekeeping. for some reason we always do this at hblank,
//even though it sounds more reasonable to do it at hstart //even though it sounds more reasonable to do it at hstart
@ -1520,8 +1516,8 @@ static void execHardware_hstart_vblankStart()
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 1); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 1);
//fire vblank interrupts if necessary //fire vblank interrupts if necessary
NDS_ARM9VBlankInt(); if(T1ReadWord(MMU.ARM9_REG, 4) & 0x8) NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_LCD_VBLANK);
NDS_ARM7VBlankInt(); if(T1ReadWord(MMU.ARM7_REG, 4) & 0x8) NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_LCD_VBLANK);
//some emulation housekeeping //some emulation housekeeping
gfx3d_VBlankSignal(); gfx3d_VBlankSignal();
@ -1547,7 +1543,7 @@ static void execHardware_hstart_vcount()
//arm9 vmatch //arm9 vmatch
T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) | 4); T1WriteWord(MMU.ARM9_REG, 4, T1ReadWord(MMU.ARM9_REG, 4) | 4);
if(T1ReadWord(MMU.ARM9_REG, 4) & 32) { if(T1ReadWord(MMU.ARM9_REG, 4) & 32) {
NDS_makeARM9Int(2); NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_LCD_VMATCH);
} }
} }
else else
@ -1560,7 +1556,7 @@ static void execHardware_hstart_vcount()
//arm7 vmatch //arm7 vmatch
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 4); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 4);
if(T1ReadWord(MMU.ARM7_REG, 4) & 32) if(T1ReadWord(MMU.ARM7_REG, 4) & 32)
NDS_makeARM7Int(2); NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_LCD_VMATCH);
} }
else else
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFB); T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFB);
@ -1947,8 +1943,6 @@ void NDS_exec(s32 nb)
if(nds.sleeping) if(nds.sleeping)
{ {
gpu_UpdateRender();
//speculative code: if ANY irq happens, wake up the arm7. //speculative code: if ANY irq happens, wake up the arm7.
//I think the arm7 program analyzes the system and may decide not to wake up //I think the arm7 program analyzes the system and may decide not to wake up
//if it is dissatisfied with the conditions //if it is dissatisfied with the conditions
@ -2061,33 +2055,25 @@ void NDS_exec(s32 nb)
cheats->process(); cheats->process();
} }
template<int PROCNUM> static void execHardware_interrupts_core()
{
u32 IF = MMU.gen_IF<PROCNUM>();
u32 IE = MMU.reg_IE[PROCNUM];
u32 masked = IF & IE;
if(ARMPROC.halt_IE_and_IF && masked)
{
ARMPROC.halt_IE_and_IF = FALSE;
ARMPROC.waitIRQ = FALSE;
}
if(masked && MMU.reg_IME[PROCNUM] && !ARMPROC.CPSR.bits.I)
armcpu_irqException(&ARMPROC);
}
void execHardware_interrupts() void execHardware_interrupts()
{ {
if((MMU.reg_IME[0]) && (MMU.gen_IF<0>()&MMU.reg_IE[0])) execHardware_interrupts_core<ARMCPU_ARM9>();
{ execHardware_interrupts_core<ARMCPU_ARM7>();
//TODO - remove GDB specific code
//#ifdef GDB_STUB
// if ( armcpu_flagIrq( &NDS_ARM9))
//#else
if ( armcpu_irqException(&NDS_ARM9))
//#endif
{
//printf("ARM9 interrupt! flags: %08X ; mask: %08X ; result: %08X\n",MMU.reg_IF[0],MMU.reg_IE[0],MMU.reg_IF[0]&MMU.reg_IE[0]);
//nds.ARM9Cycle = nds.cycles;
}
}
//TODO - remove GDB specific code
if((MMU.reg_IME[1]) && (MMU.gen_IF<1>()&MMU.reg_IE[1]))
{
//#ifdef GDB_STUB
// if ( armcpu_flagIrq( &NDS_ARM7))
//#else
if ( armcpu_irqException(&NDS_ARM7))
//#endif
{
//nds.ARM7Cycle = nds.cycles;
}
}
} }
static void resetUserInput(); static void resetUserInput();
@ -2741,11 +2727,11 @@ static void NDS_applyFinalInput()
u16 k_cnt_selected = (k_cnt & 0x3F); u16 k_cnt_selected = (k_cnt & 0x3F);
if (k_cnt&(1<<15)) // AND if (k_cnt&(1<<15)) // AND
{ {
if ((~pad & k_cnt_selected) == k_cnt_selected) NDS_makeARM9Int(12); if ((~pad & k_cnt_selected) == k_cnt_selected) NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_KEYPAD);
} }
else // OR else // OR
{ {
if (~pad & k_cnt_selected) NDS_makeARM9Int(12); if (~pad & k_cnt_selected) NDS_makeIrq(ARMCPU_ARM9,IRQ_BIT_KEYPAD);
} }
} }
@ -2756,11 +2742,11 @@ static void NDS_applyFinalInput()
u16 k_cnt_selected = (k_cnt & 0x3F); u16 k_cnt_selected = (k_cnt & 0x3F);
if (k_cnt&(1<<15)) // AND if (k_cnt&(1<<15)) // AND
{ {
if ((~pad & k_cnt_selected) == k_cnt_selected) NDS_makeARM7Int(12); if ((~pad & k_cnt_selected) == k_cnt_selected) NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_KEYPAD);
} }
else // OR else // OR
{ {
if (~pad & k_cnt_selected) NDS_makeARM7Int(12); if (~pad & k_cnt_selected) NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_KEYPAD);
} }
} }
@ -2789,7 +2775,7 @@ static void NDS_applyFinalInput()
if (!LidClosed) if (!LidClosed)
{ {
// SPU_Pause(FALSE); // SPU_Pause(FALSE);
NDS_makeARM7Int(22); NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_ARM7_FOLD);
} }
//else //else

50
desmume/src/NDSSystem.h
View File

@ -1,21 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
Copyright (C) 2008-2010 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef NDSSYSTEM_H #ifndef NDSSYSTEM_H
@ -457,43 +454,6 @@ template<bool FORCE> void NDS_exec(s32 nb = 560190<<1);
extern int lagframecounter; extern int lagframecounter;
static INLINE void NDS_ARM9HBlankInt(void)
{
if(T1ReadWord(MMU.ARM9_REG, 4) & 0x10)
{
//MMU.reg_IF[0] |= 2;// & (MMU.reg_IME[0] << 1);// (MMU.reg_IE[0] & (1<<1));
setIF(0, 2);
}
}
static INLINE void NDS_ARM7HBlankInt(void)
{
if(T1ReadWord(MMU.ARM7_REG, 4) & 0x10)
{
// MMU.reg_IF[1] |= 2;// & (MMU.reg_IME[1] << 1);// (MMU.reg_IE[1] & (1<<1));
setIF(1, 2);
}
}
static INLINE void NDS_ARM9VBlankInt(void)
{
if(T1ReadWord(MMU.ARM9_REG, 4) & 0x8)
{
// MMU.reg_IF[0] |= 1;// & (MMU.reg_IME[0]);// (MMU.reg_IE[0] & 1);
setIF(0, 1);
//emu_halt();
/*logcount++;*/
}
}
static INLINE void NDS_ARM7VBlankInt(void)
{
if(T1ReadWord(MMU.ARM7_REG, 4) & 0x8)
// MMU.reg_IF[1] |= 1;// & (MMU.reg_IME[1]);// (MMU.reg_IE[1] & 1);
setIF(1, 1);
//emu_halt();
}
static INLINE void NDS_swapScreen(void) static INLINE void NDS_swapScreen(void)
{ {
u16 tmp = MainScreen.offset; u16 tmp = MainScreen.offset;
@ -503,8 +463,6 @@ static INLINE void NDS_swapScreen(void)
int NDS_WriteBMP_32bppBuffer(int width, int height, const void* buf, const char *filename); int NDS_WriteBMP_32bppBuffer(int width, int height, const void* buf, const char *filename);
extern struct TCommonSettings { extern struct TCommonSettings {
TCommonSettings() TCommonSettings()
: GFX3D_HighResolutionInterpolateColor(true) : GFX3D_HighResolutionInterpolateColor(true)

4
desmume/src/addons/slot1_r4.cpp
View File

@ -94,7 +94,7 @@ static void write32_GCDATAIN(u32 val)
// if needed, throw irq for the end of transfer // if needed, throw irq for the end of transfer
if(MMU.AUX_SPI_CNT & 0x4000) if(MMU.AUX_SPI_CNT & 0x4000)
NDS_makeInt(0, 19); NDS_makeIrq(ARMCPU_ARM9, IRQ_BIT_GC_TRANSFER_COMPLETE);
return; return;
} }
@ -124,7 +124,7 @@ static void write32_GCDATAIN(u32 val)
// if needed, throw irq for the end of transfer // if needed, throw irq for the end of transfer
if(MMU.AUX_SPI_CNT & 0x4000) if(MMU.AUX_SPI_CNT & 0x4000)
NDS_makeInt(0, 19); NDS_makeIrq(ARMCPU_ARM9, IRQ_BIT_GC_TRANSFER_COMPLETE);
} }
/*if(log) /*if(log)

45
desmume/src/armcpu.cpp
View File

@ -1,21 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
Copyright (C) 2009 DeSmuME team Copyright (C) 2009-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <stdlib.h> #include <stdlib.h>
@ -211,6 +208,8 @@ int armcpu_new( armcpu_t *armcpu, u32 id)
void armcpu_t::changeCPSR() void armcpu_t::changeCPSR()
{ {
//but all it does is give them a chance to unleash by forcing an immediate reschedule //but all it does is give them a chance to unleash by forcing an immediate reschedule
//TODO - we could actually set CPSR through here and look for a change in the I bit
//that would be a little optimization as well as a safety measure if we prevented setting CPSR directly
NDS_Reschedule(); NDS_Reschedule();
} }
@ -221,7 +220,7 @@ void armcpu_init(armcpu_t *armcpu, u32 adr)
armcpu->LDTBit = (armcpu->proc_ID==0); //Si ARM9 utiliser le syte v5 pour le load armcpu->LDTBit = (armcpu->proc_ID==0); //Si ARM9 utiliser le syte v5 pour le load
armcpu->intVector = 0xFFFF0000 * (armcpu->proc_ID==0); armcpu->intVector = 0xFFFF0000 * (armcpu->proc_ID==0);
armcpu->waitIRQ = FALSE; armcpu->waitIRQ = FALSE;
armcpu->wirq = FALSE; armcpu->halt_IE_and_IF = FALSE;
//#ifdef GDB_STUB //#ifdef GDB_STUB
// armcpu->irq_flag = 0; // armcpu->irq_flag = 0;
@ -373,30 +372,8 @@ u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode)
u32 armcpu_Wait4IRQ(armcpu_t *cpu) u32 armcpu_Wait4IRQ(armcpu_t *cpu)
{ {
u32 instructAddr = cpu->instruct_adr; cpu->waitIRQ = TRUE;
// on the first call, wirq is not set cpu->halt_IE_and_IF = TRUE;
if(cpu->wirq)
{
// check wether an irq was issued
if(!cpu->waitIRQ)
{
cpu->waitIRQ = 0;
cpu->wirq = 0;
return 1; // return execution
}
// otherwise, repeat this instruction
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
return 1;
}
// first run, set us into waiting state
cpu->waitIRQ = 1;
cpu->wirq = 1;
// and set next instruction to repeat this
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
// only SWI set IME to 1
return 1; return 1;
} }
@ -538,8 +515,6 @@ BOOL armcpu_irqException(armcpu_t *armcpu)
{ {
Status_Reg tmp; Status_Reg tmp;
if(armcpu->CPSR.bits.I) return FALSE;
//TODO - remove GDB specific code //TODO - remove GDB specific code
//#ifdef GDB_STUB //#ifdef GDB_STUB
// armcpu->irq_flag = 0; // armcpu->irq_flag = 0;

46
desmume/src/armcpu.h
View File

@ -1,21 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
Copyright (C) 2008-2010 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef ARM_CPU #ifndef ARM_CPU
@ -208,7 +205,7 @@ struct armcpu_t
u32 intVector; u32 intVector;
u8 LDTBit; //1 : ARMv5 style 0 : non ARMv5 u8 LDTBit; //1 : ARMv5 style 0 : non ARMv5
BOOL waitIRQ; BOOL waitIRQ;
BOOL wirq; BOOL halt_IE_and_IF; //the cpu is halted, waiting for IE&IF to signal something
BOOL BIOS_loaded; BOOL BIOS_loaded;
@ -268,42 +265,13 @@ static INLINE void setIF(int PROCNUM, u32 flag)
extern void NDS_Reschedule(); extern void NDS_Reschedule();
NDS_Reschedule(); NDS_Reschedule();
//TODO SEP - was this necessary??? - CrazyMax 2010/09/25: needs for boot firmware
//generate the interrupt if enabled
if ((MMU.reg_IE[PROCNUM] & (flag)) && MMU.reg_IME[PROCNUM])
{
if(PROCNUM==0)
NDS_ARM9.waitIRQ = FALSE;
else
NDS_ARM7.waitIRQ = FALSE;
}
} }
static INLINE void NDS_makeARM9Int(u32 num) static INLINE void NDS_makeIrq(int PROCNUM, u32 num)
{ {
setIF(0, (1<<num)); setIF(PROCNUM,1<<num);
} }
static INLINE void NDS_makeARM7Int(u32 num)
{
setIF(1, (1<<num));
}
static INLINE void NDS_makeInt(u8 proc_ID,u32 num)
{
switch (proc_ID)
{
case 0:
NDS_makeARM9Int(num) ;
break ;
case 1:
NDS_makeARM7Int(num) ;
break ;
}
}
static INLINE char *decodeIntruction(bool thumb_mode, u32 instr) static INLINE char *decodeIntruction(bool thumb_mode, u32 instr)
{ {
char txt[20] = {0}; char txt[20] = {0};

44
desmume/src/bios.cpp
View File

@ -1,22 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
yopyop156@ifrance.com Copyright (C) 2008-2010 DeSmuME team
yopyop156.ifrance.com
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include "cp15.h" #include "cp15.h"
@ -213,26 +209,8 @@ TEMPLATE static u32 WaitByLoop()
TEMPLATE static u32 wait4IRQ() TEMPLATE static u32 wait4IRQ()
{ {
//execute= FALSE; cpu->waitIRQ = TRUE;
u32 instructAddr = cpu->instruct_adr; cpu->halt_IE_and_IF = TRUE;
if(cpu->wirq)
{
if(!cpu->waitIRQ)
{
cpu->waitIRQ = 0;
cpu->wirq = 0;
//cpu->switchMode(oldmode[cpu->proc_ID]);
return 1;
}
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
return 1;
}
cpu->waitIRQ = 1;
cpu->wirq = 1;
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
//oldmode[cpu->proc_ID] = cpu->switchMode(SVC);
return 1; return 1;
} }
@ -256,8 +234,8 @@ TEMPLATE u32 intrWaitARM()
//if(!noDiscard) //if(!noDiscard)
// intrFlag &= cpu->newIrqFlags; // intrFlag &= cpu->newIrqFlags;
MMU.reg_IME[PROCNUM] = 1; //set IME=1
_MMU_write32<PROCNUM>(0x04000208, 1); // set IME=1 _MMU_write32<PROCNUM>(0x04000208, 1);
if (intrFlag) if (intrFlag)
{ {
@ -269,8 +247,8 @@ TEMPLATE u32 intrWaitARM()
u32 instructAddr = cpu->instruct_adr; u32 instructAddr = cpu->instruct_adr;
cpu->R[15] = instructAddr; cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr; cpu->next_instruction = instructAddr;
cpu->waitIRQ = 1; cpu->waitIRQ = TRUE;
cpu->wirq = 1; cpu->halt_IE_and_IF = TRUE;
return 1; return 1;
} }

201
desmume/src/cp15.cpp
View File

@ -1,22 +1,18 @@
/* Copyright (C) 2006 yopyop /* Copyright (C) 2006 yopyop
yopyop156@ifrance.com Copyright (C) 2006-2010 DeSmuME team
yopyop156.ifrance.com
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <stdlib.h> #include <stdlib.h>
@ -198,7 +194,7 @@ static void armcp15_setSingleRegionAccess(armcp15_t *armcp15,u32 dAccess,u32 iAc
/* precalculate region masks/sets from cp15 register */ /* precalculate region masks/sets from cp15 register */
static void armcp15_maskPrecalc(armcp15_t *armcp15) static void armcp15_maskPrecalc(armcp15_t *armcp15)
{ {
#define precalc(num) { \ #define precalc(num) { \
u32 mask = 0, set = 0xFFFFFFFF ; /* (x & 0) == 0xFF..FF is allways false (disabled) */ \ u32 mask = 0, set = 0xFFFFFFFF ; /* (x & 0) == 0xFF..FF is allways false (disabled) */ \
if (BIT_N(armcp15->protectBaseSize##num,0)) /* if region is enabled */ \ if (BIT_N(armcp15->protectBaseSize##num,0)) /* if region is enabled */ \
{ /* reason for this define: naming includes var */ \ { /* reason for this define: naming includes var */ \
@ -207,10 +203,10 @@ static void armcp15_maskPrecalc(armcp15_t *armcp15)
if (SIZEIDENTIFIER(armcp15->protectBaseSize##num)==0x1F) \ if (SIZEIDENTIFIER(armcp15->protectBaseSize##num)==0x1F) \
{ /* for the 4GB region, u32 suffers wraparound */ \ { /* for the 4GB region, u32 suffers wraparound */ \
mask = 0 ; set = 0 ; /* (x & 0) == 0 is allways true (enabled) */ \ mask = 0 ; set = 0 ; /* (x & 0) == 0 is allways true (enabled) */ \
} \ } \
} \ } \
armcp15_setSingleRegionAccess(armcp15,armcp15->DaccessPerm,armcp15->IaccessPerm,num,mask,set) ; \ armcp15_setSingleRegionAccess(armcp15,armcp15->DaccessPerm,armcp15->IaccessPerm,num,mask,set) ; \
} }
precalc(0) ; precalc(0) ;
precalc(1) ; precalc(1) ;
precalc(2) ; precalc(2) ;
@ -275,24 +271,24 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
switch(CRn) switch(CRn)
{ {
case 0 : case 0:
if((opcode1 == 0)&&(CRm==0)) if((opcode1 == 0)&&(CRm==0))
{ {
switch(opcode2) switch(opcode2)
{ {
case 1 : case 1:
*R = armcp15->cacheType; *R = armcp15->cacheType;
return TRUE; return TRUE;
case 2 : case 2:
*R = armcp15->TCMSize; *R = armcp15->TCMSize;
return TRUE; return TRUE;
default : default:
*R = armcp15->IDCode; *R = armcp15->IDCode;
return TRUE; return TRUE;
} }
} }
return FALSE; return FALSE;
case 1 : case 1:
if((opcode1==0) && (opcode2==0) && (CRm==0)) if((opcode1==0) && (opcode2==0) && (CRm==0))
{ {
*R = armcp15->ctrl; *R = armcp15->ctrl;
@ -301,23 +297,23 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
} }
return FALSE; return FALSE;
case 2 : case 2:
if((opcode1==0) && (CRm==0)) if((opcode1==0) && (CRm==0))
{ {
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
*R = armcp15->DCConfig; *R = armcp15->DCConfig;
return TRUE; return TRUE;
case 1 : case 1:
*R = armcp15->ICConfig; *R = armcp15->ICConfig;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 3 : case 3:
if((opcode1==0) && (opcode2==0) && (CRm==0)) if((opcode1==0) && (opcode2==0) && (CRm==0))
{ {
*R = armcp15->writeBuffCtrl; *R = armcp15->writeBuffCtrl;
@ -325,89 +321,89 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
return TRUE; return TRUE;
} }
return FALSE; return FALSE;
case 5 : case 5:
if((opcode1==0) && (CRm==0)) if((opcode1==0) && (CRm==0))
{ {
switch(opcode2) switch(opcode2)
{ {
case 2 : case 2:
*R = armcp15->DaccessPerm; *R = armcp15->DaccessPerm;
return TRUE; return TRUE;
case 3 : case 3:
*R = armcp15->IaccessPerm; *R = armcp15->IaccessPerm;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 6 : case 6:
if((opcode1==0) && (opcode2==0)) if((opcode1==0) && (opcode2==0))
{ {
switch(CRm) switch(CRm)
{ {
case 0 : case 0:
*R = armcp15->protectBaseSize0; *R = armcp15->protectBaseSize0;
return TRUE; return TRUE;
case 1 : case 1:
*R = armcp15->protectBaseSize1; *R = armcp15->protectBaseSize1;
return TRUE; return TRUE;
case 2 : case 2:
*R = armcp15->protectBaseSize2; *R = armcp15->protectBaseSize2;
return TRUE; return TRUE;
case 3 : case 3:
*R = armcp15->protectBaseSize3; *R = armcp15->protectBaseSize3;
return TRUE; return TRUE;
case 4 : case 4:
*R = armcp15->protectBaseSize4; *R = armcp15->protectBaseSize4;
return TRUE; return TRUE;
case 5 : case 5:
*R = armcp15->protectBaseSize5; *R = armcp15->protectBaseSize5;
return TRUE; return TRUE;
case 6 : case 6:
*R = armcp15->protectBaseSize6; *R = armcp15->protectBaseSize6;
return TRUE; return TRUE;
case 7 : case 7:
*R = armcp15->protectBaseSize7; *R = armcp15->protectBaseSize7;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 9 : case 9:
if((opcode1==0)) if((opcode1==0))
{ {
switch(CRm) switch(CRm)
{ {
case 0 : case 0:
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
*R = armcp15->DcacheLock; *R = armcp15->DcacheLock;
return TRUE; return TRUE;
case 1 : case 1:
*R = armcp15->IcacheLock; *R = armcp15->IcacheLock;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
case 1 : case 1:
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
*R = armcp15->DTCMRegion; *R = armcp15->DTCMRegion;
return TRUE; return TRUE;
case 1 : case 1:
*R = armcp15->ITCMRegion; *R = armcp15->ITCMRegion;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
} }
return FALSE; return FALSE;
default : default:
LOG("Unsupported CP15 operation : MRC\n"); LOG("Unsupported CP15 operation : MRC\n");
return FALSE; return FALSE;
} }
@ -415,36 +411,9 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
static u32 CP15wait4IRQ(armcpu_t *cpu) static u32 CP15wait4IRQ(armcpu_t *cpu)
{ {
#if 1 cpu->waitIRQ = TRUE;
u32 instructAddr = cpu->instruct_adr; cpu->halt_IE_and_IF = TRUE;
// on the first call, wirq is not set //IME set deliberately omitted: only SWI sets IME to 1
if(cpu->wirq)
{
// check wether an irq was issued
if(!cpu->waitIRQ)
{
cpu->waitIRQ = 0;
cpu->wirq = 0;
return 1; // return execution
}
// otherwise, repeat this instruction
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
return 1;
}
// first run, set us into waiting state
cpu->waitIRQ = 1;
cpu->wirq = 1;
// and set next instruction to repeat this
cpu->R[15] = instructAddr;
cpu->next_instruction = instructAddr;
#else
//printf("CP15: IME %X, IE %08X, IF %08X res %08X\n", MMU.reg_IME[0], MMU.reg_IE[0], MMU.reg_IF[0], MMU.reg_IE[0] & MMU.reg_IF[0]);
//if ((MMU.reg_IE[0] & MMU.reg_IF[0]) == 0) return 1;
cpu->waitIRQ = 1;
#endif
// only SWI set IME to 1
return 1; return 1;
} }
@ -454,7 +423,7 @@ BOOL armcp15_moveARM2CP(armcp15_t *armcp15, u32 val, u8 CRn, u8 CRm, u8 opcode1,
switch(CRn) switch(CRn)
{ {
case 1 : case 1:
if((opcode1==0) && (opcode2==0) && (CRm==0)) if((opcode1==0) && (opcode2==0) && (CRm==0))
{ {
@ -464,36 +433,27 @@ BOOL armcp15_moveARM2CP(armcp15_t *armcp15, u32 val, u8 CRn, u8 CRm, u8 opcode1,
//zero 31-jan-2010: change from 0x0FFF0000 to 0xFFFF0000 per gbatek //zero 31-jan-2010: change from 0x0FFF0000 to 0xFFFF0000 per gbatek
armcp15->cpu->intVector = 0xFFFF0000 * (BIT13(val)); armcp15->cpu->intVector = 0xFFFF0000 * (BIT13(val));
armcp15->cpu->LDTBit = !BIT15(val); //TBit armcp15->cpu->LDTBit = !BIT15(val); //TBit
/*if(BIT17(val))
{
log::ajouter("outch !!!!!!!");
}
if(BIT19(val))
{
log::ajouter("outch !!!!!!!");
}*/
//LOG("CP15: ARMtoCP ctrl %08X (val %08X)\n", armcp15->ctrl, val); //LOG("CP15: ARMtoCP ctrl %08X (val %08X)\n", armcp15->ctrl, val);
return TRUE; return TRUE;
} }
return FALSE; return FALSE;
case 2 : case 2:
if((opcode1==0) && (CRm==0)) if((opcode1==0) && (CRm==0))
{ {
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
armcp15->DCConfig = val; armcp15->DCConfig = val;
return TRUE; return TRUE;
case 1 : case 1:
armcp15->ICConfig = val; armcp15->ICConfig = val;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 3 : case 3:
if((opcode1==0) && (opcode2==0) && (CRm==0)) if((opcode1==0) && (opcode2==0) && (CRm==0))
{ {
armcp15->writeBuffCtrl = val; armcp15->writeBuffCtrl = val;
@ -501,113 +461,108 @@ BOOL armcp15_moveARM2CP(armcp15_t *armcp15, u32 val, u8 CRn, u8 CRm, u8 opcode1,
return TRUE; return TRUE;
} }
return FALSE; return FALSE;
case 5 : case 5:
if((opcode1==0) && (CRm==0)) if((opcode1==0) && (CRm==0))
{ {
switch(opcode2) switch(opcode2)
{ {
case 2 : case 2:
armcp15->DaccessPerm = val; armcp15->DaccessPerm = val;
armcp15_maskPrecalc(armcp15); armcp15_maskPrecalc(armcp15);
return TRUE; return TRUE;
case 3 : case 3:
armcp15->IaccessPerm = val; armcp15->IaccessPerm = val;
armcp15_maskPrecalc(armcp15); armcp15_maskPrecalc(armcp15);
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 6 : case 6:
if((opcode1==0) && (opcode2==0)) if((opcode1==0) && (opcode2==0))
{ {
switch(CRm) switch(CRm)
{ {
case 0 : case 0:
armcp15->protectBaseSize0 = val; armcp15->protectBaseSize0 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 1 : case 1:
armcp15->protectBaseSize1 = val; armcp15->protectBaseSize1 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 2 : case 2:
armcp15->protectBaseSize2 = val; armcp15->protectBaseSize2 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 3 : case 3:
armcp15->protectBaseSize3 = val; armcp15->protectBaseSize3 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 4 : case 4:
armcp15->protectBaseSize4 = val; armcp15->protectBaseSize4 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 5 : case 5:
armcp15->protectBaseSize5 = val; armcp15->protectBaseSize5 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 6 : case 6:
armcp15->protectBaseSize6 = val; armcp15->protectBaseSize6 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
case 7 : case 7:
armcp15->protectBaseSize7 = val; armcp15->protectBaseSize7 = val;
armcp15_maskPrecalc(armcp15) ; armcp15_maskPrecalc(armcp15) ;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
return FALSE; return FALSE;
case 7 : case 7:
if((CRm==0)&&(opcode1==0)&&((opcode2==4))) if((CRm==0)&&(opcode1==0)&&((opcode2==4)))
{ {
CP15wait4IRQ(armcp15->cpu); CP15wait4IRQ(armcp15->cpu);
return TRUE; return TRUE;
} }
return FALSE; return FALSE;
case 9 : case 9:
if((opcode1==0)) if((opcode1==0))
{ {
switch(CRm) switch(CRm)
{ {
case 0 : case 0:
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
armcp15->DcacheLock = val; armcp15->DcacheLock = val;
return TRUE; return TRUE;
case 1 : case 1:
armcp15->IcacheLock = val; armcp15->IcacheLock = val;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
case 1 : case 1:
switch(opcode2) switch(opcode2)
{ {
case 0 : case 0:
MMU.DTCMRegion = armcp15->DTCMRegion = val & 0x0FFFF000; MMU.DTCMRegion = armcp15->DTCMRegion = val & 0x0FFFF000;
//MMU.DTCMRegion = val;
//MMU.DTCMRegion = val & 0x0FFFFFFC0;
//LOG("CP15: set DTCM %08X (size %i)\n", MMU.DTCMRegion, 512<<(val & 0x00000FFF));
/*sprintf(logbuf, "%08X", val);
log::ajouter(logbuf);*/
return TRUE; return TRUE;
case 1 : case 1:
armcp15->ITCMRegion = val; armcp15->ITCMRegion = val;
/* ITCM base is not writeable! */ //ITCM base is not writeable!
MMU.ITCMRegion = 0; MMU.ITCMRegion = 0;
return TRUE; return TRUE;
default : default:
return FALSE; return FALSE;
} }
} }
} }
return FALSE; return FALSE;
default : default:
return FALSE; return FALSE;
} }
} }

17
desmume/src/gfx3d.cpp
View File

@ -1977,23 +1977,6 @@ void gfx3d_execute3D()
} else break; } else break;
} }
//i thought it might be right to move these here, but it didnt help.
//maybe its a good idea for later.
//if(gxFIFO.size <= 127)
//{
// if(gxstat.gxfifo_irq == 1)
// setIF(0, (1<<21)); //the half gxfifo irq
//
// //might need to trigger a gxfifo dma
// triggerDma(EDMAMode_GXFifo);
//}
//if(gxFIFO.size == 0) {
// if(gxstat.gxfifo_irq == 2)
// setIF(0, (1<<21)); //the empty gxfifo irq
//}
} }
void gfx3d_glFlush(u32 v) void gfx3d_glFlush(u32 v)

17
desmume/src/saves.cpp
View File

@ -3,21 +3,18 @@
Copyright (C) 2007 Pascal Giard Copyright (C) 2007 Pascal Giard
Copyright (C) 2008-2010 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#ifdef HAVE_LIBZ #ifdef HAVE_LIBZ
@ -96,8 +93,7 @@ SFORMAT SF_ARM7[]={
{ "7int", 4, 1, &NDS_ARM7.intVector }, { "7int", 4, 1, &NDS_ARM7.intVector },
{ "7LDT", 1, 1, &NDS_ARM7.LDTBit }, { "7LDT", 1, 1, &NDS_ARM7.LDTBit },
{ "7Wai", 4, 1, &NDS_ARM7.waitIRQ }, { "7Wai", 4, 1, &NDS_ARM7.waitIRQ },
//{ "7wIR", 4, 1, &NDS_ARM7.wIRQ, }, { "7hef", 4, 1, &NDS_ARM7.halt_IE_and_IF },
{ "7wir", 4, 1, &NDS_ARM7.wirq, },
{ 0 } { 0 }
}; };
@ -133,8 +129,7 @@ SFORMAT SF_ARM9[]={
{ "9int", 4, 1, &NDS_ARM9.intVector}, { "9int", 4, 1, &NDS_ARM9.intVector},
{ "9LDT", 1, 1, &NDS_ARM9.LDTBit}, { "9LDT", 1, 1, &NDS_ARM9.LDTBit},
{ "9Wai", 4, 1, &NDS_ARM9.waitIRQ}, { "9Wai", 4, 1, &NDS_ARM9.waitIRQ},
//{ "9wIR", 4, 1, &NDS_ARM9.wIRQ}, { "9hef", 4, 1, &NDS_ARM9.halt_IE_and_IF },
{ "9wir", 4, 1, &NDS_ARM9.wirq},
{ 0 } { 0 }
}; };

15
desmume/src/wifi.cpp
View File

@ -1,21 +1,18 @@
/* Copyright (C) 2007 Tim Seidel /* Copyright (C) 2007 Tim Seidel
Copyright (C) 2008-2009 DeSmuME team Copyright (C) 2008-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <assert.h> #include <assert.h>
@ -588,7 +585,7 @@ static void WIFI_triggerIRQMask(u16 mask)
if (!oResult && nResult) if (!oResult && nResult)
{ {
NDS_makeARM7Int(24); /* cascade it via arm7 wifi irq */ NDS_makeIrq(ARMCPU_ARM7,IRQ_BIT_ARM7_WIFI); /* cascade it via arm7 wifi irq */
} }
} }

2
desmume/src/windows/DeSmuME_2005.vcproj
View File

@ -51,7 +51,7 @@
AdditionalOptions="/MP" AdditionalOptions="/MP"
Optimization="0" Optimization="0"
InlineFunctionExpansion="0" InlineFunctionExpansion="0"
EnableIntrinsicFunctions="false" EnableIntrinsicFunctions="true"
FavorSizeOrSpeed="0" FavorSizeOrSpeed="0"
EnableFiberSafeOptimizations="false" EnableFiberSafeOptimizations="false"
WholeProgramOptimization="false" WholeProgramOptimization="false"

13
desmume/src/windows/main.cpp
View File

@ -2,21 +2,18 @@
Copyright 2006 Theo Berkau Copyright 2006 Theo Berkau
Copyright (C) 2006-2010 DeSmuME team Copyright (C) 2006-2010 DeSmuME team
This file is part of DeSmuME This file is free software: you can redistribute it and/or modify
DeSmuME is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
DeSmuME is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with DeSmuME; if not, write to the Free Software along with the this software. If not, see <http://www.gnu.org/licenses/>.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
// icon gradient: #f6f6fb to #8080c0 // icon gradient: #f6f6fb to #8080c0
@ -2646,7 +2643,7 @@ int _main()
return 1; return 1;
} }
cmdline.validate(); cmdline.validate();
start_paused = cmdline.start_paused; start_paused = cmdline.start_paused!=0;
Desmume_InitOnce(); Desmume_InitOnce();