mtabachenko
parent
309cb2418a
commit
66b71553d0
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@ -34,6 +34,13 @@
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IPC_FIFO ipc_fifo[2]; // 0 - ARM9
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// 1 - ARM7
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u8 FORCEINLINE IPC_FIFOgetSize(u8 proc)
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{
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if (ipc_fifo[proc].head < ipc_fifo[proc].tail) return (ipc_fifo[proc].tail - ipc_fifo[proc].head);
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if (ipc_fifo[proc].head > ipc_fifo[proc].tail) return (17 - (ipc_fifo[proc].head - ipc_fifo[proc].tail));
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return 0;
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}
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void IPC_FIFOinit(u8 proc)
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{
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memset(&ipc_fifo[proc], 0, sizeof(IPC_FIFO));
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@ -46,7 +53,7 @@ void IPC_FIFOsend(u8 proc, u32 val)
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if (!(cnt_l & 0x8000)) return; // FIFO disabled
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u8 proc_remote = proc ^ 1;
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if (ipc_fifo[proc].tail > 15)
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if (ipc_fifo[proc].size > 15)
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{
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cnt_l |= 0x4000;
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T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
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@ -61,8 +68,10 @@ void IPC_FIFOsend(u8 proc, u32 val)
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cnt_l &= 0xBFFC; // clear send empty bit & full
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cnt_r &= 0xBCFF; // set recv empty bit & full
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ipc_fifo[proc].buf[ipc_fifo[proc].tail++] = val;
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ipc_fifo[proc].size = IPC_FIFOgetSize(proc);
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if (ipc_fifo[proc].tail > 15) ipc_fifo[proc].tail = 0;
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if (ipc_fifo[proc].tail > 15)
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if (ipc_fifo[proc].size > 15)
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{
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cnt_l |= 0x0002; // set send full bit
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cnt_r |= 0x0200; // set recv full bit
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@ -82,7 +91,7 @@ u32 IPC_FIFOrecv(u8 proc)
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u32 val = 0;
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if ( ipc_fifo[proc_remote].tail == 0 ) // remote FIFO error
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if ( ipc_fifo[proc_remote].size == 0 ) // remote FIFO error
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{
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cnt_l |= 0x4000;
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T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, cnt_l);
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@ -94,16 +103,15 @@ u32 IPC_FIFOrecv(u8 proc)
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cnt_l &= 0xBCFF; // clear send full bit & empty
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cnt_r &= 0xBFFC; // set recv full bit & empty
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val = ipc_fifo[proc_remote].buf[0];
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val = ipc_fifo[proc_remote].buf[ipc_fifo[proc_remote].head++];
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if (ipc_fifo[proc_remote].head > 15) ipc_fifo[proc_remote].head = 0;
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//LOG("IPC%s recv FIFO 0x%08X (l 0x%X, tail %02i) (r 0x%X, tail %02i)\n",
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// proc?"7":"9", val, cnt_l, ipc_fifo[proc].tail, cnt_r, ipc_fifo[proc^1].tail);
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ipc_fifo[proc_remote].tail--;
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for (int i = 0; i < ipc_fifo[proc_remote].tail; i++)
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ipc_fifo[proc_remote].buf[i] = ipc_fifo[proc_remote].buf[i+1];;
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ipc_fifo[proc_remote].size = IPC_FIFOgetSize(proc_remote);
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if ( ipc_fifo[proc_remote].tail == 0 ) // FIFO empty
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if ( ipc_fifo[proc_remote].size == 0 ) // FIFO empty
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{
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cnt_l |= 0x0100;
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cnt_r |= 0x0001;
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@ -142,15 +150,15 @@ GFX_FIFO gxFIFO;
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u8 FORCEINLINE GFX_PIPEgetSize()
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{
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if (gxPIPE.pos < gxPIPE.tail) return (gxPIPE.tail - gxPIPE.pos);
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if (gxPIPE.pos > gxPIPE.tail) return (5 - (gxPIPE.pos - gxPIPE.tail));
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if (gxPIPE.head < gxPIPE.tail) return (gxPIPE.tail - gxPIPE.head);
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if (gxPIPE.head > gxPIPE.tail) return (5 - (gxPIPE.head - gxPIPE.tail));
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return 0;
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}
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u16 FORCEINLINE GFX_FIFOgetSize()
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{
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if (gxFIFO.pos < gxFIFO.tail) return (gxFIFO.tail - gxFIFO.pos);
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if (gxFIFO.pos > gxFIFO.tail) return (257 - (gxFIFO.pos - gxFIFO.tail));
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if (gxFIFO.head < gxFIFO.tail) return (gxFIFO.tail - gxFIFO.head);
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if (gxFIFO.head > gxFIFO.tail) return (257 - (gxFIFO.head - gxFIFO.tail));
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return 0;
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}
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@ -164,7 +172,7 @@ void GFX_FIFOclear()
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u32 gxstat = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600);
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gxstat &= 0x0000FFFF;
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gxFIFO.pos = 0;
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gxFIFO.head = 0;
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gxFIFO.tail = 0;
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gxFIFO.size = 0;
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gxstat |= 0x06000000;
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@ -252,11 +260,11 @@ BOOL FORCEINLINE GFX_FIFOrecv(u8 *cmd, u32 *param)
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}
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gxstat &= 0xF000FFFF;
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*cmd = gxFIFO.cmd[gxFIFO.pos];
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*param = gxFIFO.param[gxFIFO.pos];
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gxFIFO.pos++;
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*cmd = gxFIFO.cmd[gxFIFO.head];
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*param = gxFIFO.param[gxFIFO.head];
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gxFIFO.head++;
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gxFIFO.size = GFX_FIFOgetSize();
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if (gxFIFO.pos > 256) gxFIFO.pos = 0;
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if (gxFIFO.head > 256) gxFIFO.head = 0;
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gxstat |= ((gxFIFO.size & 0x1FF) << 16);
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@ -268,7 +276,7 @@ BOOL FORCEINLINE GFX_FIFOrecv(u8 *cmd, u32 *param)
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#endif
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}
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if (gxFIFO.tail == gxFIFO.pos) // empty
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if (gxFIFO.tail == gxFIFO.head) // empty
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gxstat |= 0x04000000;
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else
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gxstat |= 0x08000000; // set busy flag
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@ -286,11 +294,11 @@ BOOL GFX_PIPErecv(u8 *cmd, u32 *param)
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if (gxPIPE.size > 0)
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{
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*cmd = gxPIPE.cmd[gxPIPE.pos];
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*param = gxPIPE.param[gxPIPE.pos];
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gxPIPE.pos++;
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*cmd = gxPIPE.cmd[gxPIPE.head];
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*param = gxPIPE.param[gxPIPE.head];
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gxPIPE.head++;
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gxPIPE.size = GFX_PIPEgetSize();
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if (gxPIPE.pos > 4) gxPIPE.pos = 0;
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if (gxPIPE.head > 4) gxPIPE.head = 0;
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if (gxPIPE.size < 2)
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{
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@ -337,6 +345,7 @@ void GFX_FIFOcnt(u32 val)
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//INFO("GFX FIFO: write context 0x%08X (prev 0x%08X) tail %i\n", val, gxstat, gxFIFO.tail);
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if (val & (1<<29)) // clear? (homebrew)
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{
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GFX_PIPEclear();
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GFX_FIFOclear();
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return;
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}
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@ -35,7 +35,9 @@ typedef struct
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{
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u32 buf[16];
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u8 head;
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u8 tail;
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u8 size;
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} IPC_FIFO;
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extern IPC_FIFO ipc_fifo[2];
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@ -50,7 +52,7 @@ typedef struct
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u8 cmd[257];
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u32 param[257];
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u16 pos; // start position
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u16 head; // start position
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u16 tail; // tail
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u16 size; // size FIFO buffer
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} GFX_FIFO;
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@ -60,7 +62,7 @@ typedef struct
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u8 cmd[5];
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u32 param[5];
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u8 pos;
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u8 head;
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u8 tail;
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u8 size;
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} GFX_PIPE;
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@ -70,7 +72,6 @@ extern GFX_FIFO gxFIFO;
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extern void GFX_PIPEclear();
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extern void GFX_FIFOclear();
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extern void GFX_FIFOsend(u8 cmd, u32 param);
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extern BOOL GFX_FIFOrecv(u8 *cmd, u32 *param);
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extern BOOL GFX_PIPErecv(u8 *cmd, u32 *param);
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extern void GFX_FIFOcnt(u32 val);
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@ -2387,12 +2387,12 @@ SFORMAT SF_GFX3D[]={
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{ "GLBT", 4, 1, &BTind},
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{ "GLPT", 4, 1, &PTind},
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{ "GLPC", 4, 4, PTcoords},
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{ "GFPO", 4, 1, &gxFIFO.pos},
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{ "GFHD", 4, 1, &gxFIFO.head},
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{ "GFTA", 4, 1, &gxFIFO.tail},
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{ "GFSZ", 4, 1, &gxFIFO.size},
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{ "GFCM", 1, 257, &gxFIFO.cmd[0]},
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{ "GFPM", 4, 257, &gxFIFO.param[0]},
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{ "GPPO", 1, 1, &gxPIPE.pos},
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{ "GPHD", 1, 1, &gxPIPE.head},
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{ "GPTA", 1, 1, &gxPIPE.tail},
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{ "GPSZ", 1, 1, &gxPIPE.size},
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{ "GPCM", 1, 5, &gxPIPE.cmd[0]},
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@ -240,9 +240,13 @@ SFORMAT SF_MMU[]={
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{ "MCHD", 4, 1, &MMU.CheckDMAs},
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//fifos
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{ "F0TH", 1, 1, &ipc_fifo[0].head},
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{ "F0TL", 1, 1, &ipc_fifo[0].tail},
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{ "F0SZ", 1, 1, &ipc_fifo[0].size},
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{ "F0BF", 4, 16, ipc_fifo[0].buf},
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{ "F1TH", 1, 1, &ipc_fifo[1].head},
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{ "F1TL", 1, 1, &ipc_fifo[1].tail},
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{ "F1SZ", 1, 1, &ipc_fifo[1].size},
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{ "F1BF", 4, 16, ipc_fifo[1].buf},
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{ "FDHD", 4, 1, &disp_fifo.head},
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