added 8/32bit writes to masterbrightness registers
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1eba551108
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66a6a53327
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@ -827,6 +827,19 @@ void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val)
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case REG_DISPB_WINOUT+1:
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GPU_setWINDOW_OUTCNT_Component(SubScreen.gpu,val,1) ;
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break ;
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case REG_DISPA_MASTERBRIGHT:
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GPU_setMASTER_BRIGHT (MainScreen.gpu, (val & 0xFF) | (T1ReadWord((u16 *)REG_DISPA_MASTERBRIGHT,0) & 0xFF00));
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break;
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case REG_DISPA_MASTERBRIGHT+1:
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GPU_setMASTER_BRIGHT (MainScreen.gpu, (val & 0xFF00) | (T1ReadWord((u16 *)REG_DISPA_MASTERBRIGHT,0) & 0xFF));
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break;
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case REG_DISPB_MASTERBRIGHT:
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GPU_setMASTER_BRIGHT (SubScreen.gpu, (val & 0xFF) | (T1ReadWord((u16 *)REG_DISPB_MASTERBRIGHT,0) & 0xFF00));
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break;
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case REG_DISPB_MASTERBRIGHT+1:
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GPU_setMASTER_BRIGHT (SubScreen.gpu, (val & 0xFF00) | (T1ReadWord((u16 *)REG_DISPB_MASTERBRIGHT,0) & 0xFF));
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break;
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#ifdef LOG_CARD
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case 0x040001A0 : /* TODO (clear): ??? */
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case 0x040001A1 :
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@ -1790,6 +1803,12 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
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GPU_setWINDOW_INCNT(SubScreen.gpu, val & 0xFFFF) ;
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GPU_setWINDOW_OUTCNT(SubScreen.gpu, (val >> 16) & 0xFFFF) ;
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break ;
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case REG_DISPA_MASTERBRIGHT:
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GPU_setMASTER_BRIGHT (MainScreen.gpu, val & 0xFFFF);
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break;
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case REG_DISPB_MASTERBRIGHT:
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GPU_setMASTER_BRIGHT (SubScreen.gpu, val & 0xFFFF);
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break;
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case REG_IME :
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MMU.reg_IME[proc] = val & 1;
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