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- Fixed MOV according to documentation, fixes armwrestler first page 

Reference: http://nocash.emubase.de/gbatek.htm#arm5dataprocessing (undex Using R15)
This commit is contained in:
shashclp 2007-01-18 04:00:25 +00:00
parent c97c8be9dc
commit 64f12ea810
1 changed files with 4 additions and 0 deletions
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4
desmume/src/arm_instructions.c
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@ -2171,6 +2171,7 @@ static u32 FASTCALL OP_MOV_LSL_REG(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
LSL_REG; LSL_REG;
if (REG_POS(i,0) == 15) shift_op += 4;
OP_MOV(2,4); OP_MOV(2,4);
} }
@ -2186,6 +2187,7 @@ static u32 FASTCALL OP_MOV_LSR_REG(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
LSR_REG; LSR_REG;
if (REG_POS(i,0) == 15) shift_op += 4;
OP_MOV(2,4); OP_MOV(2,4);
} }
@ -2237,6 +2239,7 @@ static u32 FASTCALL OP_MOV_S_LSL_REG(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
S_LSL_REG; S_LSL_REG;
if (REG_POS(i,0) == 15) shift_op += 4;
OP_MOV_S(3,5); OP_MOV_S(3,5);
} }
@ -2251,6 +2254,7 @@ static u32 FASTCALL OP_MOV_S_LSR_REG(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
S_LSR_REG; S_LSR_REG;
if (REG_POS(i,0) == 15) shift_op += 4;
OP_MOV_S(3,5); OP_MOV_S(3,5);
} }