More warnings fixes by riccardom (patch 2157019)

Removed armcpu_prefetchExeption as it seems to
be unused.
This commit is contained in:
yabause 2008-10-17 09:40:27 +00:00
parent 76e87ebccf
commit 64af0142ca
2 changed files with 3 additions and 50 deletions

View File

@ -133,6 +133,7 @@ remove_post_exec_fn( void *instance) {
} }
#endif #endif
#ifdef GDB_STUB
static u32 static u32
read_cpu_reg( void *instance, u32 reg_num) { read_cpu_reg( void *instance, u32 reg_num) {
armcpu_t *armcpu = (armcpu_t *)instance; armcpu_t *armcpu = (armcpu_t *)instance;
@ -166,6 +167,7 @@ set_cpu_reg( void *instance, u32 reg_num, u32 value) {
/* FIXME: setting the CPSR */ /* FIXME: setting the CPSR */
} }
} }
#endif
#ifdef GDB_STUB #ifdef GDB_STUB
int armcpu_new( armcpu_t *armcpu, u32 id, int armcpu_new( armcpu_t *armcpu, u32 id,
@ -365,7 +367,6 @@ static u32
armcpu_prefetch() armcpu_prefetch()
{ {
armcpu_t* armcpu = &ARMPROC; armcpu_t* armcpu = &ARMPROC;
u32 temp_instruction;
if(armcpu->CPSR.bits.T == 0) if(armcpu->CPSR.bits.T == 0)
{ {
@ -474,52 +475,6 @@ BOOL armcpu_irqExeption(armcpu_t *armcpu)
return TRUE; return TRUE;
} }
/*
static BOOL armcpu_prefetchExeption(armcpu_t *armcpu)
{
Status_Reg tmp;
if(armcpu->CPSR.bits.I) return FALSE;
tmp = armcpu->CPSR;
armcpu_switchMode(armcpu, ABT);
armcpu->R[14] = armcpu->next_instruction + 4;
armcpu->SPSR = tmp;
armcpu->CPSR.bits.T = 0;
armcpu->CPSR.bits.I = 1;
armcpu->next_instruction = armcpu->intVector + 0xC;
armcpu->R[15] = armcpu->next_instruction + 8;
armcpu->waitIRQ = 0;
return TRUE;
}
*/
static BOOL armcpu_prefetchExeption(armcpu_t *armcpu)
{
Status_Reg tmp;
if(armcpu->CPSR.bits.I) return FALSE;
tmp = armcpu->CPSR;
armcpu_switchMode(armcpu, ABT);
#ifdef GDB_STUB
armcpu->R[14] = armcpu->next_instruction + 4;
#else
armcpu->R[14] = armcpu->instruct_adr + 4;
#endif
armcpu->SPSR = tmp;
armcpu->CPSR.bits.T = 0;
armcpu->CPSR.bits.I = 1;
armcpu->next_instruction = armcpu->intVector + 0xC;
armcpu->waitIRQ = 0;
#ifdef GDB_STUB
armcpu->R[15] = armcpu->next_instruction + 8;
#else
armcpu->R[15] = armcpu->next_instruction;
armcpu_prefetch(armcpu);
#endif
return TRUE;
}
BOOL BOOL
armcpu_flagIrq( armcpu_t *armcpu) { armcpu_flagIrq( armcpu_t *armcpu) {

View File

@ -233,9 +233,7 @@ u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode);
template<int PROCNUM> u32 armcpu_exec(); template<int PROCNUM> u32 armcpu_exec();
BOOL armcpu_irqExeption(armcpu_t *armcpu); BOOL armcpu_irqExeption(armcpu_t *armcpu);
//BOOL armcpu_prefetchExeption(armcpu_t *armcpu); BOOL armcpu_flagIrq( armcpu_t *armcpu);
BOOL
armcpu_flagIrq( armcpu_t *armcpu);
extern armcpu_t NDS_ARM7; extern armcpu_t NDS_ARM7;
extern armcpu_t NDS_ARM9; extern armcpu_t NDS_ARM9;