Added the ability to write to the external firmware image (when there's one).
The firmware can now save new settings!
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fabcf94d50
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5f617ca6ef
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@ -852,10 +852,70 @@ void NDS_Reset( void)
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MMU_clearMem();
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//ARM7 BIOS IRQ HANDLER
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if(CommonSettings.UseExtBIOS == true)
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inf = fopen(CommonSettings.ARM7BIOS,"rb");
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else
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inf = NULL;
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if(inf) {
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fread(MMU.ARM7_BIOS,1,16384,inf);
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fclose(inf);
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if(CommonSettings.SWIFromBIOS == true) NDS_ARM7.swi_tab = 0;
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else NDS_ARM7.swi_tab = ARM7_swi_tab;
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INFO("ARM7 BIOS is loaded.\n");
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} else {
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NDS_ARM7.swi_tab = ARM7_swi_tab;
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_MMU_write32<ARMCPU_ARM7>(0x00, 0xE25EF002);
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_MMU_write32<ARMCPU_ARM7>(0x04, 0xEAFFFFFE);
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_MMU_write32<ARMCPU_ARM7>(0x18, 0xEA000000);
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_MMU_write32<ARMCPU_ARM7>(0x20, 0xE92D500F);
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_MMU_write32<ARMCPU_ARM7>(0x24, 0xE3A00301);
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_MMU_write32<ARMCPU_ARM7>(0x28, 0xE28FE000);
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_MMU_write32<ARMCPU_ARM7>(0x2C, 0xE510F004);
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_MMU_write32<ARMCPU_ARM7>(0x30, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM7>(0x34, 0xE25EF004);
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}
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//ARM9 BIOS IRQ HANDLER
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if(CommonSettings.UseExtBIOS == true)
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inf = fopen(CommonSettings.ARM9BIOS,"rb");
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else
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inf = NULL;
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//memcpy(ARM9Mem.ARM9_BIOS + 0x20, gba_header_data_0x04, 156);
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if(inf) {
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fread(ARM9Mem.ARM9_BIOS,1,4096,inf);
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fclose(inf);
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if(CommonSettings.SWIFromBIOS == true) NDS_ARM9.swi_tab = 0;
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else NDS_ARM9.swi_tab = ARM9_swi_tab;
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INFO("ARM9 BIOS is loaded.\n");
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} else {
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NDS_ARM9.swi_tab = ARM9_swi_tab;
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0018, 0xEA000000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0020, 0xE92D500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0024, 0xEE190F11);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0028, 0xE1A00620);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF002C, 0xE1A00600);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0030, 0xE2800C40);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0034, 0xE28FE000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0038, 0xE510F004);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF003C, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0040, 0xE25EF004);
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}
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/* Is it really needed ??? */
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_MMU_write32<ARMCPU_ARM9>(0x0000004, 0xE3A0010E);
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_MMU_write32<ARMCPU_ARM9>(0x0000008, 0xE3A01020);
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// _MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02110);
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_MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02040);
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_MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE3B02020);
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// _MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE2100202);
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if(CommonSettings.UseExtFirmware == true)
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NDS_LoadFirmware(CommonSettings.Firmware);
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if((CommonSettings.UseExtFirmware == true) && (CommonSettings.BootFromFirmware == true) && (fw_success == TRUE))
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if((CommonSettings.UseExtBIOS == true) && (CommonSettings.UseExtFirmware == true) && (CommonSettings.BootFromFirmware == true) && (fw_success == TRUE))
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{
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for(i = 0; i < nds.FW_ARM9BootCodeSize; i += 4)
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{
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@ -869,6 +929,8 @@ void NDS_Reset( void)
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armcpu_init(&NDS_ARM9, nds.FW_ARM9BootCodeAddr);
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armcpu_init(&NDS_ARM7, nds.FW_ARM7BootCodeAddr);
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//armcpu_init(&NDS_ARM9, 0xFFFF0000);
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//armcpu_init(&NDS_ARM7, 0x00000000);
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}
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else
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{
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@ -940,68 +1002,6 @@ void NDS_Reset( void)
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//_MMU_write32[ARMCPU_ARM9](0x02007FFC, 0xE92D4030);
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//ARM7 BIOS IRQ HANDLER
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if(CommonSettings.UseExtBIOS == true)
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inf = fopen(CommonSettings.ARM7BIOS,"rb");
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else
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inf = NULL;
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if(inf) {
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fread(MMU.ARM7_BIOS,1,16384,inf);
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fclose(inf);
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if(CommonSettings.SWIFromBIOS == true) NDS_ARM7.swi_tab = 0;
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else NDS_ARM7.swi_tab = ARM7_swi_tab;
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INFO("ARM7 BIOS is loaded.\n");
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} else {
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NDS_ARM7.swi_tab = ARM7_swi_tab;
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_MMU_write32<ARMCPU_ARM7>(0x00, 0xE25EF002);
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_MMU_write32<ARMCPU_ARM7>(0x04, 0xEAFFFFFE);
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_MMU_write32<ARMCPU_ARM7>(0x18, 0xEA000000);
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_MMU_write32<ARMCPU_ARM7>(0x20, 0xE92D500F);
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_MMU_write32<ARMCPU_ARM7>(0x24, 0xE3A00301);
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_MMU_write32<ARMCPU_ARM7>(0x28, 0xE28FE000);
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_MMU_write32<ARMCPU_ARM7>(0x2C, 0xE510F004);
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_MMU_write32<ARMCPU_ARM7>(0x30, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM7>(0x34, 0xE25EF004);
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}
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//ARM9 BIOS IRQ HANDLER
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if(CommonSettings.UseExtBIOS == true)
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inf = fopen(CommonSettings.ARM9BIOS,"rb");
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else
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inf = NULL;
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//memcpy(ARM9Mem.ARM9_BIOS + 0x20, gba_header_data_0x04, 156);
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if(inf) {
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fread(ARM9Mem.ARM9_BIOS,1,4096,inf);
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fclose(inf);
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if(CommonSettings.SWIFromBIOS == true) NDS_ARM9.swi_tab = 0;
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else NDS_ARM9.swi_tab = ARM9_swi_tab;
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INFO("ARM9 BIOS is loaded.\n");
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} else {
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NDS_ARM9.swi_tab = ARM9_swi_tab;
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0018, 0xEA000000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0020, 0xE92D500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0024, 0xEE190F11);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0028, 0xE1A00620);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF002C, 0xE1A00600);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0030, 0xE2800C40);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0034, 0xE28FE000);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0038, 0xE510F004);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF003C, 0xE8BD500F);
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_MMU_write32<ARMCPU_ARM9>(0xFFFF0040, 0xE25EF004);
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}
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_MMU_write32<ARMCPU_ARM9>(0x0000004, 0xE3A0010E);
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_MMU_write32<ARMCPU_ARM9>(0x0000008, 0xE3A01020);
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// _MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02110);
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_MMU_write32<ARMCPU_ARM9>(0x000000C, 0xE1B02040);
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_MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE3B02020);
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// _MMU_write32<ARMCPU_ARM9>(0x0000010, 0xE2100202);
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delete header;
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GPU_Reset(MainScreen.gpu, 0);
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@ -1346,24 +1346,24 @@ int NDS_LoadFirmware(const char *filename)
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{
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int i;
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unsigned long size;
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FILE *file;
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//FILE *file;
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if ((file = fopen(filename, "rb")) == NULL)
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if ((MMU.fw.fp = fopen(filename, "rb+")) == NULL)
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return -1;
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fseek(file, 0, SEEK_END);
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size = ftell(file);
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fseek(file, 0, SEEK_SET);
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fseek(MMU.fw.fp, 0, SEEK_END);
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size = ftell(MMU.fw.fp);
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fseek(MMU.fw.fp, 0, SEEK_SET);
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if(size > MMU.fw.size)
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{
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fclose(file);
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fclose(MMU.fw.fp);
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fw_success = FALSE;
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return -1;
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}
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i = fread(MMU.fw.data, size, 1, file);
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fclose(file);
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i = fread(MMU.fw.data, size, 1, MMU.fw.fp);
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//fclose(file);
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INFO("Firmware: decrypting NDS firmware %s...\n", filename);
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@ -179,7 +179,7 @@ void mc_reset_com(memory_chip_t *mc)
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if ((mc->fp = fopen(mc->filename, "wb+")) != NULL)
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elems_written += fwrite((void *)mc->data, 1, mc->size, mc->fp);
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}
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else if (mc->com == BM_CMD_WRITELOW)
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else if ((mc->com == BM_CMD_WRITELOW) || (mc->com == FW_CMD_PAGEWRITE))
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{
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if (mc->fp)
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{
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@ -328,7 +328,7 @@ u8 fw_transfer(memory_chip_t *mc, u8 data)
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}
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else if(mc->com == FW_CMD_READSTATUS)
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{
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return 0;
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return (mc->write_enable ? 0x02 : 0x00);
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}
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else /* finally, check if it's a new command */
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{
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