cheats: fix Ex, DB, and Fx codes
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444b1f67db
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5f1e50db69
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@ -86,7 +86,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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//TODO: "Code Hacks" from kodewerx (seems frail, but we should at least detect them and print some diagnostics
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//TODO: v154 special stuff
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bool v154 = false; //not supported yet
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bool v154 = true; //on advice of power users, v154 is so old, we can assume all cheats use it
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struct {
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//LSB is
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@ -245,7 +245,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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z = lo>>16;
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if(v154) if(x == 0) x = st.offset;
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operand = _MMU_read16<ARMCPU_ARM7,MMU_AT_DEBUG>(x);
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if(y > ( (~z) & operand) ) st.status &= ~1;
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if(y > ( (~z) & operand) ) st.status &= ~1;
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break;
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case 0x08:
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@ -258,7 +258,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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z = lo>>16;
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if(v154) if(x == 0) x = st.offset;
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operand = _MMU_read16<ARMCPU_ARM7,MMU_AT_DEBUG>(x);
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if(y < ( (~z) & operand) ) st.status &= ~1;
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if(y < ( (~z) & operand) ) st.status &= ~1;
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break;
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case 0x09:
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@ -271,7 +271,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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z = lo>>16;
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if(v154) if(x == 0) x = st.offset;
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operand = _MMU_read16<ARMCPU_ARM7,MMU_AT_DEBUG>(x);
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if(y == ( (~z) & operand) ) st.status &= ~1;
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if(y == ( (~z) & operand) ) st.status &= ~1;
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break;
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case 0x0A:
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@ -284,7 +284,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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z = lo>>16;
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if(v154) if(x == 0) x = st.offset;
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operand = _MMU_read16<ARMCPU_ARM7,MMU_AT_DEBUG>(x);
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if(y != ( (~z) & operand) ) st.status &= ~1;
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if(y != ( (~z) & operand) ) st.status &= ~1;
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break;
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case 0x0B:
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@ -492,6 +492,7 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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{
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u32 j=0,t=0,b=0;
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if(y>0) i++; //skip over the current code
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while(y>=4)
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{
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u32 tmp = list.code[i][t];
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@ -520,19 +521,22 @@ void CHEATS::ARparser(CHEATS_LIST& list)
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//attempting to emulate logic the way they may have implemented it, just in case
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x = hi & 0x0FFFFFFF;
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y = lo;
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addr = x;
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addr = st.offset;
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operand = x; //mis-use of this variable to store dst
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while(y>=4)
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{
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u32 tmp = _MMU_read32<ARMCPU_ARM7,MMU_AT_DEBUG>(addr);
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_MMU_write32<ARMCPU_ARM7,MMU_AT_DEBUG>(y,tmp);
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_MMU_write32<ARMCPU_ARM7,MMU_AT_DEBUG>(operand,tmp);
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addr += 4;
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operand += 4;
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y -= 4;
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}
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while(y>0)
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{
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u8 tmp = _MMU_read08<ARMCPU_ARM7,MMU_AT_DEBUG>(addr);
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_MMU_write08<ARMCPU_ARM7,MMU_AT_DEBUG>(y,tmp);
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_MMU_write08<ARMCPU_ARM7,MMU_AT_DEBUG>(operand,tmp);
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addr += 1;
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operand += 1;
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y -= 1;
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}
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break;
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