- Added support for DMA transfer mode 7 -> "Geometry Command FIFO"
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@ -2639,14 +2639,15 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
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}
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}
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return;
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case REG_DMA0CNTL :
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case REG_DMA0CNTL :
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//LOG("32 bit dma0 %04X\r\n", val);
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DMASrc[proc][0] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xB0);
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DMADst[proc][0] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xB4);
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MMU.DMAStartTime[proc][0] = (proc ? (val>>28) & 0x3 : (val>>27) & 0x7);
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MMU.DMACrt[proc][0] = val;
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0xB8, val);
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if( MMU.DMAStartTime[proc][0] == 0) // Start Immediately
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if( MMU.DMAStartTime[proc][0] == 0 ||
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MMU.DMAStartTime[proc][0] == 7) // Start Immediately
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MMU_doDMA(proc, 0);
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#ifdef LOG_DMA2
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else
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@ -2656,14 +2657,15 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
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#endif
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//execute = FALSE;
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return;
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case REG_DMA1CNTL :
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case REG_DMA1CNTL:
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//LOG("32 bit dma1 %04X\r\n", val);
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DMASrc[proc][1] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xBC);
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DMADst[proc][1] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xC0);
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MMU.DMAStartTime[proc][1] = (proc ? (val>>28) & 0x3 : (val>>27) & 0x7);
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MMU.DMACrt[proc][1] = val;
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0xC4, val);
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if(MMU.DMAStartTime[proc][1] == 0) // Start Immediately
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if(MMU.DMAStartTime[proc][1] == 0 ||
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MMU.DMAStartTime[proc][1] == 7) // Start Immediately
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MMU_doDMA(proc, 1);
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#ifdef LOG_DMA2
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else
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@ -2672,14 +2674,15 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
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}
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#endif
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return;
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case REG_DMA2CNTL :
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case REG_DMA2CNTL :
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//LOG("32 bit dma2 %04X\r\n", val);
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DMASrc[proc][2] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xC8);
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DMADst[proc][2] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xCC);
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MMU.DMAStartTime[proc][2] = (proc ? (val>>28) & 0x3 : (val>>27) & 0x7);
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MMU.DMACrt[proc][2] = val;
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0xD0, val);
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if(MMU.DMAStartTime[proc][2] == 0) // Start Immediately
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if(MMU.DMAStartTime[proc][2] == 0 ||
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MMU.DMAStartTime[proc][2] == 7) // Start Immediately
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MMU_doDMA(proc, 2);
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#ifdef LOG_DMA2
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else
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@ -2688,14 +2691,15 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
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}
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#endif
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return;
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case 0x040000DC :
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case 0x040000DC :
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//LOG("32 bit dma3 %04X\r\n", val);
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DMASrc[proc][3] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xD4);
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DMADst[proc][3] = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0xD8);
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MMU.DMAStartTime[proc][3] = (proc ? (val>>28) & 0x3 : (val>>27) & 0x7);
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MMU.DMACrt[proc][3] = val;
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0xDC, val);
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if( MMU.DMAStartTime[proc][3] == 0) // Start Immediately
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if( MMU.DMAStartTime[proc][3] == 0 ||
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MMU.DMAStartTime[proc][3] == 7) // Start Immediately
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MMU_doDMA(proc, 3);
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#ifdef LOG_DMA2
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else
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