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fixed and commented interrupt waiting for cp15

This commit is contained in:
mightymax 2007-01-07 22:30:11 +00:00
parent b86c3f4ee6
commit 498c2b0550
2 changed files with 9 additions and 2 deletions
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2
desmume/src/armcpu.h
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@ -183,12 +183,14 @@ static INLINE void NDS_makeARM9Int(u32 num)
{
MMU.reg_IF[0] |= (1<<num);// & (MMU.reg_IME[0] << num);//& (MMU.reg_IE[0] & (1<<num));
NDS_ARM9.wIRQ = TRUE;
NDS_ARM9.waitIRQ = FALSE;
}
static INLINE void NDS_makeARM7Int(u32 num)
{
MMU.reg_IF[1] |= (1<<num);// & (MMU.reg_IME[1] << num);// (MMU.reg_IE[1] & (1<<num));
NDS_ARM7.wIRQ = TRUE;
NDS_ARM7.waitIRQ = FALSE;
}
#ifdef __cplusplus

9
desmume/src/cp15.c
View File

@ -405,23 +405,28 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
u32 CP15wait4IRQ(armcpu_t *cpu)
{
/* on the first call, wirq is not set */
if(cpu->wirq)
{
/* check wether an irq was issued */
if(!cpu->waitIRQ)
{
cpu->waitIRQ = 0;
cpu->wirq = 0;
//cpu->switchMode(oldmode[cpu->proc_ID]);
return 1;
return 1; /* return execution */
}
/* otherwise, repeat this instruction */
cpu->R[15] = cpu->instruct_adr;
cpu->next_instruction = cpu->R[15];
return 1;
}
/* first run, set us into waiting state */
cpu->waitIRQ = 1;
cpu->wirq = 1;
/* and set next instruction to repeat this */
cpu->R[15] = cpu->instruct_adr;
cpu->next_instruction = cpu->R[15];
/* CHECKME: IME shouldn't be modified (?) */
MMU.reg_IME[0] = 1;
return 1;
}