- fixed bug in FPU;
- add reset & close function for 3D;

winport:
- add texture cache in 3D (more speedup).
This commit is contained in:
mtabachenko 2008-08-25 20:19:56 +00:00
parent 88611b638e
commit 45e4238932
10 changed files with 665 additions and 511 deletions

View File

@ -24,6 +24,8 @@
- Added the version on window bar to recognize versions from screenshots [shash] - Added the version on window bar to recognize versions from screenshots [shash]
- Changed graphics render core to DirectDraw (work fastest) [CrazyMax] - Changed graphics render core to DirectDraw (work fastest) [CrazyMax]
- Some fixes in 3D core OGL (fixed textures) [CrazyMax] - Some fixes in 3D core OGL (fixed textures) [CrazyMax]
- Added texture caching (speedup 3D core) [CrazyMax]
- Fixes clear depth (ex. Castlevania now don't flipping) [NHerve]
0.7.3 -> 0.8 0.7.3 -> 0.8
Cocoa: Cocoa:

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@ -191,8 +191,8 @@ void MMU_Init(void) {
MMU.MMU_MASK[0]= MMU_ARM9_MEM_MASK; MMU.MMU_MASK[0]= MMU_ARM9_MEM_MASK;
MMU.MMU_MASK[1] = MMU_ARM7_MEM_MASK; MMU.MMU_MASK[1] = MMU_ARM7_MEM_MASK;
MMU.ITCMRegion = 0x00800000; MMU.DTCMRegion = 0x027C0000;
//MMU.ITCMRegion = 0x00000000; MMU.ITCMRegion = 0x00000000;
MMU.MMU_WAIT16[0] = MMU_ARM9_WAIT16; MMU.MMU_WAIT16[0] = MMU_ARM9_WAIT16;
MMU.MMU_WAIT16[1] = MMU_ARM7_WAIT16; MMU.MMU_WAIT16[1] = MMU_ARM7_WAIT16;
@ -202,7 +202,7 @@ void MMU_Init(void) {
for(i = 0;i < 16;i++) for(i = 0;i < 16;i++)
FIFOInit(MMU.fifos + i); FIFOInit(MMU.fifos + i);
memset(&MMU.gfxfifo, 0, sizeof(GFXFIFO)); memset(&MMU.gfxfifo, 0, sizeof(GFXFIFO));
MMU.gfxfifo.empty=TRUE; MMU.gfxfifo.half=TRUE; MMU.gfxfifo.empty=MMU.gfxfifo.half=TRUE;
mc_init(&MMU.fw, MC_TYPE_FLASH); /* init fw device */ mc_init(&MMU.fw, MC_TYPE_FLASH); /* init fw device */
mc_alloc(&MMU.fw, NDS_FW_SIZE_V1); mc_alloc(&MMU.fw, NDS_FW_SIZE_V1);
@ -261,10 +261,11 @@ void MMU_clearMem()
for(i = 0;i < 16;i++) for(i = 0;i < 16;i++)
FIFOInit(MMU.fifos + i); FIFOInit(MMU.fifos + i);
memset(&MMU.gfxfifo, 0, sizeof(GFXFIFO));
MMU.gfxfifo.empty=MMU.gfxfifo.half=TRUE;
MMU.DTCMRegion = 0; MMU.DTCMRegion = 0x027C0000;
MMU.ITCMRegion = 0x00800000; MMU.ITCMRegion = 0x00000000;
//MMU.ITCMRegion = 0x00000000;
memset(MMU.timer, 0, sizeof(u16) * 2 * 4); memset(MMU.timer, 0, sizeof(u16) * 2 * 4);
memset(MMU.timerMODE, 0, sizeof(s32) * 2 * 4); memset(MMU.timerMODE, 0, sizeof(s32) * 2 * 4);
@ -283,8 +284,8 @@ void MMU_clearMem()
memset(MMU.dscard, 0, sizeof(nds_dscard) * 2); memset(MMU.dscard, 0, sizeof(nds_dscard) * 2);
MainScreen.offset = 192; MainScreen.offset = 0;
SubScreen.offset = 0; SubScreen.offset = 192;
/* setup the texture slot pointers */ /* setup the texture slot pointers */
#if 0 #if 0
@ -503,12 +504,12 @@ switch (VRAMBankCnt & 7) {
break; break;
case 7: case 7:
case 8: // bank H is in use at BBG case 8: // bank H is in use at BBG
destination = ARM9Mem.ARM9_BBG ; //destination = ARM9Mem.ARM9_BBG ;
break ; break ;
case 9: // bank I is in use at BBG case 9: // bank I is in use at BBG
//destination = ARM9Mem.ARM9_BBG + 0x8000 ; //destination = ARM9Mem.ARM9_BBG + 0x8000 ;
break; break;
default: return ; //default: return ;
} }
break ; break ;
case 2: case 2:
@ -531,7 +532,7 @@ switch (VRAMBankCnt & 7) {
} }
break; break;
case 3: break; //case 3: break;
case 4: case 4:
switch(block){ switch(block){
case 2: // bank C is in use at BBG case 2: // bank C is in use at BBG
@ -656,6 +657,7 @@ u16 FASTCALL MMU_read16(u32 proc, u32 adr)
return (gpu3D->NDS_3D_GetNumVertex()&8191); return (gpu3D->NDS_3D_GetNumVertex()&8191);
case REG_IPCFIFORECV : /* TODO (clear): ??? */ case REG_IPCFIFORECV : /* TODO (clear): ??? */
printlog("Stopped IPCFIFORECV\n");
execute = FALSE; execute = FALSE;
return 1; return 1;
@ -679,7 +681,7 @@ u16 FASTCALL MMU_read16(u32 proc, u32 adr)
return MMU.timer[proc][(adr&0xF)>>2]; return MMU.timer[proc][(adr&0xF)>>2];
case 0x04000630 : case 0x04000630 :
LOG("vect res\r\n"); /* TODO (clear): ??? */ //LOG("vect res\r\n"); /* TODO (clear): ??? */
//execute = FALSE; //execute = FALSE;
return 0; return 0;
case REG_POSTFLG : case REG_POSTFLG :
@ -816,35 +818,29 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr)
LOG("point res\r\n"); LOG("point res\r\n");
return 0; return 0;
*/ */
case REG_GCDATAIN: case REG_GCDATAIN:
{ {
u32 val; u32 val=0;
if(!MMU.dscard[proc].adress) return 0; if(MMU.dscard[proc].adress)
val = T1ReadLong(MMU.CART_ROM, MMU.dscard[proc].adress);
val = T1ReadLong(MMU.CART_ROM, MMU.dscard[proc].adress);
MMU.dscard[proc].adress += 4; /* increment adress */ MMU.dscard[proc].adress += 4; /* increment adress */
MMU.dscard[proc].transfer_count--; /* update transfer counter */ MMU.dscard[proc].transfer_count--; /* update transfer counter */
if(MMU.dscard[proc].transfer_count) /* if transfer is not ended */ if(MMU.dscard[proc].transfer_count) /* if transfer is not ended */
{ return val; /* return data */
return val; /* return data */ else /* transfer is done */
} {
else /* transfer is done */ T1WriteLong(MMU.MMU_MEM[proc][(REG_GCROMCTRL >> 20) & 0xff], REG_GCROMCTRL & 0xfff, T1ReadLong(MMU.MMU_MEM[proc][(REG_GCROMCTRL >> 20) & 0xff], REG_GCROMCTRL & 0xfff) & ~(0x00800000 | 0x80000000));
{ /* = 0x7f7fffff */
T1WriteLong(MMU.MMU_MEM[proc][(REG_GCROMCTRL >> 20) & 0xff], REG_GCROMCTRL & 0xfff, T1ReadLong(MMU.MMU_MEM[proc][(REG_GCROMCTRL >> 20) & 0xff], REG_GCROMCTRL & 0xfff) & ~(0x00800000 | 0x80000000));
/* = 0x7f7fffff */ /* if needed, throw irq for the end of transfer */
if(T1ReadWord(MMU.MMU_MEM[proc][(REG_AUXSPICNT >> 20) & 0xff], REG_AUXSPICNT & 0xfff) & 0x4000)
/* if needed, throw irq for the end of transfer */ NDS_makeInt(proc,19);
if(T1ReadWord(MMU.MMU_MEM[proc][(REG_AUXSPICNT >> 20) & 0xff], REG_AUXSPICNT & 0xfff) & 0x4000)
{ return val;
if(proc == ARMCPU_ARM7) NDS_makeARM7Int(19);
else NDS_makeARM9Int(19);
} }
return val;
}
} }
default : default :
@ -1422,8 +1418,9 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
MainScreen.offset = 192; MainScreen.offset = 192;
SubScreen.offset = 0; SubScreen.offset = 0;
} }
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x304, val);
} }
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x304, val);
return; return;
case REG_AUXSPICNT: case REG_AUXSPICNT:
@ -1665,16 +1662,16 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
} }
return; return;
case REG_IE + 2 : case REG_IE + 2 :
execute = FALSE; //execute = FALSE;
MMU.reg_IE[proc] = (MMU.reg_IE[proc]&0xFFFF) | (((u32)val)<<16); MMU.reg_IE[proc] = (MMU.reg_IE[proc]&0xFFFF) | (((u32)val)<<16);
return; return;
case REG_IF : case REG_IF :
execute = FALSE; //execute = FALSE;
MMU.reg_IF[proc] &= (~((u32)val)); MMU.reg_IF[proc] &= (~((u32)val));
return; return;
case REG_IF + 2 : case REG_IF + 2 :
execute = FALSE; //execute = FALSE;
MMU.reg_IF[proc] &= (~(((u32)val)<<16)); MMU.reg_IF[proc] &= (~(((u32)val)<<16));
return; return;

View File

@ -181,6 +181,7 @@ void NDS_DeInit(void) {
SPU_DeInit(); SPU_DeInit();
Screen_DeInit(); Screen_DeInit();
MMU_DeInit(); MMU_DeInit();
NDS_3D_Close();
} }
BOOL NDS_SetROM(u8 * rom, u32 mask) BOOL NDS_SetROM(u8 * rom, u32 mask)
@ -533,6 +534,7 @@ void NDS_Reset( void)
GPU_Reset(MainScreen.gpu, 0); GPU_Reset(MainScreen.gpu, 0);
GPU_Reset(SubScreen.gpu, 1); GPU_Reset(SubScreen.gpu, 1);
NDS_3D_Reset();
SPU_Reset(); SPU_Reset();
execute = oldexecute; execute = oldexecute;

View File

@ -242,6 +242,7 @@ static u32 FASTCALL OP_UND(armcpu_t *cpu)
u32 i = cpu->instruction; u32 i = cpu->instruction;
LOG("Undefined instruction: %08X\n", i); LOG("Undefined instruction: %08X\n", i);
execute = FALSE; execute = FALSE;
LOG("Stopped (OP_UND)\n");
return 1; return 1;
} }
@ -5889,7 +5890,7 @@ static u32 FASTCALL OP_LDRBT_P_REG_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_P_REG_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_P_REG_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -5915,7 +5916,7 @@ static u32 FASTCALL OP_LDRBT_P_LSL_IMM_OFF_POSTIND(armcpu_t *cpu)
return 2; return 2;
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_P_LSL_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_P_LSL_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -5943,7 +5944,7 @@ static u32 FASTCALL OP_LDRBT_M_LSL_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_M_LSL_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_M_LSL_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -5971,7 +5972,7 @@ static u32 FASTCALL OP_LDRBT_P_LSR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_P_LSR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_P_LSR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -5999,7 +6000,7 @@ static u32 FASTCALL OP_LDRBT_M_LSR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_M_LSR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_M_LSR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -6027,7 +6028,7 @@ static u32 FASTCALL OP_LDRBT_P_ASR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_P_ASR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_P_ASR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -6055,7 +6056,7 @@ static u32 FASTCALL OP_LDRBT_M_ASR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_M_ASR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_M_ASR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -6083,7 +6084,7 @@ static u32 FASTCALL OP_LDRBT_P_ROR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_P_ROR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_P_ROR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -6111,7 +6112,7 @@ static u32 FASTCALL OP_LDRBT_M_ROR_IMM_OFF_POSTIND(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDRBT_M_ROR_IMM_OFF_POSTIND"); LOG("Untested opcode: OP_LDRBT_M_ROR_IMM_OFF_POSTIND\n");
i = cpu->instruction; i = cpu->instruction;
@ -6841,7 +6842,7 @@ static u32 FASTCALL OP_LDMIB2(armcpu_t *cpu)
u32 * registres; u32 * registres;
u32 * waitState; u32 * waitState;
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDMIB2"); LOG("Untested opcode: OP_LDMIB2\n");
if(BIT15(i)==0) if(BIT15(i)==0)
{ {
@ -6900,7 +6901,7 @@ static u32 FASTCALL OP_LDMDA2(armcpu_t *cpu)
u32 start = cpu->R[REG_POS(i,16)]; u32 start = cpu->R[REG_POS(i,16)];
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_LDMDA2"); LOG("Untested opcode: OP_LDMDA2\n");
if(BIT15(i)==0) if(BIT15(i)==0)
{ {
@ -7411,7 +7412,7 @@ static u32 FASTCALL OP_STMIA2(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMIA2"); LOG("Untested opcode: OP_STMIA2\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7442,7 +7443,7 @@ static u32 FASTCALL OP_STMIB2(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMIB2"); LOG("Untested opcode: OP_STMIB2\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7473,7 +7474,7 @@ static u32 FASTCALL OP_STMDA2(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMDA2"); LOG("Untested opcode: OP_STMDA2\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7531,7 +7532,7 @@ static u32 FASTCALL OP_STMIA2_W(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMIA2_W"); LOG("Untested opcode: OP_STMIA2_W\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7591,7 +7592,7 @@ static u32 FASTCALL OP_STMDA2_W(armcpu_t *cpu)
start = cpu->R[REG_POS(i,16)]; start = cpu->R[REG_POS(i,16)];
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMDA2_W"); LOG("Untested opcode: OP_STMDA2_W\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7625,7 +7626,7 @@ static u32 FASTCALL OP_STMDB2_W(armcpu_t *cpu)
oldmode = armcpu_switchMode(cpu, SYS); oldmode = armcpu_switchMode(cpu, SYS);
//execute = FALSE; //execute = FALSE;
LOG("Untested opcode: OP_STMDB2_W"); LOG("Untested opcode: OP_STMDB2_W\n");
for(b=0; b<16; ++b) for(b=0; b<16; ++b)
{ {
@ -7854,6 +7855,7 @@ static u32 FASTCALL OP_MCR(armcpu_t *cpu)
if(!cpu->coproc[cpnum]) if(!cpu->coproc[cpnum])
{ {
execute = FALSE; execute = FALSE;
LOG("Stopped (OP_MCR)\n");
return 2; return 2;
} }
@ -7872,6 +7874,7 @@ static u32 FASTCALL OP_MRC(armcpu_t *cpu)
if(!cpu->coproc[cpnum]) if(!cpu->coproc[cpnum])
{ {
execute = FALSE; execute = FALSE;
LOG("Stopped (OP_MRC)\n");
return 2; return 2;
} }
@ -7909,6 +7912,7 @@ static u32 FASTCALL OP_SWI(armcpu_t *cpu)
static u32 FASTCALL OP_BKPT(armcpu_t *cpu) static u32 FASTCALL OP_BKPT(armcpu_t *cpu)
{ {
execute = FALSE; execute = FALSE;
LOG("Stopped (OP_BKPT)\n");
return 4; return 4;
} }
@ -7917,6 +7921,7 @@ static u32 FASTCALL OP_BKPT(armcpu_t *cpu)
static u32 FASTCALL OP_CDP(armcpu_t *cpu) static u32 FASTCALL OP_CDP(armcpu_t *cpu)
{ {
execute = FALSE; execute = FALSE;
LOG("Stopped (OP_CDP)\n");
return 4; return 4;
} }

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@ -248,16 +248,19 @@ INLINE BOOL armcp15_isAccessAllowed(armcp15_t *armcp15,u32 address,u32 access)
BOOL armcp15_dataProcess(armcp15_t *armcp15, u8 CRd, u8 CRn, u8 CRm, u8 opcode1, u8 opcode2) BOOL armcp15_dataProcess(armcp15_t *armcp15, u8 CRd, u8 CRn, u8 CRm, u8 opcode1, u8 opcode2)
{ {
LOG("Unsupported CP15 operation : DataProcess\n");
return FALSE; return FALSE;
} }
BOOL armcp15_load(armcp15_t *armcp15, u8 CRd, u8 adr) BOOL armcp15_load(armcp15_t *armcp15, u8 CRd, u8 adr)
{ {
LOG("Unsupported CP15 operation : Load\n");
return FALSE; return FALSE;
} }
BOOL armcp15_store(armcp15_t *armcp15, u8 CRd, u8 adr) BOOL armcp15_store(armcp15_t *armcp15, u8 CRd, u8 adr)
{ {
LOG("Unsupported CP15 operation : Store\n");
return FALSE; return FALSE;
} }
@ -398,6 +401,7 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
} }
return FALSE; return FALSE;
default : default :
LOG("Unsupported CP15 operation : MRC\n");
return FALSE; return FALSE;
} }
} }
@ -478,6 +482,7 @@ BOOL armcp15_moveARM2CP(armcp15_t *armcp15, u32 val, u8 CRn, u8 CRm, u8 opcode1,
return TRUE; return TRUE;
} }
return FALSE; return FALSE;
case 5 :
if((opcode1==0) && (CRm==0)) if((opcode1==0) && (CRm==0))
{ {
switch(opcode2) switch(opcode2)

View File

@ -32,57 +32,67 @@ void NDS_nullFunc9 (int line, unsigned short * DST) { };
void NDS_nullFunc10 (unsigned int mode, unsigned int index, float* dest) {}; // NDS_3D_GetMatrix void NDS_nullFunc10 (unsigned int mode, unsigned int index, float* dest) {}; // NDS_3D_GetMatrix
void NDS_nullFunc11 (unsigned int index, unsigned int* dest) {}; // NDS_glGetLightDirection void NDS_nullFunc11 (unsigned int index, unsigned int* dest) {}; // NDS_glGetLightDirection
GPU3DInterface gpu3DNull = { NDS_nullFunc1, GPU3DInterface gpu3DNull = {
NDS_nullFunc3, NDS_nullFunc1, // NDS_3D_Init
NDS_nullFunc3, NDS_nullFunc2, // NDS_3D_Reset
NDS_nullFunc3, NDS_nullFunc2, // NDS_3D_Close
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_ViewPort
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_ClearColor
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_FogColor
NDS_nullFunc2, NDS_nullFunc3, // NDS_3D_FogOffset
NDS_nullFunc4, NDS_nullFunc3, // NDS_3D_ClearDepth
NDS_nullFunc4, NDS_nullFunc3, // NDS_3D_MatrixMode
NDS_nullFunc3, NDS_nullFunc2, // NDS_3D_LoadIdentity
NDS_nullFunc3, NDS_nullFunc4, // NDS_3D_LoadMatrix4x4
NDS_nullFunc2, NDS_nullFunc4, // NDS_3D_LoadMatrix4x3
NDS_nullFunc4, NDS_nullFunc3, // NDS_3D_StoreMatrix
NDS_nullFunc4, NDS_nullFunc3, // NDS_3D_RestoreMatrix
NDS_nullFunc4, NDS_nullFunc2, // NDS_3D_PushMatrix
NDS_nullFunc4, NDS_nullFunc4, // NDS_3D_PopMatrix
NDS_nullFunc4, NDS_nullFunc4, // NDS_3D_Translate
NDS_nullFunc4, NDS_nullFunc4, // NDS_3D_Scale
NDS_nullFunc3, NDS_nullFunc4, // NDS_3D_MultMatrix3x3
NDS_nullFunc2, NDS_nullFunc4, // NDS_3D_MultMatrix4x3
NDS_nullFunc3, NDS_nullFunc4, // NDS_3D_MultMatrix4x4
NDS_nullFunc5, NDS_nullFunc3, // NDS_3D_Begin
NDS_nullFunc3, NDS_nullFunc2, // NDS_3D_End
NDS_nullFunc6, NDS_nullFunc3, // NDS_3D_Color3b
NDS_nullFunc3, NDS_nullFunc5, // NDS_3D_Vertex16b
NDS_nullFunc5, NDS_nullFunc3, // NDS_3D_Vertex10b
NDS_nullFunc7, NDS_nullFunc6, // NDS_3D_Vertex3_cord
NDS_nullFunc7, NDS_nullFunc3, // NDS_3D_Vertex_rel
NDS_nullFunc3, NDS_nullFunc5, // NDS_3D_SwapScreen
NDS_nullFunc3, NDS_nullFunc7, // NDS_3D_GetNumPolys
NDS_nullFunc3, NDS_nullFunc7, // NDS_3D_GetNumVertex
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_Flush
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_PolygonAttrib
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_Material0
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_Material1
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_Shininess
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_TexImage
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_TexPalette
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_TexCoord
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_LightDirection
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_LightColor
NDS_nullFunc3, NDS_nullFunc3, // NDS_3D_AlphaFunc
NDS_nullFunc3, // NDS_3D_Control
NDS_nullFunc3, // NDS_3D_Normal
NDS_nullFunc3, // NDS_3D_CallList
NDS_nullFunc8, NDS_nullFunc8, // NDS_3D_GetClipMatrix
NDS_nullFunc8, NDS_nullFunc8, // NDS_3D_GetDirectionalMatrix
NDS_nullFunc9, NDS_nullFunc9, // NDS_3D_GetLine
NDS_nullFunc10, // NDS_3D_GetMatrix NDS_nullFunc10, // NDS_3D_GetMatrix
NDS_nullFunc11, // NDS_glGetLightDirection NDS_nullFunc11, // NDS_glGetLightDirection
NDS_nullFunc11, // NDS_glGetLightColor NDS_nullFunc11, // NDS_glGetLightColor
NDS_nullFunc8, // NDS_3D_BoxTest
NDS_nullFunc8, // NDS_3D_PosTest
NDS_nullFunc9, // NDS_3D_VecTest
NDS_nullFunc8, // NDS_3D_GetPosRes
NDS_nullFunc8 // NDS_3D_GetVecRes
}; };
GPU3DInterface *gpu3D = &gpu3DNull; GPU3DInterface *gpu3D = &gpu3DNull;

View File

@ -38,6 +38,8 @@ enum DRIVER_3D
typedef struct GPU3DInterface typedef struct GPU3DInterface
{ {
char (CALL_CONVENTION* NDS_3D_Init) (void); char (CALL_CONVENTION* NDS_3D_Init) (void);
void (CALL_CONVENTION* NDS_3D_Reset) (void);
void (CALL_CONVENTION* NDS_3D_Close) (void);
void (CALL_CONVENTION* NDS_3D_ViewPort) (unsigned long v); void (CALL_CONVENTION* NDS_3D_ViewPort) (unsigned long v);
void (CALL_CONVENTION* NDS_3D_ClearColor) (unsigned long v); void (CALL_CONVENTION* NDS_3D_ClearColor) (unsigned long v);
void (CALL_CONVENTION* NDS_3D_FogColor) (unsigned long v); void (CALL_CONVENTION* NDS_3D_FogColor) (unsigned long v);
@ -116,6 +118,12 @@ typedef struct GPU3DInterface
// dest: pointer to the destination variable // dest: pointer to the destination variable
////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////
void (CALL_CONVENTION* NDS_glGetLightColor) (unsigned int index, unsigned int* dest); void (CALL_CONVENTION* NDS_glGetLightColor) (unsigned int index, unsigned int* dest);
void (CALL_CONVENTION* NDS_3D_BoxTest) (unsigned long v);
void (CALL_CONVENTION* NDS_3D_PosTest) (unsigned long v);
void (CALL_CONVENTION* NDS_3D_VecTest) (unsigned long v);
long (CALL_CONVENTION* NDS_3D_GetPosRes) (unsigned int index);
long (CALL_CONVENTION* NDS_3D_GetVecRes) (unsigned int index);
} GPU3DInterface; } GPU3DInterface;

View File

@ -398,7 +398,7 @@
PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;VERSION=\&quot;0.8.0b2 SSE2\&quot;;WIN32;HAVE_LIBZ;HAVE_LIBZZIP;SSE2;BETA_VERSION" PreprocessorDefinitions="_CRT_SECURE_NO_DEPRECATE;VERSION=\&quot;0.8.0b2 SSE2\&quot;;WIN32;HAVE_LIBZ;HAVE_LIBZZIP;SSE2;BETA_VERSION"
ExceptionHandling="0" ExceptionHandling="0"
BufferSecurityCheck="false" BufferSecurityCheck="false"
EnableEnhancedInstructionSet="0" EnableEnhancedInstructionSet="2"
WarningLevel="1" WarningLevel="1"
DebugInformationFormat="3" DebugInformationFormat="3"
CallingConvention="0" CallingConvention="0"
@ -985,6 +985,10 @@
RelativePath=".\oamView.h" RelativePath=".\oamView.h"
> >
</File> </File>
<File
RelativePath=".\OGLRender.h"
>
</File>
<File <File
RelativePath=".\palView.h" RelativePath=".\palView.h"
> >
@ -993,6 +997,10 @@
RelativePath="..\registers.h" RelativePath="..\registers.h"
> >
</File> </File>
<File
RelativePath="..\render3D.h"
>
</File>
<File <File
RelativePath=".\resource.h" RelativePath=".\resource.h"
> >

File diff suppressed because it is too large Load Diff

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@ -51,6 +51,8 @@ void OpenConsole()
srect.Bottom = srect.Top + 64; srect.Bottom = srect.Top + 64;
SetConsoleWindowInfo(GetStdHandle(STD_OUTPUT_HANDLE), TRUE, &srect); SetConsoleWindowInfo(GetStdHandle(STD_OUTPUT_HANDLE), TRUE, &srect);
hConsole = GetStdHandle(STD_OUTPUT_HANDLE); hConsole = GetStdHandle(STD_OUTPUT_HANDLE);
SetConsoleCP(GetACP());
SetConsoleOutputCP(GetACP());
printlog("DeSmuME v%s BETA\n",VERSION); printlog("DeSmuME v%s BETA\n",VERSION);
printlog("- compiled: %s %s\n\n",__DATE__,__TIME__); printlog("- compiled: %s %s\n\n",__DATE__,__TIME__);
} }
@ -62,22 +64,17 @@ void CloseConsole() {
hConsole = NULL; hConsole = NULL;
} }
void printlog(char *fmt, ...) { void printlog(char *fmt, ...)
{
va_list list; va_list list;
char msg[512],msg2[522]; char msg[512];
wchar_t msg3[522];
char *ptr;
DWORD tmp; DWORD tmp;
int len, s;
int i, j;
LPWSTR ret; memset(msg,0,512);
va_start(list,fmt); va_start(list,fmt);
_vsnprintf(msg,511,fmt,list); _vsnprintf(msg,511,fmt,list);
msg[511] = '\0';
va_end(list); va_end(list);
ptr=msg; len=strlen(msg); WriteConsole(hConsole,msg, (DWORD)strlen(msg), &tmp, 0);
WriteConsole(hConsole,ptr, (DWORD)len, &tmp, 0);
} }
#endif #endif