gpu: fix disp fifo capture and vram capture/display from same bank. i am beginning to rewrite the dispfifo logic so there may be some easy regressions to fix. fixes splinter cell.
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@ -21,6 +21,8 @@ Graphics:
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bug: fix 256B granularity sprite addressing for sub gpu
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bug: fix 128-wide captures
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bug: fix color overflow in capture blending
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bug: fix disp fifo capture
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bug: fix simultaneous vram display and capture via same bank
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bug: swrast: add clear image and scroll emulation
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bug: swrast: fixes to shadow rendering
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@ -53,7 +53,8 @@ GPU::MosaicLookup GPU::mosaicLookup;
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//#define DEBUG_TRI
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CACHE_ALIGN u8 GPU_screen[4*256*192];
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CACHE_ALIGN u8 *GPU_tempScanline;
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u8 *GPU_tempScanline;
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CACHE_ALIGN u16 GPU_tempScanlineBuffer[256];
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CACHE_ALIGN u8 sprWin[256];
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@ -2536,16 +2537,15 @@ template<bool SKIP> static void GPU_ligne_DispCapture(u16 l)
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//INFO("Capture source is SourceB\n");
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switch (gpu->dispCapCnt.srcB)
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{
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case 0: // Capture VRAM
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{
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//INFO("Capture VRAM\n");
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case 0:
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//Capture VRAM
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CAPCOPY(cap_src,cap_dst);
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}
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break;
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case 1: // Capture Main Memory Display FIFO
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{
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//INFO("Capture Main Memory Display FIFO\n");
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}
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case 1:
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//capture dispfifo
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//(not yet tested)
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for(int i=0; i < 128; i++)
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T1WriteLong(cap_dst, i << 2, DISP_FIFOrecv());
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break;
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}
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}
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@ -2566,13 +2566,19 @@ template<bool SKIP> static void GPU_ligne_DispCapture(u16 l)
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gfx3d_GetLineData(l, &srcA, NULL);
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}
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static u16 fifoLine[256];
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if (gpu->dispCapCnt.srcB == 0) // VRAM screen
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srcB = (u16 *)cap_src;
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else
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srcB = NULL; // DISP FIFOS
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if ((srcA) && (srcB))
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{
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//fifo - tested by splinter cell chaos theory thermal view
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srcB = fifoLine;
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for (int i=0; i < 128; i++)
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T1WriteLong((u8*)srcB, i << 2, DISP_FIFOrecv());
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}
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const int todo = (gpu->dispCapCnt.capx==DISPCAPCNT::_128?128:256);
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for(u16 i = 0; i < todo; i++)
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@ -2604,6 +2610,7 @@ template<bool SKIP> static void GPU_ligne_DispCapture(u16 l)
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g >>= 4;
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b >>= 4;
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//freedom wings sky will overflow while doing some fsaa/motionblur effect without this
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r = std::min((u16)31,r);
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g = std::min((u16)31,g);
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b = std::min((u16)31,b);
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@ -2611,7 +2618,6 @@ template<bool SKIP> static void GPU_ligne_DispCapture(u16 l)
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T2WriteWord(cap_dst, i << 1, a | (b << 10) | (g << 5) | r);
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}
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}
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}
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break;
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}
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}
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@ -2821,17 +2827,17 @@ void GPU_ligne(NDS_Screen * screen, u16 l, bool skip)
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gpu->setup_windows<0>();
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gpu->setup_windows<1>();
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//always generate the 2d+3d, no matter what we're displaying, since we may need to capture it
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//(if this seems inefficient in some cases, consider that the speed in those cases is not really a problem)
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//generate the 2d engine output
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if(gpu->dispMode == 1) {
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//optimization: render straight to the output buffer when thats what we are going to end up displaying anyway
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GPU_tempScanline = screen->gpu->currDst = (u8 *)(GPU_screen) + (screen->offset + l) * 512;
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GPU_ligne_layer(screen, l);
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if (gpu->core == GPU_MAIN)
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{
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GPU_ligne_DispCapture<false>(l);
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if (l == 191) { disp_fifo.head = disp_fifo.tail = 0; }
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} else {
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//otherwise, we need to go to a temp buffer
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GPU_tempScanline = screen->gpu->currDst = (u8 *)GPU_tempScanlineBuffer;
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}
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GPU_ligne_layer(screen, l);
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switch (gpu->dispMode)
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{
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case 0: // Display Off(Display white)
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@ -2847,7 +2853,7 @@ void GPU_ligne(NDS_Screen * screen, u16 l, bool skip)
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//do nothing: it has already been generated into the right place
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break;
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case 2: // Display framebuffer
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case 2: // Display vram framebuffer
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{
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u8 * dst = GPU_screen + (screen->offset + l) * 512;
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u8 * src = gpu->VRAMaddr + (l*512);
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@ -2856,6 +2862,8 @@ void GPU_ligne(NDS_Screen * screen, u16 l, bool skip)
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break;
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case 3: // Display memory FIFO
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{
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//this has not been tested since the dma timing for dispfifo was changed around the time of
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//newemuloop. it may not work.
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u8 * dst = GPU_screen + (screen->offset + l) * 512;
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for (int i=0; i < 128; i++)
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T1WriteLong(dst, i << 2, DISP_FIFOrecv() & 0x7FFF7FFF);
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@ -2863,6 +2871,17 @@ void GPU_ligne(NDS_Screen * screen, u16 l, bool skip)
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break;
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}
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//capture after displaying so that we can safely display vram before overwriting it here
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if (gpu->core == GPU_MAIN)
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{
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//BUG!!! if someone is capturing and displaying both from the fifo, then it will have been
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//consumed above by the display before we get here
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//(is that even legal? i think so)
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GPU_ligne_DispCapture<false>(l);
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if (l == 191) { disp_fifo.head = disp_fifo.tail = 0; }
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}
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GPU_ligne_MasterBrightness(screen, l);
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}
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@ -1090,15 +1090,12 @@ void FASTCALL MMU_doDMA(u32 num)
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taille = (MMU.DMACrt[PROCNUM][num]&0x1FFFFF);
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if(taille == 0) taille = 0x200000; //according to gbatek..
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//THIS IS A BIG HACK
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// If we are in "Main memory display" mode just copy an entire
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// screen (256x192 pixels).
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// Reference: http://nocash.emubase.de/gbatek.htm#dsvideocaptureandmainmemorydisplaymode
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// (under DISP_MMEM_FIFO)
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if ((MMU.DMAStartTime[PROCNUM][num]==EDMAMode_MemDisplay) && // Must be in main memory display mode
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(taille==4) && // Word must be 4
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(((MMU.DMACrt[PROCNUM][num]>>26)&1) == 1)) // Transfer mode must be 32bit wide
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taille = 24576; //256*192/2;
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//for main memory display fifo dmas, check for normal conditions and then dma all 128 bytes at once
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//(theyll get sent to the fifo, which can handle more than it ought to be able to)
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if ((MMU.DMAStartTime[PROCNUM][num]==EDMAMode_MemDisplay) &&
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(taille==4) &&
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(((MMU.DMACrt[PROCNUM][num]>>26)&1) == 1))
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taille = 128;
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if(MMU.DMAStartTime[PROCNUM][num] == EDMAMode_Card)
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taille *= 0x80;
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@ -1973,7 +1973,10 @@ static void execHardware_hstart()
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if(nds.VCount<192)
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{
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//this is hacky.
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//there is a corresponding hack in doDMA
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//there is a corresponding hack in doDMA.
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//it should be driven by a fifo (and generate just in time as the scanline is displayed)
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//but that isnt even possible until we have some sort of sub-scanline timing.
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//it may not be necessary.
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execHardware_doAllDma(EDMAMode_MemDisplay);
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}
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@ -345,7 +345,6 @@ struct Shader
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{
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mode = (polyattr>>4)&0x3;
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//if there is no texture set, then set to the mode which doesnt even use a texture
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//unless we're in shadow
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if(sampler.texFormat == 0 && mode != 3)
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mode = 4;
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}
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