-File needs to be redone as it's not as up to date as armcpu.cpp(It's not entirely in C yet either)
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cyberwarriorx
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435a82a144
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/* Copyright (C) 2006 yopyop
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yopyop156@ifrance.com
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yopyop156.ifrance.com
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This file is part of DeSmuME
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DeSmuME is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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DeSmuME is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with DeSmuME; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "ARM_CPU.hpp"
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#include "arm_instructions.hpp"
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#include "thumb_instructions.hpp"
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#include "MMU.hpp"
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#include "CP15.hpp"
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#include "bios.hpp"
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#include <stdlib.h>
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#define SWAP(a, b, c) c=a;\
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a=b;\
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b=c;
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armcpu_t *armcpu_new(u32 id)
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{
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armcpu_t *armcpu;
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armcpu = (armcpu_t*)malloc(sizeof(armcpu_t));
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if(!armcpu) return NULL;
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armcpu->proc_ID = id;
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if(id==0) armcpu->swi_tab = ARM9_swi_tab;
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else armcpu->swi_tab = ARM7_swi_tab;
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armcpu_init(armcpu, 0);
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return armcpu;
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}
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void armcpu_init(armcpu_t *armcpu, u32 adr)
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{
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armcpu->LDTBit = (armcpu->proc_ID==0); //Si ARM9 utiliser le syte v5 pour le load
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armcpu->intVector = 0xFFFF0000 * (armcpu->proc_ID==0);
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armcpu->waitIRQ = false;
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armcpu->wirq = false;
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if(armcpu->coproc[15]) delete armcpu->coproc[15];
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for(u32 i = 0; i < 15; ++i)
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{
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armcpu->R[i] = 0;
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armcpu->coproc[i] = NULL;
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}
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armcpu->CPSR.val = armcpu->SPSR.val = SYS;
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armcpu->R13_usr = armcpu->R14_usr = 0;
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armcpu->R13_svc = armcpu->R14_svc = 0;
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armcpu->R13_abt = armcpu->R14_abt = 0;
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armcpu->R13_und = armcpu->R14_und = 0;
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armcpu->R13_irq = armcpu->R14_irq = 0;
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armcpu->R8_fiq = armcpu->R9_fiq = armcpu->R10_fiq = armcpu->R11_fiq = armcpu->R12_fiq = armcpu->R13_fiq = armcpu->R14_fiq = 0;
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armcpu->SPSR_svc.val = armcpu->SPSR_abt.val = armcpu->SPSR_und.val = armcpu->SPSR_irq.val = armcpu->SPSR_fiq.val = 0;
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armcpu->next_instruction = adr;
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armcpu->R[15] = adr;
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armcpu->coproc[15] = new CP15(armcpu);
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armcpu_prefetch(armcpu);
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}
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u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode)
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{
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u32 oldmode = armcpu->CPSR.bits.mode;
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switch(oldmode)
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{
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case USR :
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case SYS :
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armcpu->R13_usr = armcpu->R[13];
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armcpu->R14_usr = armcpu->R[14];
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break;
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case FIQ :
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{
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u32 tmp;
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SWAP(armcpu->R[8], armcpu->R8_fiq, tmp);
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SWAP(armcpu->R[9], armcpu->R9_fiq, tmp);
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SWAP(armcpu->R[10], armcpu->R10_fiq, tmp);
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SWAP(armcpu->R[11], armcpu->R11_fiq, tmp);
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SWAP(armcpu->R[12], armcpu->R12_fiq, tmp);
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armcpu->R13_fiq = armcpu->R[13];
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armcpu->R14_fiq = armcpu->R[14];
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armcpu->SPSR_fiq = armcpu->SPSR;
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break;
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}
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case IRQ :
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armcpu->R13_irq = armcpu->R[13];
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armcpu->R14_irq = armcpu->R[14];
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armcpu->SPSR_irq = armcpu->SPSR;
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break;
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case SVC :
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armcpu->R13_svc = armcpu->R[13];
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armcpu->R14_svc = armcpu->R[14];
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armcpu->SPSR_svc = armcpu->SPSR;
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break;
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case ABT :
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armcpu->R13_abt = armcpu->R[13];
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armcpu->R14_abt = armcpu->R[14];
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armcpu->SPSR_abt = armcpu->SPSR;
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break;
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case UND :
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armcpu->R13_und = armcpu->R[13];
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armcpu->R14_und = armcpu->R[14];
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armcpu->SPSR_und = armcpu->SPSR;
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break;
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default :
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break;
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}
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switch(mode)
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{
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case USR :
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case SYS :
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armcpu->R[13] = armcpu->R13_usr;
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armcpu->R[14] = armcpu->R14_usr;
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//SPSR = CPSR;
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break;
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case FIQ :
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{
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u32 tmp;
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SWAP(armcpu->R[8], armcpu->R8_fiq, tmp);
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SWAP(armcpu->R[9], armcpu->R9_fiq, tmp);
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SWAP(armcpu->R[10], armcpu->R10_fiq, tmp);
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SWAP(armcpu->R[11], armcpu->R11_fiq, tmp);
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SWAP(armcpu->R[12], armcpu->R12_fiq, tmp);
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armcpu->R[13] = armcpu->R13_fiq;
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armcpu->R[14] = armcpu->R14_fiq;
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armcpu->SPSR = armcpu->SPSR_fiq;
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break;
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}
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case IRQ :
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armcpu->R[13] = armcpu->R13_irq;
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armcpu->R[14] = armcpu->R14_irq;
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armcpu->SPSR = armcpu->SPSR_irq;
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break;
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case SVC :
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armcpu->R[13] = armcpu->R13_svc;
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armcpu->R[14] = armcpu->R14_svc;
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armcpu->SPSR = armcpu->SPSR_svc;
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break;
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case ABT :
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armcpu->R[13] = armcpu->R13_abt;
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armcpu->R[14] = armcpu->R14_abt;
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armcpu->SPSR = armcpu->SPSR_abt;
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break;
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case UND :
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armcpu->R[13] = armcpu->R13_und;
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armcpu->R[14] = armcpu->R14_und;
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armcpu->SPSR = armcpu->SPSR_und;
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break;
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default :
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break;
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}
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armcpu->CPSR.bits.mode = mode & 0x1F;
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return oldmode;
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}
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