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Added Yabause's T1Memory functions and used them to replace pointer 

casts. It should fix endianess issues. (still a work in progress)
This commit is contained in:
yabause 2006-10-28 15:44:24 +00:00
parent 0712619eae
commit 3bfa3f6482
6 changed files with 175 additions and 93 deletions
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3
desmume/configure.ac
View File

@ -69,7 +69,8 @@ case $target in
;;
esac
AC_ARG_ENABLE(debug, AC_HELP_STRING(--enable-debug, enable debug information) , AC_DEFINE(DEBUG))
AC_ARG_ENABLE(debug, AC_HELP_STRING(--enable-debug, enable debug information),
AC_DEFINE(DEBUG))
AC_CONFIG_FILES([Makefile
src/Makefile

9
desmume/src/GPU.c
View File

@ -24,6 +24,7 @@
#include "GPU.h"
#include "debug.h"
#include "mem.h"
#include "nds/video.h"
@ -236,10 +237,10 @@ void GPU_setVideoProp(GPU * gpu, u32 p)
gpu->sprBMPBlock = 7;
}
GPU_setBGProp(gpu, 3, ((u16 *)ARM9Mem.ARM9_REG)[gpu->core*0x800+7]);
GPU_setBGProp(gpu, 2, ((u16 *)ARM9Mem.ARM9_REG)[gpu->core*0x800+6]);
GPU_setBGProp(gpu, 1, ((u16 *)ARM9Mem.ARM9_REG)[gpu->core*0x800+5]);
GPU_setBGProp(gpu, 0, ((u16 *)ARM9Mem.ARM9_REG)[gpu->core*0x800+4]);
GPU_setBGProp(gpu, 3, T1ReadWord(ARM9Mem.ARM9_REG, (gpu->core * 0x800 + 7) << 1));
GPU_setBGProp(gpu, 2, T1ReadWord(ARM9Mem.ARM9_REG, (gpu->core * 0x800 + 6) << 1));
GPU_setBGProp(gpu, 1, T1ReadWord(ARM9Mem.ARM9_REG, (gpu->core * 0x800 + 5) << 1));
GPU_setBGProp(gpu, 0, T1ReadWord(ARM9Mem.ARM9_REG, (gpu->core * 0x800 + 4) << 1));
if((p & DISPLAY_BG3_ACTIVE) && gpu->dispBG[3])
{

100
desmume/src/MMU.c
View File

@ -358,7 +358,7 @@ u16 FASTCALL MMU_read16(u32 proc, u32 adr)
if((proc == ARMCPU_ARM9) && ((adr & ~0x3FFF) == MMU.DTCMRegion))
{
/* Returns data from DTCM (ARM9 only) */
return ((u16 *)ARM9Mem.ARM9_DTCM)[(adr&0x3FFF)>>1];
return T1ReadWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF);
}
// CFlash reading, Mic
@ -430,7 +430,7 @@ u16 FASTCALL MMU_read16(u32 proc, u32 adr)
}
/* Returns data from memory */
return ((u16 *)(MMU.MMU_MEM[proc][(adr>>20)&0xFF]))[(adr&MMU.MMU_MASK[proc][(adr>>20)&0xFF])>>1];
return T1ReadWord(MMU.MMU_MEM[proc][(adr >> 20) & 0xFF], adr & MMU.MMU_MASK[proc][(adr >> 20) & 0xFF]);
}
u32 FASTCALL MMU_read32(u32 proc, u32 adr)
@ -466,18 +466,18 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr)
case 0x04100000 :
{
u16 IPCFIFO_CNT = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1];
u16 IPCFIFO_CNT = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184);
if(IPCFIFO_CNT&0x8000)
{
//execute = FALSE;
u32 fifonum = IPCFIFO+proc;
u32 val = FIFOValue(MMU.fifos + fifonum);
u32 remote = (proc+1) & 1;
u16 IPCFIFO_CNT_remote = ((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x184>>1];
u16 IPCFIFO_CNT_remote = T1ReadWord(MMU.MMU_MEM[remote][0x40], 0x184);
IPCFIFO_CNT |= (MMU.fifos[fifonum].empty<<8) | (MMU.fifos[fifonum].full<<9) | (MMU.fifos[fifonum].error<<14);
IPCFIFO_CNT_remote |= (MMU.fifos[fifonum].empty) | (MMU.fifos[fifonum].full<<1);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] = IPCFIFO_CNT;
((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x184>>1] = IPCFIFO_CNT_remote;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, IPCFIFO_CNT);
T1WriteWord(MMU.MMU_MEM[remote][0x40], 0x184, IPCFIFO_CNT_remote);
if(MMU.fifos[fifonum].empty)
MMU.reg_IF[proc] |= ((IPCFIFO_CNT & (1<<2))<<15);// & (MMU.reg_IME[proc]<<17);// & (MMU.reg_IE[proc] & (1<<17));//
return val;
@ -489,7 +489,7 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr)
case 0x04000108 :
case 0x0400010C :
{
u32 val = (((u16 *)(MMU.MMU_MEM[proc][0x40]))[((adr+2)&0xFFF)>>1]);
u32 val = T1ReadWord(MMU.MMU_MEM[proc][0x40], (adr + 2) & 0xFFF);
return MMU.timer[proc][(adr&0xF)>>2] | (val<<16);
}
case 0x04000640 : /* TODO (clear): again, ??? */
@ -522,7 +522,7 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr)
/* = 0x7f7fffff */
/* if needed, throw irq for the end of transfer */
if(MEM_16(MMU.MMU_MEM[proc], CARD_CR1) & CARD_CR1_IRQ)
if(T1ReadWord(MMU.MMU_MEM[proc][(CARD_CR1 >> 20) & 0xff], CARD_CR1 & 0xfff) & CARD_CR1_IRQ)
{
if(proc == ARMCPU_ARM7) NDS_makeARM7Int(IRQ_CARD);
else NDS_makeARM9Int(IRQ_CARD);
@ -718,7 +718,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
if((proc == ARMCPU_ARM9) && ((adr & ~0x3FFF) == MMU.DTCMRegion))
{
/* Writes in DTCM (ARM9 only) */
((u16 *)ARM9Mem.ARM9_DTCM)[(adr&0x3FFF)>>1] = val;
T1WriteWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val);
return;
}
@ -778,11 +778,11 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
SubScreen.offset = 0;
}
}
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x304>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x304, val);
return;
case CARD_CR1:
MEM_16(MMU.MMU_MEM[proc], CARD_CR1) = val;
T1WriteWord(MMU.MMU_MEM[proc][(CARD_CR1 >> 20) & 0xff], CARD_CR1 & 0xfff, val);
AUX_SPI_CNT = val;
if (val == 0)
@ -795,7 +795,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
AUX_SPI_CMD = val & 0xFF;
}
MEM_16(MMU.MMU_MEM[proc], CARD_EEPDATA) = bm_transfer(&MMU.bupmem, val); /* transfer data to backup memory chip and receive back */
T1WriteWord(MMU.MMU_MEM[proc][(CARD_EEPDATA >> 20) & 0xff], CARD_EEPDATA & 0xfff, bm_transfer(&MMU.bupmem, val));
return;
case REG_SPICNT :
@ -808,7 +808,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
mc_reset_com(&MMU.fw); /* reset fw device communication */
}
MEM_16(MMU.MMU_MEM[proc], REG_SPICNT) = val;
T1WriteWord(MMU.MMU_MEM[proc][(REG_SPICNT >> 20) & 0xff], REG_SPICNT & 0xfff, val);
return;
case REG_SPIDATA :
@ -819,7 +819,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
SPI_CMD = val;
}
u16 spicnt = MEM_16(MMU.MMU_MEM[proc], REG_SPICNT);
u16 spicnt = T1ReadWord(MMU.MMU_MEM[proc][(REG_SPICNT >> 20) & 0xff], REG_SPICNT & 0xfff);
switch(spicnt & 0x300)
{
@ -829,10 +829,10 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
case SPI_DEVICE_NVRAM : /* firmware memory device */
if(SPI_BAUD_MASK(spicnt) != SPI_BAUD_4MHz) /* check SPI baudrate (must be 4mhz) */
{
MEM_16(MMU.MMU_MEM[proc], REG_SPIDATA) = 0;
T1WriteWord(MMU.MMU_MEM[proc][(REG_SPIDATA >> 20) & 0xff], REG_SPIDATA & 0xfff, 0);
break;
}
MEM_16(MMU.MMU_MEM[proc], REG_SPIDATA) = fw_transfer(&MMU.fw, val); /* transfer data to fw chip and receive back */
T1WriteWord(MMU.MMU_MEM[proc][(REG_SPIDATA >> 20) & 0xff], REG_SPIDATA & 0xfff, fw_transfer(&MMU.fw, val));
return;
case SPI_DEVICE_TOUCH:
@ -899,7 +899,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
}
}
MEM_16(MMU.MMU_MEM[proc], REG_SPIDATA) = val;
T1WriteWord(MMU.MMU_MEM[proc][(REG_SPIDATA >> 20) & 0xff], REG_SPIDATA & 0xfff, val);
return;
/* NOTICE: Perhaps we have to use gbatek-like reg names instead of libnds-like ones ...*/
@ -1051,47 +1051,47 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
case BG0_CR :
GPULOG("MAIN BG0 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(MainScreen.gpu, 0, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x8>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x8, val);
return;
case BG1_CR :
GPULOG("MAIN BG1 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(MainScreen.gpu, 1, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xA>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xA, val);
return;
case BG2_CR :
GPULOG("MAIN BG2 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(MainScreen.gpu, 2, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xC>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xC, val);
return;
case BG3_CR :
GPULOG("MAIN BG3 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(MainScreen.gpu, 3, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xE>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xE, val);
return;
case SUB_BG0_CR :
GPULOG("SUB BG0 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(SubScreen.gpu, 0, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x1008>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x1008, val);
return;
case SUB_BG1_CR :
GPULOG("SUB BG1 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(SubScreen.gpu, 1, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x100A>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x100A, val);
return;
case SUB_BG2_CR :
GPULOG("SUB BG2 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(SubScreen.gpu, 2, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x100C>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x100C, val);
return;
case SUB_BG3_CR :
GPULOG("SUB BG3 SETPROP 16B %08X\r\n", val);
GPU_setBGProp(SubScreen.gpu, 3, val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x100E>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x100E, val);
return;
case REG_IME :
MMU.reg_IME[proc] = val&1;
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x208>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x208, val);
return;
case REG_IE :
@ -1114,9 +1114,9 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
case 0x04000180 :
{
u32 remote = (proc+1)&1;
u16 IPCSYNC_remote = ((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x180>>1];
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x180>>1] = (val&0xFFF0)|((IPCSYNC_remote>>8)&0xF);
((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x180>>1] = (IPCSYNC_remote&0xFFF0)|((val>>8)&0xF);
u16 IPCSYNC_remote = T1ReadWord(MMU.MMU_MEM[remote][0x40], 0x180);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x180, (val&0xFFF0)|((IPCSYNC_remote>>8)&0xF));
T1WriteWord(MMU.MMU_MEM[remote][0x40], 0x180, (IPCSYNC_remote&0xFFF0)|((val>>8)&0xF));
MMU.reg_IF[remote] |= ((IPCSYNC_remote & (1<<14))<<2) & ((val & (1<<13))<<3);// & (MMU.reg_IME[remote] << 16);// & (MMU.reg_IE[remote] & (1<<16));//
//execute = FALSE;
}
@ -1126,12 +1126,12 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
if(val & 0x4008)
{
FIFOInit(MMU.fifos + (IPCFIFO+((proc+1)&1)));
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] = (val & 0xBFF4) | 1;
((u16 *)(MMU.MMU_MEM[(proc+1)&1][0x40]))[0x184>>1] |= (1<<8);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, (val & 0xBFF4) | 1);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184) | 1);
MMU.reg_IF[proc] |= ((val & 4)<<15);// & (MMU.reg_IME[proc]<<17);// & (MMU.reg_IE[proc]&0x20000);//
return;
}
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] |= (val & 0xBFF4);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184) | (val & 0xBFF4));
}
return;
case 0x04000100 :
@ -1170,7 +1170,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
}
if(!(val & 0x80))
MMU.timerRUN[proc][((adr-2)>>2)&0x3] = FALSE;
((u16 *)(MMU.MMU_MEM[proc][0x40]))[(adr&0xFFF)>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], adr & 0xFFF, val);
return;
case 0x04000002 :
{
@ -1210,7 +1210,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
{
//if(val&0x8000) execute = FALSE;
//LOG("16 bit dma0 %04X\r\n", val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xBA>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xBA, val);
DMASrc[proc][0] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xB0>>2];
DMADst[proc][0] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xB4>>2];
u32 v = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xB8>>2];
@ -1230,7 +1230,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
{
//if(val&0x8000) execute = FALSE;
//LOG("16 bit dma1 %04X\r\n", val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xC6>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xC6, val);
DMASrc[proc][1] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xBC>>2];
DMADst[proc][1] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xC0>>2];
u32 v = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xC4>>2];
@ -1250,7 +1250,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
{
//if(val&0x8000) execute = FALSE;
//LOG("16 bit dma2 %04X\r\n", val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xD2>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xD2, val);
DMASrc[proc][2] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xC8>>2];
DMADst[proc][2] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xCC>>2];
u32 v = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xD0>>2];
@ -1270,7 +1270,7 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
{
//if(val&0x8000) execute = FALSE;
//LOG("16 bit dma3 %04X\r\n", val);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0xDE>>1] = val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0xDE, val);
DMASrc[proc][3] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xD4>>2];
DMADst[proc][3] = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xD8>>2];
u32 v = ((u32 *)(MMU.MMU_MEM[proc][0x40]))[0xDC>>2];
@ -1289,11 +1289,11 @@ void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val)
return;
//case 0x040001A0 : execute = FALSE;
default :
((u16 *)(MMU.MMU_MEM[proc][0x40]))[(adr&MMU.MMU_MASK[proc][(adr>>20)&0xFF])>>1]=val;
T1WriteWord(MMU.MMU_MEM[proc][0x40], adr&MMU.MMU_MASK[proc][(adr>>20)&0xFF], val);
return;
}
}
((u16 *)(MMU.MMU_MEM[proc][(adr>>20)&0xFF]))[(adr&MMU.MMU_MASK[proc][(adr>>20)&0xFF])>>1]=val;
T1WriteWord(MMU.MMU_MEM[proc][(adr>>20)&0xFF], adr&MMU.MMU_MASK[proc][(adr>>20)&0xFF], val);
}
u32 testval = 0;
@ -1627,7 +1627,7 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
case 0x04000298 :
{
((u32 *)(MMU.MMU_MEM[proc][0x40]))[0x298>>2] = val;
u16 cnt = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x280>>1];
u16 cnt = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x280);
s64 num = 0;
s64 den = 1;
s64 res;
@ -1682,7 +1682,7 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
case 0x0400029C :
{
((u32 *)(MMU.MMU_MEM[proc][0x40]))[0x29C>>2] = val;
u16 cnt = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x280>>1];
u16 cnt = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x280);
s64 num = 0;
s64 den = 1;
s64 res;
@ -1739,7 +1739,7 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
{
//execute = FALSE;
((u32 *)(MMU.MMU_MEM[proc][0x40]))[0x2B8>>2] = val;
u16 cnt = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x2B0>>1];
u16 cnt = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x2B0);
u64 v = 1;
switch(cnt&1)
{
@ -1760,7 +1760,7 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
case 0x040002BC :
{
((u32 *)(MMU.MMU_MEM[proc][0x40]))[0x2BC>>2] = val;
u16 cnt = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x2B0>>1];
u16 cnt = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x2B0);
u64 v = 1;
switch(cnt&1)
{
@ -1792,17 +1792,17 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
if(val & 0x4008)
{
FIFOInit(MMU.fifos + (IPCFIFO+((proc+1)&1)));
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] = (val & 0xBFF4) | 1;
((u16 *)(MMU.MMU_MEM[(proc+1)&1][0x40]))[0x184>>1] |= (1<<8);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, (val & 0xBFF4) | 1);
T1WriteWord(MMU.MMU_MEM[(proc+1)&1][0x40], 0x184, T1ReadWord(MMU.MMU_MEM[(proc+1)&1][0x40], 0x184) | 256);
MMU.reg_IF[proc] |= ((val & 4)<<15);// & (MMU.reg_IME[proc] << 17);// & (MMU.reg_IE[proc] & 0x20000);//
return;
}
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] = (val & 0xBFF4);
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, val & 0xBFF4);
//execute = FALSE;
return;
case 0x04000188 :
{
u16 IPCFIFO_CNT = ((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1];
u16 IPCFIFO_CNT = T1ReadWord(MMU.MMU_MEM[proc][0x40], 0x184);
if(IPCFIFO_CNT&0x8000)
{
//if(val==43) execute = FALSE;
@ -1810,10 +1810,10 @@ void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val)
u32 fifonum = IPCFIFO+remote;
FIFOAdd(MMU.fifos + fifonum, val);
IPCFIFO_CNT = (IPCFIFO_CNT & 0xFFFC) | (MMU.fifos[fifonum].full<<1);
u16 IPCFIFO_CNT_remote = ((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x184>>1];
u16 IPCFIFO_CNT_remote = T1ReadWord(MMU.MMU_MEM[remote][0x40], 0x184);
IPCFIFO_CNT_remote = (IPCFIFO_CNT_remote & 0xFCFF) | (MMU.fifos[fifonum].full<<10);
((u16 *)(MMU.MMU_MEM[proc][0x40]))[0x184>>1] = IPCFIFO_CNT;
((u16 *)(MMU.MMU_MEM[remote][0x40]))[0x184>>1] = IPCFIFO_CNT_remote;
T1WriteWord(MMU.MMU_MEM[proc][0x40], 0x184, IPCFIFO_CNT);
T1WriteWord(MMU.MMU_MEM[remote][0x40], 0x184, IPCFIFO_CNT_remote);
//((u32 *)(MMU.MMU_MEM[rote][0x40]))[0x214>>2] = (IPCFIFO_CNT_remote & (1<<10))<<8;
MMU.reg_IF[remote] |= ((IPCFIFO_CNT_remote & (1<<10))<<8);// & (MMU.reg_IME[remote] << 18);// & (MMU.reg_IE[remote] & 0x40000);//
//execute = FALSE;

2
desmume/src/MMU.h
View File

@ -37,12 +37,10 @@ extern char szRomPath[512];
/* theses macros are designed for reading/writing in memory (m is a pointer to memory, like MMU.MMU_MEM[proc], and a is an adress, like 0x04000000 */
#define MEM_8(m, a) (((u8*)(m[((a)>>20)&0xff]))[((a)&0xfff)])
#define MEM_16(m, a) (((u16*)(m[((a)>>20)&0xff]))[((a)&0xfff)>>1])
#define MEM_32(m, a) (((u32*)(m[((a)>>20)&0xff]))[((a)&0xfff)>>2])
/* theses ones for reading in rom data */
#define ROM_8(m, a) (((u8*)(m))[(a)])
#define ROM_16(m, a) (((u16*)(m))[(a)>>1])
#define ROM_32(m, a) (((u32*)(m))[(a)>>2])

74
desmume/src/NDSSystem.h
View File

@ -27,6 +27,8 @@
#include "GPU.h"
#include "mem.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -198,7 +200,7 @@ int NDS_LoadFirmware(const char *filename);
static INLINE void NDS_ARM9HBlankInt(void)
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1]&0x10)
if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0x10)
{
MMU.reg_IF[0] |= 2;// & (MMU.reg_IME[0] << 1);// (MMU.reg_IE[0] & (1<<1));
NDS_ARM9.wIRQ = TRUE;
@ -207,7 +209,7 @@ int NDS_LoadFirmware(const char *filename);
static INLINE void NDS_ARM7HBlankInt(void)
{
if(((u16 *)MMU.ARM7_REG)[0x0004>>1]&0x10)
if(T1ReadWord(MMU.ARM7_REG, 4) & 0x10)
{
MMU.reg_IF[1] |= 2;// & (MMU.reg_IME[1] << 1);// (MMU.reg_IE[1] & (1<<1));
NDS_ARM7.wIRQ = TRUE;
@ -216,7 +218,7 @@ int NDS_LoadFirmware(const char *filename);
static INLINE void NDS_ARM9VBlankInt(void)
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1]&0x8)
if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0x8)
{
MMU.reg_IF[0] |= 1;// & (MMU.reg_IME[0]);// (MMU.reg_IE[0] & 1);
NDS_ARM9.wIRQ = TRUE;
@ -227,7 +229,7 @@ int NDS_LoadFirmware(const char *filename);
static INLINE void NDS_ARM7VBlankInt(void)
{
if(((u16 *)MMU.ARM7_REG)[0x0004>>1]&0x8)
if(T1ReadWord(MMU.ARM7_REG, 4) & 0x8)
MMU.reg_IF[1] |= 1;// & (MMU.reg_IME[1]);// (MMU.reg_IE[1] & 1);
NDS_ARM7.wIRQ = TRUE;
//execute = FALSE;
@ -301,8 +303,8 @@ int NDS_LoadFirmware(const char *filename);
{
GPU_ligne(&MainScreen, nds.VCount);
GPU_ligne(&SubScreen, nds.VCount);
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] |= 2;
((u16 *)MMU.ARM7_REG)[0x0004>>1] |= 2;
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 2);
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 2);
NDS_ARM9HBlankInt();
NDS_ARM7HBlankInt();
if(MMU.DMAStartTime[0][0] == 2)
@ -320,8 +322,8 @@ int NDS_LoadFirmware(const char *filename);
{
++nds.VCount;
nds.nextHBlank += 4260;
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] &= 0xFFFD;
((u16 *)MMU.ARM7_REG)[0x0004>>1] &= 0xFFFD;
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFD);
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFD);
if(MMU.DMAStartTime[0][0] == 3)
MMU_doDMA(0, 0);
@ -335,8 +337,8 @@ int NDS_LoadFirmware(const char *filename);
nds.lignerendu = FALSE;
if(nds.VCount==193)
{
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] |= 1;
((u16 *)MMU.ARM7_REG)[0x0004>>1] |= 1;
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 1);
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 1);
NDS_ARM9VBlankInt();
NDS_ARM7VBlankInt();
@ -363,8 +365,8 @@ int NDS_LoadFirmware(const char *filename);
{
nds.nextHBlank = 3168;
nds.VCount = 0;
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] &= 0xFFFE;
((u16 *)MMU.ARM7_REG)[0x0004>>1] &= 0xFFFE;
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFE);
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFE);
nds.cycles -= (560190<<1);
nds.ARM9Cycle -= (560190<<1);
@ -405,28 +407,28 @@ int NDS_LoadFirmware(const char *filename);
MMU.DMACycle[1][3] -= (560190<<1);
}
((u16 *)ARM9Mem.ARM9_REG)[0x0006>>1] = nds.VCount;
((u16 *)MMU.ARM7_REG)[0x0006>>1] = nds.VCount;
T1WriteWord(ARM9Mem.ARM9_REG, 6, nds.VCount);
T1WriteWord(MMU.ARM7_REG, 6, nds.VCount);
u32 vmatch = ((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1];
u32 vmatch = T1ReadWord(ARM9Mem.ARM9_REG, 4);
if((nds.VCount==(vmatch>>8)|((vmatch<<1)&(1<<8))))
{
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] |= (1<<2);
if((((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1]&(1<<5)))
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) | 4);
if(T1ReadWord(ARM9Mem.ARM9_REG, 4) & 32)
NDS_makeARM9Int(2);
}
else
((u16 *)ARM9Mem.ARM9_REG)[0x0004>>1] &= 0xFFFB;
T1WriteWord(ARM9Mem.ARM9_REG, 4, T1ReadWord(ARM9Mem.ARM9_REG, 4) & 0xFFFB);
vmatch = ((u16 *)MMU.ARM7_REG)[0x0004>>1];
vmatch = T1ReadWord(MMU.ARM7_REG, 4);
if((nds.VCount==(vmatch>>8)|((vmatch<<1)&(1<<8))))
{
((u16 *)MMU.ARM7_REG)[0x0004>>1] |= (1<<2);
if((((u16 *)MMU.ARM7_REG)[0x0004>>1]&(1<<5)))
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) | 4);
if(T1ReadWord(MMU.ARM7_REG, 4) & 32)
NDS_makeARM7Int(2);
}
else
((u16 *)MMU.ARM7_REG)[0x0004>>1] &= 0xFFFB;
T1WriteWord(MMU.ARM7_REG, 4, T1ReadWord(MMU.ARM7_REG, 4) & 0xFFFB);
}
}
if(MMU.timerON[0][0])
@ -446,7 +448,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][0] = nds.old>MMU.timer[0][0];
if(nds.timerOver[0][0])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x102>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x102) & 0x40)
NDS_makeARM9Int(3);
MMU.timer[0][0] += MMU.timerReload[0][0];
}
@ -473,7 +475,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][1] = !MMU.timer[0][1];
if (nds.timerOver[0][1])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x106>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x106) & 0x40)
NDS_makeARM9Int(4);
}
}
@ -487,7 +489,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][1] = nds.old>MMU.timer[0][1];
if(nds.timerOver[0][1])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x106>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x106) & 0x40)
NDS_makeARM9Int(4);
MMU.timer[0][1] += MMU.timerReload[0][1];
}
@ -514,7 +516,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][2] = !MMU.timer[0][2];
if (nds.timerOver[0][2])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x10A>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x10A) & 0x40)
NDS_makeARM9Int(5);
}
}
@ -528,7 +530,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][2] = nds.old>MMU.timer[0][2];
if(nds.timerOver[0][2])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x10A>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x10A) & 0x40)
NDS_makeARM9Int(5);
MMU.timer[0][2] += MMU.timerReload[0][2];
}
@ -555,7 +557,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][3] = !MMU.timer[0][3];
if (nds.timerOver[0][3])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x10E>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x10E) & 0x40)
NDS_makeARM9Int(6);
}
}
@ -569,7 +571,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[0][3] = nds.old>MMU.timer[0][3];
if(nds.timerOver[0][3])
{
if(((u16 *)ARM9Mem.ARM9_REG)[0x10E>>1]&0x40)
if(T1ReadWord(ARM9Mem.ARM9_REG, 0x10E) & 0x40)
NDS_makeARM9Int(6);
MMU.timer[0][3] += MMU.timerReload[0][3];
}
@ -601,7 +603,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][0] = nds.old>MMU.timer[1][0];
if(nds.timerOver[1][0])
{
if(((u16 *)MMU.ARM7_REG)[0x102>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x102) & 0x40)
NDS_makeARM7Int(3);
MMU.timer[1][0] += MMU.timerReload[1][0];
}
@ -628,7 +630,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][1] = !MMU.timer[1][1];
if (nds.timerOver[1][1])
{
if(((u16 *)MMU.ARM7_REG)[0x106>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x106) & 0x40)
NDS_makeARM7Int(4);
}
}
@ -642,7 +644,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][1] = nds.old>MMU.timer[1][1];
if(nds.timerOver[1][1])
{
if(((u16 *)MMU.ARM7_REG)[0x106>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x106) & 0x40)
NDS_makeARM7Int(4);
MMU.timer[1][1] += MMU.timerReload[1][1];
}
@ -669,7 +671,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][2] = !MMU.timer[1][2];
if (nds.timerOver[1][2])
{
if(((u16 *)MMU.ARM7_REG)[0x10A>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x10A) & 0x40)
NDS_makeARM7Int(5);
}
}
@ -683,7 +685,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][2] = nds.old>MMU.timer[1][2];
if(nds.timerOver[1][2])
{
if(((u16 *)MMU.ARM7_REG)[0x10A>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x10A) & 0x40)
NDS_makeARM7Int(5);
MMU.timer[1][2] += MMU.timerReload[1][2];
}
@ -710,7 +712,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][3] = !MMU.timer[1][3];
if (nds.timerOver[1][3])
{
if(((u16 *)MMU.ARM7_REG)[0x10E>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x10E) & 0x40)
NDS_makeARM7Int(6);
}
}
@ -724,7 +726,7 @@ int NDS_LoadFirmware(const char *filename);
nds.timerOver[1][3] = nds.old>MMU.timer[1][3];
if(nds.timerOver[1][3])
{
if(((u16 *)MMU.ARM7_REG)[0x10E>>1]&0x40)
if(T1ReadWord(MMU.ARM7_REG, 0x10E) & 0x40)
NDS_makeARM7Int(6);
MMU.timer[1][3] += MMU.timerReload[1][3];
}

80
desmume/src/mem.h Normal file
View File

@ -0,0 +1,80 @@
/* Copyright 2005-2006 Guillaume Duhamel
Copyright 2005 Theo Berkau
This file is part of Yabause.
Yabause is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
Yabause is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Yabause; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef MEM_H
#define MEM_H
#include <stdlib.h>
#include "types.h"
/* Type 1 Memory, faster for byte (8 bits) accesses */
static INLINE u8 T1ReadByte(u8 * mem, u32 addr)
{
return mem[addr];
}
static INLINE u16 T1ReadWord(u8 * mem, u32 addr)
{
#ifdef WORDS_BIGENDIAN
return (mem[addr] << 8) | mem[addr + 1];
#else
return *((u16 *) (mem + addr));
#endif
}
static INLINE u32 T1ReadLong(u8 * mem, u32 addr)
{
#ifdef WORDS_BIGENDIAN
return (mem[addr] << 24 | mem[addr + 1] << 16 |
mem[addr + 2] << 8 | mem[addr + 3]);
#else
return *((u32 *) (mem + addr));
#endif
}
static INLINE void T1WriteByte(u8 * mem, u32 addr, u8 val)
{
mem[addr] = val;
}
static INLINE void T1WriteWord(u8 * mem, u32 addr, u16 val)
{
#ifdef WORDS_BIGENDIAN
mem[addr] = val >> 8;
mem[addr + 1] = val & 0xFF;
#else
*((u16 *) (mem + addr)) = val;
#endif
}
static INLINE void T1WriteLong(u8 * mem, u32 addr, u32 val)
{
#ifdef WORDS_BIGENDIAN
mem[addr] = val >> 24;
mem[addr + 1] = (val >> 16) & 0xFF;
mem[addr + 2] = (val >> 8) & 0xFF;
mem[addr + 3] = val & 0xFF;
#else
*((u32 *) (mem + addr)) = val;
#endif
}
#endif