FIFO.cpp: For AVX-512 built targets only, correct _DISP_FIFOrecv_LineOpaque32_vec() to require Tier-1 support instead of Tier-0.
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@ -409,7 +409,7 @@ void _DISP_FIFOrecv_LineOpaque16_vec(u32 *__restrict dst)
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template <NDSColorFormat OUTPUTFORMAT>
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void _DISP_FIFOrecv_LineOpaque32_vec(u32 *__restrict dst)
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{
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#if defined(ENABLE_AVX512_0)
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#if defined(ENABLE_AVX512_1)
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for (size_t i = 0, d = 0; i < GPU_FRAMEBUFFER_NATIVE_WIDTH * sizeof(u16) / sizeof(v512u16); i++, d+=2)
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{
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const v512u16 fifoColor = _mm512_load_si512((v512u16 *)(disp_fifo.buf + disp_fifo.head));
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