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reinstall the R4 device. its probably severely broken. need to rehabilitate it more.

This commit is contained in:
zeromus 2013-08-28 07:06:12 +00:00
parent e0d02ddda2
commit 2ddb2daf3c
6 changed files with 245 additions and 238 deletions
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6
desmume/src/MMU.cpp
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@ -1279,7 +1279,7 @@ bool DSI_TSC::load_state(EMUFILE* is)
return true; return true;
} }
static void FASTCALL MMU_endTransfer(u32 PROCNUM) void MMU_GC_endTransfer(u32 PROCNUM)
{ {
u32 val = T1ReadLong(MMU.MMU_MEM[0][0x40], 0x1A4) & 0x7F7FFFFF; u32 val = T1ReadLong(MMU.MMU_MEM[0][0x40], 0x1A4) & 0x7F7FFFFF;
T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4, val); T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4, val);
@ -1367,7 +1367,7 @@ void FASTCALL MMU_writeToGCControl(u32 val)
//if there was nothing to be done here, go ahead and flag it as done //if there was nothing to be done here, go ahead and flag it as done
if(card.transfer_count == 0) if(card.transfer_count == 0)
{ {
MMU_endTransfer(PROCNUM); MMU_GC_endTransfer(PROCNUM);
return; return;
} }
@ -1399,7 +1399,7 @@ u32 MMU_readFromGC()
//update transfer counter and complete the transfer if necessary //update transfer counter and complete the transfer if necessary
card.transfer_count -= 4; card.transfer_count -= 4;
if(!card.transfer_count) if(!card.transfer_count)
MMU_endTransfer(PROCNUM); MMU_GC_endTransfer(PROCNUM);
return val; return val;
} }

2
desmume/src/MMU.h
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@ -319,6 +319,8 @@ enum eCardMode : u32
//#define GCLOG(...) printf(__VA_ARGS__); //#define GCLOG(...) printf(__VA_ARGS__);
#define GCLOG(...) #define GCLOG(...)
void MMU_GC_endTransfer(u32 PROCNUM);
struct GC_Command struct GC_Command
{ {
u8 bytes[8]; u8 bytes[8];

467
desmume/src/addons/slot1_r4.cpp
View File

@ -1,231 +1,236 @@
///* /*
// Copyright (C) 2010-2013 DeSmuME team Copyright (C) 2010-2013 DeSmuME team
//
// This file is free software: you can redistribute it and/or modify This file is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 2 of the License, or the Free Software Foundation, either version 2 of the License, or
// (at your option) any later version. (at your option) any later version.
//
// This file is distributed in the hope that it will be useful, This file is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details. GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
// along with the this software. If not, see <http://www.gnu.org/licenses/>. along with the this software. If not, see <http://www.gnu.org/licenses/>.
//*/ */
//
//#include <time.h> #include <time.h>
//
//#include "../slot1.h" #include "../slot1.h"
//#include "../registers.h" #include "../registers.h"
//#include "../MMU.h" #include "../MMU.h"
//#include "../NDSSystem.h" #include "../NDSSystem.h"
//#include "../emufile.h" #include "../emufile.h"
// #include "slot1comp_protocol.h"
//class Slot1_R4 : public ISlot1Interface
//{ class Slot1_R4 : public ISlot1Interface, public ISlot1Comp_Protocol_Client
//private: {
// EMUFILE *img; private:
// u32 write_count; EMUFILE *img;
// u32 write_enabled; Slot1Comp_Protocol protocol;
// u32 write_count;
//public: u32 write_enabled;
// Slot1_R4()
// : img(NULL) public:
// , write_count(0) Slot1_R4()
// , write_enabled(0) : img(NULL)
// { , write_count(0)
// } , write_enabled(0)
// {
// virtual Slot1Info const* info() }
// {
// static Slot1InfoSimple info("R4","Slot1 R4 emulation"); virtual Slot1Info const* info()
// return &info; {
// } static Slot1InfoSimple info("R4","Slot1 R4 emulation");
// return &info;
// }
// //called once when the emulator starts up, or when the device springs into existence
// virtual bool init() //called once when the emulator starts up, or when the device springs into existence
// { virtual bool init()
// //strange to do this here but we need to make sure its done at some point {
// srand(time(NULL)); //strange to do this here but we need to make sure its done at some point
// return true; srand(time(NULL));
// } return true;
// }
// virtual void connect()
// { virtual void connect()
// img = slot1_GetFatImage(); {
// img = slot1_GetFatImage();
// if(!img)
// INFO("slot1 fat not successfully mounted\n"); if(!img)
// } INFO("slot1 fat not successfully mounted\n");
//
// //called when the emulator disconnects the device protocol.reset(this);
// virtual void disconnect() protocol.chipId = 0xFC2;
// { protocol.gameCode = T1ReadLong((u8*)gameInfo.header.gameCode,0);
// img = NULL; }
// }
// //called when the emulator disconnects the device
// //called when the emulator shuts down, or when the device disappears from existence virtual void disconnect()
// virtual void shutdown() {
// { img = NULL;
// } }
//
// //called when the emulator shuts down, or when the device disappears from existence
// virtual u32 read32(u8 PROCNUM, u32 adr) virtual void shutdown()
// { {
// switch(adr) }
// {
// case REG_GCDATAIN:
// return read32_GCDATAIN(); virtual void write_command(u8 PROCNUM, GC_Command command)
// default: {
// return 0; protocol.write_command(command);
// } }
// } virtual void write_GCDATAIN(u8 PROCNUM, u32 val)
// {
// protocol.write_GCDATAIN(PROCNUM, val);
// virtual void write32(u8 PROCNUM, u32 adr, u32 val) }
// { virtual u32 read_GCDATAIN(u8 PROCNUM)
// switch(adr) {
// { return protocol.read_GCDATAIN(PROCNUM);
// case REG_GCROMCTRL: }
// write32_GCROMCTRL(val);
// break; virtual void slot1client_startOperation(eSlot1Operation operation)
// case REG_GCDATAIN: {
// write32_GCDATAIN(val); if(operation != eSlot1Operation_Unknown)
// break; return;
// }
// } u32 address;
// int cmd = protocol.command.bytes[0];
//private: switch(cmd)
// {
// u32 read32_GCDATAIN() case 0xB0:
// { break;
// nds_dscard& card = MMU.dscard[0]; case 0xB9:
// case 0xBA:
// u32 val; address = (protocol.command.bytes[1] << 24) | (protocol.command.bytes[2] << 16) | (protocol.command.bytes[3] << 8) | protocol.command.bytes[4];
// img->fseek(address,SEEK_SET);
// switch(card.command[0]) break;
// { case 0xBB:
// //Get ROM chip ID write_enabled = 1;
// case 0x90: write_count = 0x80;
// case 0xB8: //passthrough on purpose?
// val = 0xFC2; case 0xBC:
// break; address = (protocol.command.bytes[1] << 24) | (protocol.command.bytes[2] << 16) | (protocol.command.bytes[3] << 8) | protocol.command.bytes[4];
// img->fseek(address,SEEK_SET);
// case 0xB0: break;
// val = 0x1F4; }
// break; }
// case 0xB9:
// val = (rand() % 100) ? 0x1F4 : 0; virtual u32 slot1client_read_GCDATAIN(eSlot1Operation operation)
// break; {
// case 0xBB: if(operation != eSlot1Operation_Unknown)
// case 0xBC: return 0;
// val = 0;
// break; u32 val;
// case 0xBA: int cmd = protocol.command.bytes[0];
// //INFO("Read from sd at sector %08X at adr %08X ",card.address/512,ftell(img)); switch(cmd)
// img->fread(&val, 4); {
// //INFO("val %08X\n",val); case 0xB0:
// break; val = 0x1F4;
// break;
// default: case 0xB9:
// val = 0; val = (rand() % 100) ? 0x1F4 : 0;
// } break;
// case 0xBB:
// /*INFO("READ CARD command: %02X%02X%02X%02X% 02X%02X%02X%02X RET: %08X ", case 0xBC:
// card.command[0], card.command[1], card.command[2], card.command[3], val = 0;
// card.command[4], card.command[5], card.command[6], card.command[7], break;
// val); case 0xBA:
// INFO("FROM: %08X LR: %08X\n", NDS_ARM9.instruct_adr, NDS_ARM9.R[14]);*/ //INFO("Read from sd at sector %08X at adr %08X ",card.address/512,ftell(img));
// img->fread(&val, 4);
// //INFO("val %08X\n",val);
// return val; break;
// } //read32_GCDATAIN default:
// val = 0;
// break;
// void write32_GCROMCTRL(u32 val) }
// {
// nds_dscard& card = MMU.dscard[0]; return val;
// }
// switch(card.command[0])
// { void slot1client_write_GCDATAIN(eSlot1Operation operation, u32 val)
// case 0xB0: {
// break; if(operation != eSlot1Operation_Unknown)
// case 0xB9: return;
// case 0xBA:
// card.address = (card.command[1] << 24) | (card.command[2] << 16) | (card.command[3] << 8) | card.command[4]; int cmd = protocol.command.bytes[0];
// img->fseek(card.address,SEEK_SET); switch(cmd)
// break; {
// case 0xBB: case 0xBB:
// write_enabled = 1; {
// write_count = 0x80; if(write_count && write_enabled)
// case 0xBC: {
// card.address = (card.command[1] << 24) | (card.command[2] << 16) | (card.command[3] << 8) | card.command[4]; img->fwrite(&val, 4);
// img->fseek(card.address,SEEK_SET); img->fflush();
// break; write_count--;
// } }
// } break;
// }
// void write32_GCDATAIN(u32 val) default:
// { break;
// nds_dscard& card = MMU.dscard[0]; }
// //bool log=false; }
//
// memcpy(&card.command[0], &MMU.MMU_MEM[0][0x40][0x1A8], 8); void write32_GCDATAIN(u32 val)
// {
// //last_write_count = write_count; //bool log = false;
// if(card.command[4])
// { //last_write_count = write_count;
// // transfer is done
// T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4,val & 0x7F7FFFFF); //can someone tell me ... what the hell is this doing, anyway?
// //seems odd to use card.command[4] for this... isnt it part of the address?
// // if needed, throw irq for the end of transfer if(protocol.command.bytes[4])
// if(MMU.AUX_SPI_CNT & 0x4000) {
// NDS_makeIrq(ARMCPU_ARM9, IRQ_BIT_GC_TRANSFER_COMPLETE); // transfer is done
// //are you SURE this is logical? there doesnt seem to be any way for the card to signal that
// return; T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4,val & 0x7F7FFFFF);
// }
// MMU_GC_endTransfer(0);
// switch(card.command[0])
// { return;
// case 0xBB: }
// {
// if(write_count && write_enabled) int cmd = protocol.command.bytes[0];
// { switch(cmd)
// img->fwrite(&val, 4); {
// img->fflush(); case 0xBB:
// write_count--; {
// } if(write_count && write_enabled)
// break; {
// } img->fwrite(&val, 4);
// default: img->fflush();
// break; write_count--;
// } }
// break;
// if(write_count==0) }
// { default:
// write_enabled = 0; break;
// }
// // transfer is done
// T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4,val & 0x7F7FFFFF); if(write_count==0)
// {
// // if needed, throw irq for the end of transfer write_enabled = 0;
// if(MMU.AUX_SPI_CNT & 0x4000)
// NDS_makeIrq(ARMCPU_ARM9, IRQ_BIT_GC_TRANSFER_COMPLETE); //transfer is done
// }
// //are you SURE this is logical? there doesnt seem to be any way for the card to signal that
// /*if(log) T1WriteLong(MMU.MMU_MEM[0][0x40], 0x1A4,val & 0x7F7FFFFF);
// {
// INFO("WRITE CARD command: %02X%02X%02X%02X%02X%02X%02X%02X\t", MMU_GC_endTransfer(0);
// card.command[0], card.command[1], card.command[2], card.command[3], }
// card.command[4], card.command[5], card.command[6], card.command[7]);
// INFO("FROM: %08X\t", NDS_ARM9.instruct_adr); /*if(log)
// INFO("VAL: %08X\n", val); {
// }*/ INFO("WRITE CARD command: %02X%02X%02X%02X%02X%02X%02X%02X\t",
// } card.command[0], card.command[1], card.command[2], card.command[3],
// card.command[4], card.command[5], card.command[6], card.command[7]);
//}; INFO("FROM: %08X\t", NDS_ARM9.instruct_adr);
// INFO("VAL: %08X\n", val);
//ISlot1Interface* construct_Slot1_R4() { return new Slot1_R4(); } }*/
}
};
ISlot1Interface* construct_Slot1_R4() { return new Slot1_R4(); }

2
desmume/src/addons/slot1_retail_mcrom.cpp
View File

@ -64,7 +64,6 @@ public:
{ {
protocol.write_command(command); protocol.write_command(command);
} }
virtual void write_GCDATAIN(u8 PROCNUM, u32 val) virtual void write_GCDATAIN(u8 PROCNUM, u32 val)
{ {
protocol.write_GCDATAIN(PROCNUM, val); protocol.write_GCDATAIN(PROCNUM, val);
@ -73,6 +72,7 @@ public:
{ {
return protocol.read_GCDATAIN(PROCNUM); return protocol.read_GCDATAIN(PROCNUM);
} }
virtual void slot1client_startOperation(eSlot1Operation operation) virtual void slot1client_startOperation(eSlot1Operation operation)
{ {
rom.start(operation,protocol.address); rom.start(operation,protocol.address);

4
desmume/src/addons/slot1comp_protocol.h
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@ -55,9 +55,9 @@ enum eSlot1Operation
class ISlot1Comp_Protocol_Client class ISlot1Comp_Protocol_Client
{ {
public: public:
virtual void slot1client_write_GCDATAIN(eSlot1Operation operation, u32 val) { }
virtual u32 slot1client_read_GCDATAIN(eSlot1Operation operation) = 0;
virtual void slot1client_startOperation(eSlot1Operation operation) {} virtual void slot1client_startOperation(eSlot1Operation operation) {}
virtual u32 slot1client_read_GCDATAIN(eSlot1Operation operation) = 0;
virtual void slot1client_write_GCDATAIN(eSlot1Operation operation, u32 val) {}
}; };

2
desmume/src/slot1.cpp
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@ -97,7 +97,7 @@ void slot1_Init()
extern TISlot1InterfaceConstructor construct_Slot1_Retail_MCROM; extern TISlot1InterfaceConstructor construct_Slot1_Retail_MCROM;
slot1_List[NDS_SLOT1_NONE] = construct_Slot1_None(); slot1_List[NDS_SLOT1_NONE] = construct_Slot1_None();
slot1_List[NDS_SLOT1_RETAIL_AUTO] = construct_Slot1_Retail_Auto(); slot1_List[NDS_SLOT1_RETAIL_AUTO] = construct_Slot1_Retail_Auto();
slot1_List[NDS_SLOT1_R4] = construct_Slot1_None(); //HACK!!! R4 IS BROKEN RIGHT NOW slot1_List[NDS_SLOT1_R4] = construct_Slot1_R4();
slot1_List[NDS_SLOT1_RETAIL_NAND] = construct_Slot1_Retail_NAND(); slot1_List[NDS_SLOT1_RETAIL_NAND] = construct_Slot1_Retail_NAND();
slot1_List[NDS_SLOT1_RETAIL_MCROM] = construct_Slot1_Retail_MCROM(); slot1_List[NDS_SLOT1_RETAIL_MCROM] = construct_Slot1_Retail_MCROM();
} }