Add support for page-aligned variables/arrays.
- Better account for UltraSPARC's unique memory page size. - malloc_alignedCacheLine() no longer returns 16-byte aligned memory if the architecture is neither 32-bit or 64-bit. Now, the function only returns 64-byte alignment for 64-bit architectures OR 32-byte alignment for 32-bit architectures.
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@ -1,5 +1,5 @@
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/*
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Copyright (C) 2008-2017 DeSmuME team
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Copyright (C) 2008-2023 DeSmuME team
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This file is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -105,22 +105,12 @@ void* malloc_aligned64(size_t length)
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void* malloc_alignedCacheLine(size_t length)
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{
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#if defined(HOST_32)
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return malloc_aligned32(length);
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#elif defined(HOST_64)
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return malloc_aligned64(length);
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#else
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return malloc_aligned16(length);
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#endif
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return malloc_aligned(length, CACHE_ALIGN_SIZE);
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}
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void* malloc_alignedPage(size_t length)
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{
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// WARNING!
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//
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// This may fail for SPARC users, which have a page size
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// of 8KB instead of the more typical 4KB.
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return malloc_aligned(length, 4096);
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return malloc_aligned(length, PAGE_ALIGN_SIZE);
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}
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void free_aligned(void *ptr)
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@ -1,6 +1,6 @@
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/*
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Copyright (C) 2005 Guillaume Duhamel
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Copyright (C) 2008-2022 DeSmuME team
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Copyright (C) 2008-2023 DeSmuME team
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This file is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -165,8 +165,15 @@
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#define CACHE_ALIGN_SIZE 32
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#endif
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#if defined(__sparc_v9__) || defined(__sparcv9)
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#define PAGE_ALIGN_SIZE 8192 // UltraSPARC architecture uses 8 KB pages.
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#else
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#define PAGE_ALIGN_SIZE 4096 // Most architectures use 4 KB pages.
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#endif
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//use this for example when you want a byte value to be better-aligned
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#define CACHE_ALIGN DS_ALIGN(CACHE_ALIGN_SIZE)
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#define PAGE_ALIGN DS_ALIGN(PAGE_ALIGN_SIZE)
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#define FAST_ALIGN DS_ALIGN(4)
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//---------------------------------------------
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