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Revert r2697 and r2698 because they slowdown things a lot for me and at least 

another user.
This commit is contained in:
riccardom 2009-08-02 16:39:47 +00:00
parent a10305e786
commit 28ff237695
2 changed files with 86 additions and 59 deletions
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131
desmume/src/FIFO.cpp
View File

@ -164,9 +164,7 @@ u16 FORCEINLINE GFX_FIFOgetSize()
void GFX_PIPEclear() void GFX_PIPEclear()
{ {
gxPIPE.head = 0;
gxPIPE.tail = 0; gxPIPE.tail = 0;
gxPIPE.size = 0;
} }
void GFX_FIFOclear() void GFX_FIFOclear()
@ -187,8 +185,6 @@ void GFX_FIFOsend(u8 cmd, u32 param)
if (gxFIFO.size == 0) // FIFO empty if (gxFIFO.size == 0) // FIFO empty
{ {
gxstat &= 0xF000FFFF;
gxstat |= 0x06000000;
if (gxPIPE.size < 4) // pipe not full if (gxPIPE.size < 4) // pipe not full
{ {
gxPIPE.cmd[gxPIPE.tail] = cmd; gxPIPE.cmd[gxPIPE.tail] = cmd;
@ -205,24 +201,22 @@ void GFX_FIFOsend(u8 cmd, u32 param)
} }
} }
gxstat &= 0xF000FFFF;
//INFO("GFX FIFO: Send GFX 3D cmd 0x%02X to FIFO - 0x%08X (%03i/%02X)\n", cmd, param, gxFIFO.tail, gxFIFO.tail); //INFO("GFX FIFO: Send GFX 3D cmd 0x%02X to FIFO - 0x%08X (%03i/%02X)\n", cmd, param, gxFIFO.tail, gxFIFO.tail);
if (gxFIFO.size > 255) // full if (gxstat & 0x01000000)
{ {
gxstat &= 0xF000FFFF;
gxstat |= 0x01000000;
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
//INFO("ERROR: gxFIFO is full (cmd 0x%02X = 0x%08X) (prev cmd 0x%02X = 0x%08X)\n", cmd, param, gxFIFO.cmd[255], gxFIFO.param[255]); //INFO("ERROR: gxFIFO is full (cmd 0x%02X = 0x%08X) (prev cmd 0x%02X = 0x%08X)\n", cmd, param, gxFIFO.cmd[255], gxFIFO.param[255]);
NDS_RescheduleGXFIFO(); return; // full
return;
} }
gxstat &= 0xF000FFFF;
gxFIFO.cmd[gxFIFO.tail] = cmd; gxFIFO.cmd[gxFIFO.tail] = cmd;
gxFIFO.param[gxFIFO.tail] = param; gxFIFO.param[gxFIFO.tail] = param;
gxFIFO.tail++; gxFIFO.tail++;
gxFIFO.size = GFX_FIFOgetSize(); gxFIFO.size = GFX_FIFOgetSize();
if (gxFIFO.tail > 256) gxFIFO.tail = 0; if (gxFIFO.tail > 256) gxFIFO.tail = 0;
#ifdef USE_GEOMETRY_FIFO_EMULATION #ifdef USE_GEOMETRY_FIFO_EMULATION
gxstat |= 0x08000000; // set busy flag gxstat |= 0x08000000; // set busy flag
#endif #endif
@ -244,12 +238,59 @@ void GFX_FIFOsend(u8 cmd, u32 param)
} }
extern void execHardware_doAllDma(EDMAMode modeNum); extern void execHardware_doAllDma(EDMAMode modeNum);
BOOL FORCEINLINE GFX_FIFOrecv(u8 *cmd, u32 *param)
{
u32 gxstat = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600);
if (gxFIFO.size == 0) // empty
{
gxstat &= 0xF000FFFF;
gxstat |= 0x06000000;
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
if ((gxstat & 0xC0000000)) // IRQ: empty
{
setIF(0, (1<<21));
}
return FALSE;
}
if (gxstat & 0x40000000) // IRQ: less half
{
if (gxstat & 0x02000000) setIF(0, (1<<21));
}
gxstat &= 0xF000FFFF;
*cmd = gxFIFO.cmd[gxFIFO.head];
*param = gxFIFO.param[gxFIFO.head];
gxFIFO.head++;
gxFIFO.size = GFX_FIFOgetSize();
if (gxFIFO.head > 256) gxFIFO.head = 0;
gxstat |= ((gxFIFO.size & 0x1FF) << 16);
if (gxFIFO.size < 128)
{
gxstat |= 0x02000000;
#ifdef USE_GEOMETRY_FIFO_EMULATION
execHardware_doAllDma(EDMAMode_GXFifo);
#endif
}
if (gxFIFO.tail == gxFIFO.head) // empty
gxstat |= 0x04000000;
else
gxstat |= 0x08000000; // set busy flag
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
return TRUE;
}
BOOL GFX_PIPErecv(u8 *cmd, u32 *param) BOOL GFX_PIPErecv(u8 *cmd, u32 *param)
{ {
u8 tmp_cmd = 0; u8 tmp_cmd = 0;
u32 tmp_param = 0; u32 tmp_param = 0;
u32 gxstat = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600); u32 gxstat = 0;
gxstat &= 0xF7FFFFFF; // clear busy flag
if (gxPIPE.size > 0) if (gxPIPE.size > 0)
{ {
@ -261,62 +302,39 @@ BOOL GFX_PIPErecv(u8 *cmd, u32 *param)
if (gxPIPE.size < 2) if (gxPIPE.size < 2)
{ {
if (gxFIFO.size > 0) if (GFX_FIFOrecv(&tmp_cmd, &tmp_param))
{ {
gxstat &= 0xF000FFFF; gxPIPE.cmd[gxPIPE.tail] = tmp_cmd;
gxPIPE.param[gxPIPE.tail] = tmp_param;
gxPIPE.cmd[gxPIPE.tail] = gxFIFO.cmd[gxFIFO.head];
gxPIPE.param[gxPIPE.tail] = gxFIFO.param[gxFIFO.head];
gxPIPE.tail++; gxPIPE.tail++;
gxPIPE.size = GFX_PIPEgetSize(); gxPIPE.size = GFX_PIPEgetSize();
if (gxPIPE.tail > 4) gxPIPE.tail = 0; if (gxPIPE.tail > 4) gxPIPE.tail = 0;
gxFIFO.head++; if (GFX_FIFOrecv(&tmp_cmd, &tmp_param))
gxFIFO.size = GFX_FIFOgetSize();
if (gxFIFO.head > 256) gxFIFO.head = 0;
if (gxFIFO.size > 0)
{ {
gxPIPE.cmd[gxPIPE.tail] = gxFIFO.cmd[gxFIFO.head]; gxPIPE.cmd[gxPIPE.tail] = tmp_cmd;
gxPIPE.param[gxPIPE.tail] = gxFIFO.param[gxFIFO.head]; gxPIPE.param[gxPIPE.tail] = tmp_param;
gxPIPE.tail++; gxPIPE.tail++;
gxPIPE.size = GFX_PIPEgetSize(); gxPIPE.size = GFX_PIPEgetSize();
if (gxPIPE.tail > 4) gxPIPE.tail = 0; if (gxPIPE.tail > 4) gxPIPE.tail = 0;
}
gxFIFO.head++; }
gxFIFO.size = GFX_FIFOgetSize();
if (gxFIFO.head > 256) gxFIFO.head = 0;
} }
gxstat |= ((gxFIFO.size & 0x1FF) << 16); if (gxPIPE.size == 0)
if (gxFIFO.size < 128)
{ {
gxstat |= 0x02000000; gxstat = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600);
execHardware_doAllDma(EDMAMode_GXFifo); gxstat &= 0xF7FFFFFF; // clear busy flag
if (gxstat & 0x40000000) // IRQ: less half
setIF(0, (1<<21));
}
if (gxFIFO.tail == gxFIFO.head) // empty
gxstat |= 0x04000000;
}
else // FIFO empty
{
gxstat &= 0xF000FFFF;
gxstat |= 0x06000000;
}
}
if (gxPIPE.size > 0)
gxstat |= 0x08000000; // set busy flag
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat); T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
}
return (TRUE); return (TRUE);
} }
gxstat = T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600);
if (gxstat & 0x80000000) // IRQ: empty gxstat &= 0xF7FFFFFF; // clear busy flag
setIF(0, (1<<21)); if ((gxstat & 0x80000000)) // IRQ: empty
{
if (gxFIFO.tail == 0) setIF(0, (1<<21));
}
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat); T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
return FALSE; return FALSE;
} }
@ -334,6 +352,11 @@ void GFX_FIFOcnt(u32 val)
T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat); T1WriteLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x600, gxstat);
NDS_RescheduleGXFIFO(); NDS_RescheduleGXFIFO();
/*if (gxstat & 0xC0000000)
{
setIF(0, (1<<21));
}*/
} }
// ========================================================= DISP FIFO // ========================================================= DISP FIFO

14
desmume/src/gfx3d.cpp
View File

@ -318,8 +318,6 @@ void gfx3d_reset()
memset(vertlists, 0, sizeof(vertlists)); memset(vertlists, 0, sizeof(vertlists));
listTwiddle = 1; listTwiddle = 1;
twiddleLists(); twiddleLists();
gfx3d.polylist = polylist;
gfx3d.vertlist = vertlist;
MatrixInit (mtxCurrent[0]); MatrixInit (mtxCurrent[0]);
MatrixInit (mtxCurrent[1]); MatrixInit (mtxCurrent[1]);
@ -1640,8 +1638,6 @@ void gfx3d_VBlankSignal()
{ {
gfx3d_doFlush(); gfx3d_doFlush();
isSwapBuffers = false; isSwapBuffers = false;
GFX_DELAY(392);
NDS_RescheduleGXFIFO();
} }
#else #else
//the 3d buffers are swapped when a vblank begins. //the 3d buffers are swapped when a vblank begins.
@ -1666,7 +1662,12 @@ void gfx3d_VBlankEndSignal(bool skipFrame)
if (!drawPending) return; if (!drawPending) return;
drawPending = FALSE; drawPending = FALSE;
if(skipFrame) return; if(skipFrame)
{
GFX_DELAY(392);
NDS_RescheduleGXFIFO();
return;
}
//if the null 3d core is chosen, then we need to clear out the 3d buffers to keep old data from being rendered //if the null 3d core is chosen, then we need to clear out the 3d buffers to keep old data from being rendered
if(gpu3D == &gpu3DNull || !CommonSettings.showGpu.main) if(gpu3D == &gpu3DNull || !CommonSettings.showGpu.main)
{ {
@ -1675,6 +1676,9 @@ void gfx3d_VBlankEndSignal(bool skipFrame)
} }
gpu3D->NDS_3D_Render(); gpu3D->NDS_3D_Render();
GFX_DELAY(392);
NDS_RescheduleGXFIFO();
#else #else
//if we are skipping 3d frames then the 3d rendering will get held up here. //if we are skipping 3d frames then the 3d rendering will get held up here.
//but, as soon as we quit skipping frames, the held-up 3d frame will render //but, as soon as we quit skipping frames, the held-up 3d frame will render