Proper ensata handshake on reconnection.
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@ -1835,30 +1835,39 @@ static void writereg_POWCNT1(const int size, const u32 adr, const u32 val)
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static INLINE void MMU_IPCSync(u8 proc, u32 val)
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static INLINE void MMU_IPCSync(u8 proc, u32 val)
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{
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{
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//INFO("IPC%s sync 0x%04X (0x%02X|%02X)\n", proc?"7":"9", val, val >> 8, val & 0xFF);
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u32 sync_l = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0x180) & 0xFFFF;
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u32 sync_l = T1ReadLong(MMU.MMU_MEM[proc][0x40], 0x180) & 0xFFFF;
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u32 sync_r = T1ReadLong(MMU.MMU_MEM[proc^1][0x40], 0x180) & 0xFFFF;
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u32 sync_r = T1ReadLong(MMU.MMU_MEM[proc^1][0x40], 0x180) & 0xFFFF;
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u32 iter = (val & 0x0F00) >> 8;
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sync_l = ( sync_l & 0x000F ) | ( val & 0x0F00 );
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sync_l = ( sync_l & 0x000F ) | ( val & 0x6F00 );
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sync_r = ( sync_r & 0x6F00 ) | ( (val >> 8) & 0x000F );
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sync_r = ( sync_r & 0x6F00 ) | ( iter );
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sync_l |= val & 0x6000;
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// For some reason, the arm9 doesn't handshake when ensata is detected.
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// So we complete the protocol here, which is to mirror the values 8..0 back to
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// The arm7 as they are written by the arm7
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if (nds.ensataEmulation) {
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if(nds.ensataEmulation && proc==1 && nds.ensataIpcSyncCounter<9) {
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if (proc) {
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u32 iteration = (val&0x0F00)>>8;
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// However this hack would break soft reset because it also syncs through ipcsync.
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// So we have to add some additional checks to ensure that it's handshake instead of reset.
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if(iteration==8-nds.ensataIpcSyncCounter)
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if ((iter & 8) || (nds.ensataIpcSyncCounter)) {
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nds.ensataIpcSyncCounter++;
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// sync_r = (sync_r & 0xF0FF) | (iter << 8); // This is not necessary.
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else printf("ERROR: ENSATA IPC SYNC HACK FAILED; BAD THINGS MAY HAPPEN\n");
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sync_l = (sync_l & 0xFFF0) | iter;
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nds.ensataIpcSyncCounter = iter;
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//for some reason, the arm9 doesn't handshake when ensata is detected.
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//so we complete the protocol here, which is to mirror the values 8..0 back to
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//the arm7 as they are written by the arm7
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sync_r &= 0xF0FF;
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sync_r |= (iteration<<8);
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sync_l &= 0xFFF0;
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sync_l |= iteration;
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}
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}
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}
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else {
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// After ensata handshake, arm9 will write 0x100 as a signal if Ensata is detected.
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// This will prevent reset from working, so we have to ignore this.
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if (nds.ensataHandshake == ENSATA_HANDSHAKE_complete) {
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nds.ensataHandshake = ENSATA_HANDSHAKE_none;
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return;
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}
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}
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}
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// printf("IPCSync(%d, %04x): %04x %04x %d\n", proc, val, sync_l, sync_r, nds.ensataIpcSyncCounter);
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0x180, sync_l);
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T1WriteLong(MMU.MMU_MEM[proc][0x40], 0x180, sync_l);
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T1WriteLong(MMU.MMU_MEM[proc^1][0x40], 0x180, sync_r);
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T1WriteLong(MMU.MMU_MEM[proc^1][0x40], 0x180, sync_r);
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@ -4969,7 +4978,7 @@ void FASTCALL _MMU_ARM9_write32(u32 adr, u32 val)
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//todo - these are usually write only regs (these and 1000 more)
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//todo - these are usually write only regs (these and 1000 more)
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//shouldnt we block them from getting written? ugh
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//shouldnt we block them from getting written? ugh
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case eng_3D_CLIPMTX_RESULT:
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case eng_3D_CLIPMTX_RESULT:
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if(nds.ensataEmulation && nds.ensataHandshake == ENSATA_HANDSHAKE_none && val==0x2468ace0)
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if(nds.ensataEmulation /* && nds.ensataHandshake == ENSATA_HANDSHAKE_none */&& val==0x2468ace0)
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{
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{
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printf("ENSATA HANDSHAKE BEGIN\n");
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printf("ENSATA HANDSHAKE BEGIN\n");
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nds.ensataHandshake = ENSATA_HANDSHAKE_query;
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nds.ensataHandshake = ENSATA_HANDSHAKE_query;
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