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MMU_writeXX : solved some issue because of address alignment 

sound working now
to use the previous MMU_write functions set  #define USE_OLD to 1
(it is enabled now)
This commit is contained in:
damdoum 2007-02-16 16:22:02 +00:00
parent 1c937b81e4
commit 18b2b6ebc4
1 changed files with 28 additions and 20 deletions
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48
desmume/src/MMU.c
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@ -3751,7 +3751,7 @@ typedef union {
void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) { void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) {
u32 adr_u8_1 = adr & 0xFFFFFFFC; u32 adr_u8_1 = adr & 0x0FFFFFFE;
u32 adr_u8_2 = adr_u8_1 + 1; u32 adr_u8_2 = adr_u8_1 + 1;
u32 adr_u8_3 = adr_u8_1 + 2; u32 adr_u8_3 = adr_u8_1 + 2;
u32 adr_u8_4 = adr_u8_1 + 3; u32 adr_u8_4 = adr_u8_1 + 3;
@ -3768,8 +3768,20 @@ void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) {
#define val_u8_3 val_union.bytes.byte3 #define val_u8_3 val_union.bytes.byte3
#define val_u8_4 val_union.bytes.byte4 #define val_u8_4 val_union.bytes.byte4
if ((proc == ARMCPU_ARM9) && (adr & ~0x3FFF) == MMU.DTCMRegion)
{
/* Writes data in DTCM (ARM9 only) */
switch (nbbytes) {
case 1: ARM9Mem.ARM9_DTCM[adr&0x3FFF] = val; break;
case 2: T1WriteWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); break;
case 4: T1WriteLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); break;
}
return ;
}
// CFlash writing, Mic // CFlash writing, Mic
if ((adr>=0x08800000)&&(adr<0x09900000)) { // if ((adr>=0x08800000)&&(adr<0x09900000)) {
if ((adr>=0x09000000)&&(adr<0x09900000)) {
cflash_write(adr,val); cflash_write(adr,val);
return; return;
} }
@ -3784,9 +3796,18 @@ void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) {
if (proc == ARMCPU_ARM7) { if (proc == ARMCPU_ARM7) {
// This is bad, remove it // This is bad, remove it
if ((adr>=0x04000400)&&(adr<0x0400051D)) if ((adr>=0x04000400)&&(adr<0x0400051D)) {
{ switch (nbbytes) {
SPU_WriteByte(adr, val); case 1:
SPU_WriteByte(adr, val);
break;
case 2:
SPU_WriteWord(adr, val);
break;
case 4:
SPU_WriteLong(adr, val);
break;
}
return; return;
} }
@ -3801,19 +3822,8 @@ void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) {
#else #else
return; return;
#endif #endif
} else
if (/*(proc == ARMCPU_ARM9) &&*/ (adr & ~0x3FFF) == MMU.DTCMRegion)
{
/* Writes data in DTCM (ARM9 only) */
switch (nbbytes) {
case 1: ARM9Mem.ARM9_DTCM[adr&0x3FFF] = val; break;
case 2: T1WriteWord(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); break;
case 4: T1WriteLong(ARM9Mem.ARM9_DTCM, adr & 0x3FFF, val); break;
}
return ;
} }
adr &= 0x0FFFFFFF; adr &= 0x0FFFFFFF;
@ -3832,9 +3842,7 @@ void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes) {
val_union.word = T1ReadLong(MMU.MMU_MEM[proc][MEM_REGION], val_union.word = T1ReadLong(MMU.MMU_MEM[proc][MEM_REGION],
adr_u32&MMU.MMU_MASK[proc][MEM_REGION]); adr_u32&MMU.MMU_MASK[proc][MEM_REGION]);
switch (adr_u32 & REG_REGION_MASK) {
// which region
switch (adr & REG_REGION_MASK) {
case REG_BASE_DISPx: case REG_BASE_DISPx:
//if (proc == ARMCPU_ARM9) //if (proc == ARMCPU_ARM9)
{ {