fix another bmp sprite issue and add some mmu diagnostics
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47ab70f48e
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0e88f49326
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@ -2224,12 +2224,9 @@ void GPU::_spriteRender(u8 * dst, u8 * dst_alpha, u8 * typeTab, u8 * prioTab)
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if (auxX >= 0 && auxY >= 0 && auxX < sprSize.x && auxY < sprSize.y)
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{
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if(MODE == SPRITE_2D)
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//tested by buffy sacrifice damage blood splatters in corner
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offset = auxX + (auxY*sprSize.x);
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else
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//NOT TESTED
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offset = (auxX) + (auxY<<5);
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//if(MODE == SPRITE_2D) //tested by buffy sacrifice damage blood splatters in corner
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//else //tested by lego indiana jones
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offset = auxX + (auxY*sprSize.x);
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colour = T1ReadWord (src, offset<<1);
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@ -28,6 +28,7 @@
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#include <math.h>
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#include <string.h>
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#include <assert.h>
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#include <sstream>
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#include "common.h"
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#include "debug.h"
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@ -438,6 +439,54 @@ void DMAtoVRAMmapping()
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#define LOG_VRAM_ERROR() LOG("No data for block %i MST %i\n", block, VRAMBankCnt & 0x07);
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struct VramConfiguration {
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enum Purpose {
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OFF, INVALID, ABG, BBG, AOBJ, BOBJ, LCDC, ARM7, TEX, TEXPAL, ABGEXTPAL, BBGEXTPAL, AOBJEXTPAL, BOBJEXTPAL
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};
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struct BankInfo {
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Purpose purpose;
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int ofs;
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} banks[VRAM_BANKS];
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void clear() {
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for(int i=0;i<VRAM_BANKS;i++) {
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banks[i].ofs = 0;
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banks[i].purpose = OFF;
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}
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}
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std::string describePurpose(Purpose p) {
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switch(p) {
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case INVALID: return "INVALID";
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case ERROR: return "ERROR";
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case ABG: return "ABG";
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case BBG: return "BBG";
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case AOBJ: return "AOBJ";
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case BOBJ: return "BOBJ";
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case LCDC: return "LCDC";
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case ARM7: return "ARM7";
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case TEX: return "TEX";
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case TEXPAL: return "TEXPAL";
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case ABGEXTPAL: return "ABGEXTPAL";
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case BBGEXTPAL: return "BBGEXTPAL";
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case AOBJEXTPAL: return "AOBJEXTPAL";
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case BOBJEXTPAL: return "BOBJEXTPAL";
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}
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}
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std::string describe() {
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std::stringstream ret;
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for(int i=0;i<VRAM_BANKS;i++) {
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ret << (char)(i+'A') << ": " << banks[0].ofs << " " << describePurpose(banks[i].purpose) << std::endl;
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}
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return ret.str();
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}
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} vramConfiguration;
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//maps the specified bank to LCDC
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static inline void MMU_vram_lcdc(const int bank)
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{
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@ -486,13 +535,16 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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switch(mst)
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{
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //ABG
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_ABG+ofs*8);
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break;
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case 2: //AOBJ
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vramConfiguration.banks[bank].purpose = VramConfiguration::AOBJ;
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switch(ofs) {
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case 0:
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case 1:
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@ -504,6 +556,7 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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}
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break;
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case 3: //texture
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vramConfiguration.banks[bank].purpose = VramConfiguration::TEX;
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ARM9Mem.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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break;
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}
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@ -516,13 +569,16 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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switch(mst)
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{
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //ABG
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_ABG+ofs*8);
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break;
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case 2: //arm7
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vramConfiguration.banks[bank].purpose = VramConfiguration::ARM7;
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if(bank == 2) T1WriteByte(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x240, T1ReadByte(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x240) | 2);
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if(bank == 3) T1WriteByte(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x240, T1ReadByte(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x240) | 1);
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switch(ofs) {
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@ -536,14 +592,18 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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break;
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case 3: //texture
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vramConfiguration.banks[bank].purpose = VramConfiguration::TEX;
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ARM9Mem.texInfo.textureSlotAddr[ofs] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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break;
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case 4: //BGB or BOBJ
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MMU_vram_lcdc(bank);
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if(bank == VRAM_BANK_C)
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if(bank == VRAM_BANK_C) {
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vramConfiguration.banks[bank].purpose = VramConfiguration::BBG;
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MMU_vram_arm9(bank,VRAM_PAGE_BBG); //BBG
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else
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} else {
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vramConfiguration.banks[bank].purpose = VramConfiguration::BOBJ;
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MMU_vram_arm9(bank,VRAM_PAGE_BOBJ); //BOBJ
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}
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break;
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default: goto unsupported_mst;
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}
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@ -553,23 +613,28 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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mst = VRAMBankCnt & 7;
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switch(mst) {
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //ABG
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_ABG);
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break;
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case 2: //AOBJ
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MMU_vram_lcdc(bank);
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vramConfiguration.banks[bank].purpose = VramConfiguration::AOBJ;
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MMU_vram_arm9(bank,VRAM_PAGE_AOBJ);
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break;
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case 3: //texture palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::TEXPAL;
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ARM9Mem.texInfo.texPalSlot[0] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.texInfo.texPalSlot[1] = MMU_vram_physical(vram_bank_info[bank].page_addr+1);
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ARM9Mem.texInfo.texPalSlot[2] = MMU_vram_physical(vram_bank_info[bank].page_addr+2);
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ARM9Mem.texInfo.texPalSlot[3] = MMU_vram_physical(vram_bank_info[bank].page_addr+3);
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break;
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case 4: //A BG extended palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABGEXTPAL;
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ARM9Mem.ExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.ExtPal[0][1] = ARM9Mem.ExtPal[0][0] + ADDRESS_STEP_8KB;
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ARM9Mem.ExtPal[0][2] = ARM9Mem.ExtPal[0][1] + ADDRESS_STEP_8KB;
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@ -588,34 +653,41 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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switch(mst)
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{
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //ABG
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_ABG+pageofs);
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MMU_vram_arm9(bank,VRAM_PAGE_ABG+pageofs+2); //unexpected mirroring (required by spyro eternal night)
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break;
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case 2: //AOBJ
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vramConfiguration.banks[bank].purpose = VramConfiguration::AOBJ;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_AOBJ+pageofs);
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MMU_vram_arm9(bank,VRAM_PAGE_AOBJ+pageofs+2); //unexpected mirroring - I have no proof, but it is inferred from the ABG above
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break;
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case 3: //texture palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::TEXPAL;
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ARM9Mem.texInfo.texPalSlot[pageofs] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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break;
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case 4: //A BG extended palette
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switch(ofs) {
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case 0:
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case 1:
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vramConfiguration.banks[bank].purpose = VramConfiguration::ABG;
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ARM9Mem.ExtPal[0][ofs*2] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.ExtPal[0][ofs*2+1] = ARM9Mem.ExtPal[0][ofs*2] + ADDRESS_STEP_8KB;
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break;
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default:
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vramConfiguration.banks[bank].purpose = VramConfiguration::INVALID;
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PROGINFO("Unsupported ofs setting %d for engine A bgextpal vram bank %c\n", ofs, 'A'+bank);
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break;
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}
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break;
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case 5: //A OBJ extended palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::AOBJ;
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ARM9Mem.ObjExtPal[0][0] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.ObjExtPal[0][1] = ARM9Mem.ObjExtPal[0][1] + ADDRESS_STEP_8KB;
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break;
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@ -629,14 +701,17 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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switch(mst)
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{
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //BBG
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vramConfiguration.banks[bank].purpose = VramConfiguration::BBG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_BBG);
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MMU_vram_arm9(bank,VRAM_PAGE_BBG + 4); //unexpected mirroring
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break;
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case 2: //B BG extended palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::BBGEXTPAL;
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ARM9Mem.ExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.ExtPal[1][1] = ARM9Mem.ExtPal[1][0] + ADDRESS_STEP_8KB;
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ARM9Mem.ExtPal[1][2] = ARM9Mem.ExtPal[1][1] + ADDRESS_STEP_8KB;
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@ -651,18 +726,22 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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switch(mst)
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{
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case 0: //LCDC
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vramConfiguration.banks[bank].purpose = VramConfiguration::LCDC;
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MMU_vram_lcdc(bank);
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break;
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case 1: //BBG
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vramConfiguration.banks[bank].purpose = VramConfiguration::BBG;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_BBG+2);
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MMU_vram_arm9(bank,VRAM_PAGE_BBG+3); //unexpected mirroring
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break;
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case 2: //BOBJ
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vramConfiguration.banks[bank].purpose = VramConfiguration::BOBJ;
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MMU_vram_lcdc(bank);
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MMU_vram_arm9(bank,VRAM_PAGE_BOBJ);
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break;
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case 3: //B OBJ extended palette
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vramConfiguration.banks[bank].purpose = VramConfiguration::BOBJEXTPAL;
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ARM9Mem.ObjExtPal[1][0] = MMU_vram_physical(vram_bank_info[bank].page_addr);
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ARM9Mem.ObjExtPal[1][1] = ARM9Mem.ObjExtPal[1][1] + ADDRESS_STEP_8KB;
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break;
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@ -672,14 +751,19 @@ static inline void MMU_VRAMmapRefreshBank(const int bank)
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} //switch(bank)
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vramConfiguration.banks[bank].ofs = ofs;
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return;
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unsupported_mst:
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vramConfiguration.banks[bank].purpose = VramConfiguration::INVALID;
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PROGINFO("Unsupported mst setting %d for vram bank %c\n", mst, 'A'+bank);
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}
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void MMU_VRAM_unmap_all()
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{
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vramConfiguration.clear();
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vram_arm7_map[0] = VRAM_PAGE_UNMAPPED;
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vram_arm7_map[1] = VRAM_PAGE_UNMAPPED;
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@ -731,6 +815,8 @@ static inline void MMU_VRAMmapControl(u8 block, u8 VRAMBankCnt)
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for(int i=0;i<VRAM_BANKS;i++)
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MMU_VRAMmapRefreshBank(i);
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//printf(vramConfiguration.describe().c_str());
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//if texInfo changed, trigger notifications
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if(memcmp(&oldTexInfo,&ARM9Mem.texInfo,sizeof(ARM9_struct::TextureInfo)))
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{
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