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core: emulate dma access to TCM by reading 0 and discarding writes. also fix a bug in the newer (extremely verbose) instruction logging

This commit is contained in:
zeromus 2009-07-03 09:52:32 +00:00
parent fb1bde8d41
commit 04af01a1ef
3 changed files with 66 additions and 14 deletions
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16
desmume/src/MMU.cpp
View File

@ -1198,28 +1198,34 @@ void FASTCALL MMU_doDMA(u32 num)
return;
}
//if these do not use MMU_AT_DMA and the corresponding code in the read/write routines,
//then danny phantom title screen will be filled with a garbage char which is made by
//dmaing from 0x00000000 to 0x06000000
if ((MMU.DMACrt[PROCNUM][num]>>26)&1)
for(; i < taille; ++i)
{
_MMU_write32<PROCNUM>(dst, _MMU_read32<PROCNUM>(src));
_MMU_write32<PROCNUM,MMU_AT_DMA>(dst, _MMU_read32<PROCNUM,MMU_AT_DMA>(src));
dst += dstinc;
src += srcinc;
}
else
for(; i < taille; ++i)
{
_MMU_write16<PROCNUM>(dst, _MMU_read16<PROCNUM>(src));
_MMU_write16<PROCNUM,MMU_AT_DMA>(dst, _MMU_read16<PROCNUM,MMU_AT_DMA>(src));
dst += dstinc;
src += srcinc;
}
//this is necessary for repeating DMA such as to scroll registers for NSMB level backdrop scrolling effect
//#if 0
//write back the addresses
DMASrc[PROCNUM][num] = src;
if((u & 0x3)!=3) //but dont write back dst if we were supposed to reload
DMADst[PROCNUM][num] = dst;
//#endif
//this is probably not the best place to do it, but the dma code in ndssystem is so bad i didnt want to touch it
//until it all gets rewritten. so this is here as a reminder, at least.
//(there is no proof for this code, but it is reasonable)
T1WriteLong(MMU.MMU_MEM[PROCNUM][0x40], 0xB0+12*num, DMASrc[PROCNUM][num]);
T1WriteLong(MMU.MMU_MEM[PROCNUM][0x40], 0xB4+12*num, DMADst[PROCNUM][num]);
}
}

60
desmume/src/MMU.h
View File

@ -222,7 +222,7 @@ FORCEINLINE void* MMU_gpu_map(u32 vram_addr)
enum MMU_ACCESS_TYPE
{
MMU_AT_CODE, MMU_AT_DATA, MMU_AT_GPU
MMU_AT_CODE, MMU_AT_DATA, MMU_AT_GPU, MMU_AT_DMA
};
template<int PROCNUM, MMU_ACCESS_TYPE AT> u8 _MMU_read08(u32 addr);
@ -265,7 +265,15 @@ inline void SetupMMU(bool debugConsole) {
//T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][(adr >> 20) & 0xFF],
// adr & MMU.MMU_MASK[ARMCPU_ARM7][(adr >> 20) & 0xFF]);
FORCEINLINE u8 _MMU_read08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) {
FORCEINLINE u8 _MMU_read08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr)
{
//special handling for DMA: read 0 from TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return 0; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return 0; //dtcm
}
if(PROCNUM==ARMCPU_ARM9)
if((addr&(~0x3FFF)) == MMU.DTCMRegion)
{
@ -280,7 +288,14 @@ FORCEINLINE u8 _MMU_read08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u3
else return _MMU_ARM7_read08(addr);
}
FORCEINLINE u16 _MMU_read16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) {
FORCEINLINE u16 _MMU_read16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr)
{
//special handling for DMA: read 0 from TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return 0; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return 0; //dtcm
}
//special handling for execution from arm9, since we spend so much time in there
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE)
@ -309,7 +324,14 @@ dunno:
else return _MMU_ARM7_read16(addr);
}
FORCEINLINE u32 _MMU_read32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr) {
FORCEINLINE u32 _MMU_read32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr)
{
//special handling for DMA: read 0 from TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return 0; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return 0; //dtcm
}
//special handling for execution from arm9, since we spend so much time in there
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_CODE)
@ -353,7 +375,15 @@ dunno:
else return _MMU_ARM7_read32(addr);
}
FORCEINLINE void _MMU_write08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u8 val) {
FORCEINLINE void _MMU_write08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u8 val)
{
//special handling for DMA: discard writes to TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return; //dtcm
}
if(PROCNUM==ARMCPU_ARM9)
if((addr&(~0x3FFF)) == MMU.DTCMRegion)
{
@ -370,7 +400,15 @@ FORCEINLINE void _MMU_write08(const int PROCNUM, const MMU_ACCESS_TYPE AT, const
else _MMU_ARM7_write08(addr,val);
}
FORCEINLINE void _MMU_write16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u16 val) {
FORCEINLINE void _MMU_write16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u16 val)
{
//special handling for DMA: discard writes to TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return; //dtcm
}
if(PROCNUM==ARMCPU_ARM9)
if((addr&(~0x3FFF)) == MMU.DTCMRegion)
{
@ -387,7 +425,15 @@ FORCEINLINE void _MMU_write16(const int PROCNUM, const MMU_ACCESS_TYPE AT, const
else _MMU_ARM7_write16(addr,val);
}
FORCEINLINE void _MMU_write32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u32 val) {
FORCEINLINE void _MMU_write32(const int PROCNUM, const MMU_ACCESS_TYPE AT, const u32 addr, u32 val)
{
//special handling for DMA: discard writes to TCM
if(PROCNUM==ARMCPU_ARM9 && AT == MMU_AT_DMA)
{
if(addr<0x02000000) return; //itcm
if((addr&(~0x3FFF)) == MMU.DTCMRegion) return; //dtcm
}
if(PROCNUM==ARMCPU_ARM9)
if((addr&(~0x3FFF)) == MMU.DTCMRegion)
{

4
desmume/src/NDSSystem.cpp
View File

@ -1654,7 +1654,7 @@ void NDS_exec(s32 nb)
else
des_arm_instructions_set[INDEX(NDS_ARM9.instruction)](NDS_ARM9.instruct_adr, NDS_ARM9.instruction, dasmbuf);
printf("%05d %08d 9:%08X %08X %-30s %08X R00:%08X R01:%08X R02:%08X R03:%08X R04:%08X R05:%08X R06:%08X R07:%08X R08:%08X R09:%08X R10:%08X R11:%08X R12:%08X R13:%08X R14:%08X R15:%08X\n",
printf("%05d %08d 9:%08X %08X %-30s R00:%08X R01:%08X R02:%08X R03:%08X R04:%08X R05:%08X R06:%08X R07:%08X R08:%08X R09:%08X R10:%08X R11:%08X R12:%08X R13:%08X R14:%08X R15:%08X\n",
currFrameCounter, nds.cycles,
NDS_ARM9.instruct_adr,NDS_ARM9.instruction, dasmbuf,
NDS_ARM9.R[0], NDS_ARM9.R[1], NDS_ARM9.R[2], NDS_ARM9.R[3], NDS_ARM9.R[4], NDS_ARM9.R[5], NDS_ARM9.R[6], NDS_ARM9.R[7],
@ -1712,7 +1712,7 @@ void NDS_exec(s32 nb)
des_thumb_instructions_set[((NDS_ARM7.instruction)>>6)&1023](NDS_ARM7.instruct_adr, NDS_ARM7.instruction, dasmbuf);
else
des_arm_instructions_set[INDEX(NDS_ARM7.instruction)](NDS_ARM7.instruct_adr, NDS_ARM7.instruction, dasmbuf);
printf("%05d %08d 7:%08X %08X %-30s %08X R00:%08X R01:%08X R02:%08X R03:%08X R04:%08X R05:%08X R06:%08X R07:%08X R08:%08X R09:%08X R10:%08X R11:%08X R12:%08X R13:%08X R14:%08X R15:%08X\n",
printf("%05d %08d 7:%08X %08X %-30s R00:%08X R01:%08X R02:%08X R03:%08X R04:%08X R05:%08X R06:%08X R07:%08X R08:%08X R09:%08X R10:%08X R11:%08X R12:%08X R13:%08X R14:%08X R15:%08X\n",
currFrameCounter, nds.cycles,
NDS_ARM7.instruct_adr,NDS_ARM7.instruction, dasmbuf,
NDS_ARM7.R[0], NDS_ARM7.R[1], NDS_ARM7.R[2], NDS_ARM7.R[3], NDS_ARM7.R[4], NDS_ARM7.R[5], NDS_ARM7.R[6], NDS_ARM7.R[7],