0.9.4+ branch: port r2678 (gpu: fix a bug in affine start register regeneration which may have made some games (pokemon dash?) fail to make it back from a savestate with scroll variables intact). It fixes some graphic issues, but it seems to cause a new issue too.

This commit is contained in:
gocha 2009-09-16 05:01:30 +00:00
parent 3c88eeb84f
commit 02fc2b2a66
1 changed files with 25 additions and 4 deletions

View File

@ -767,6 +767,18 @@ static int SubWrite(std::ostream* os, const SFORMAT *sf)
{
uint32 acc=0;
const SFORMAT* temp = sf;
while(temp->v) {
const SFORMAT* seek = sf;
while(seek->v && seek != temp) {
if(!strcmp(seek->desc,temp->desc)) {
printf("ERROR! duplicated chunk name: %s\n", temp->desc);
}
seek++;
}
temp++;
}
while(sf->v)
{
//not supported right now
@ -1007,10 +1019,19 @@ static void loadstate()
// This should regenerate the graphics configuration
//zero 27-jul-09 : was formerly up to 7F but that wrote to dispfifo which is dumb (one of nitsuja's desynch bugs [that he found, not caused])
for (int i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x66; i+=2)
_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
for (int i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2)
_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
//so then i brought it down to 66 but this resulted in a conceptual bug with affine start registers, which shouldnt get regenerated
//so then i just made this exhaustive list
// for (int i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x66; i+=2)
//_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
// for (int i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2)
//_MMU_write16<ARMCPU_ARM9>(i, _MMU_read16<ARMCPU_ARM9>(i));
static const u8 mainRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x64,0x66,0x6c};
static const u8 subRegenAddr[] = {0x00,0x02,0x08,0x0a,0x0c,0x0e,0x40,0x42,0x44,0x46,0x48,0x4a,0x4c,0x50,0x52,0x54,0x6c};
for(u32 i=0;i<ARRAY_SIZE(mainRegenAddr);i++)
_MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPA+mainRegenAddr[i]));
for(u32 i=0;i<ARRAY_SIZE(subRegenAddr);i++)
_MMU_write16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i], _MMU_read16<ARMCPU_ARM9>(REG_BASE_DISPB+subRegenAddr[i]));
// no need to restore 0x60 since control and MMU.ARM9_REG are both in the savestates, and restoring it could mess up the ack bits anyway
SetupMMU(nds.debugConsole);
}