mirror of https://github.com/bsnes-emu/bsnes.git
282 lines
7.9 KiB
C++
282 lines
7.9 KiB
C++
#ifdef SA1_CPP
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uint8 SA1::bus_read(unsigned addr) {
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if((addr & 0x40fe00) == 0x002200) { //$00-3f|80-bf:2200-23ff
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return mmio_read(addr);
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}
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if((addr & 0x408000) == 0x008000) { //$00-3f|80-bf:8000-ffff
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return mmcrom_read(addr);
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}
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if((addr & 0xc00000) == 0xc00000) { //$c0-ff:0000-ffff
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return mmcrom_read(addr);
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}
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if((addr & 0x40e000) == 0x006000) { //$00-3f|80-bf:6000-7fff
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return mmc_sa1_read(addr);
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}
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if((addr & 0x40f800) == 0x000000) { //$00-3f|80-bf:0000-07ff
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synchronize_cpu();
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return iram.read(addr & 2047);
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}
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if((addr & 0x40f800) == 0x003000) { //$00-3f|80-bf:3000-37ff
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synchronize_cpu();
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return iram.read(addr & 2047);
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}
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if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
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synchronize_cpu();
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return bwram.read(addr & (bwram.size() - 1));
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}
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if((addr & 0xf00000) == 0x600000) { //$60-6f:0000-ffff
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synchronize_cpu();
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return bitmap_read(addr & 0x0fffff);
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}
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//unmapped region
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return regs.mdr;
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}
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void SA1::bus_write(unsigned addr, uint8 data) {
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if((addr & 0x40fe00) == 0x002200) { //$00-3f|80-bf:2200-23ff
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return mmio_write(addr, data);
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}
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if((addr & 0x40e000) == 0x006000) { //$00-3f|80-bf:6000-7fff
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return mmc_sa1_write(addr, data);
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}
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if((addr & 0x40f800) == 0x000000) { //$00-3f|80-bf:0000-07ff
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synchronize_cpu();
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return iram.write(addr & 2047, data);
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}
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if((addr & 0x40f800) == 0x003000) { //$00-3f|80-bf:3000-37ff
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synchronize_cpu();
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return iram.write(addr & 2047, data);
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}
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if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
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synchronize_cpu();
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return bwram.write(addr & (bwram.size() - 1), data);
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}
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if((addr & 0xf00000) == 0x600000) { //$60-6f:0000-ffff
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synchronize_cpu();
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return bitmap_write(addr & 0x0fffff, data);
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}
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}
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//$230c (VDPL), $230d (VDPH) use this bus to read variable-length data.
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//this is used both to keep VBR-reads from accessing MMIO registers, and
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//to avoid syncing the S-CPU and SA-1*; as both chips are able to access
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//these ports.
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uint8 SA1::vbr_read(unsigned addr) {
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if((addr & 0x408000) == 0x008000) { //$00-3f|80-bf:8000-ffff
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return mmcrom_read(addr);
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}
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if((addr & 0xc00000) == 0xc00000) { //$c0-ff:0000-ffff
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return mmcrom_read(addr);
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}
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if((addr & 0x40e000) == 0x006000) { //$00-3f|80-bf:6000-7fff
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return bwram.read(addr & (bwram.size() - 1));
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}
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if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
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return bwram.read(addr & (bwram.size() - 1));
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}
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if((addr & 0x40f800) == 0x000000) { //$00-3f|80-bf:0000-07ff
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return iram.read(addr & 2047);
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}
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if((addr & 0x40f800) == 0x003000) { //$00-3f|80-bf:3000-37ff
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return iram.read(addr & 2047);
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}
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}
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//ROM, I-RAM and MMIO registers are accessed at ~10.74MHz (2 clock ticks)
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//BW-RAM is accessed at ~5.37MHz (4 clock ticks)
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//tick() == 2 clock ticks
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//note: bus conflict delays are not emulated at this time
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void SA1::op_io() {
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tick();
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}
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uint8 SA1::op_read(unsigned addr) {
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tick();
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if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
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return bus_read(addr);
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}
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void SA1::op_write(unsigned addr, uint8 data) {
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tick();
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if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
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bus_write(addr, regs.mdr = data);
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}
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uint8 SA1::mmcrom_read(unsigned addr) {
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if((addr & 0xffffe0) == 0x00ffe0) {
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if(addr == 0xffea && sa1.mmio.cpu_nvsw) return sa1.mmio.snv >> 0;
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if(addr == 0xffeb && sa1.mmio.cpu_nvsw) return sa1.mmio.snv >> 8;
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if(addr == 0xffee && sa1.mmio.cpu_ivsw) return sa1.mmio.siv >> 0;
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if(addr == 0xffef && sa1.mmio.cpu_ivsw) return sa1.mmio.siv >> 8;
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}
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static auto read = [](unsigned addr) {
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return sa1.rom.read(bus.mirror(addr, sa1.rom.size()));
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};
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if((addr & 0xe08000) == 0x008000) { //$00-1f:8000-ffff
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addr = ((addr & 0x1f0000) >> 1) | (addr & 0x007fff);
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if(mmio.cbmode == 0) return read(0x000000 | addr);
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return read((mmio.cb << 20) | addr);
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}
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if((addr & 0xe08000) == 0x208000) { //$20-3f:8000-ffff
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addr = ((addr & 0x1f0000) >> 1) | (addr & 0x007fff);
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if(mmio.dbmode == 0) return read(0x100000 | addr);
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return read((mmio.db << 20) | addr);
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}
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if((addr & 0xe08000) == 0x808000) { //$80-9f:8000-ffff
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addr = ((addr & 0x1f0000) >> 1) | (addr & 0x007fff);
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if(mmio.ebmode == 0) return read(0x200000 | addr);
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return read((mmio.eb << 20) | addr);
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}
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if((addr & 0xe08000) == 0xa08000) { //$a0-bf:8000-ffff
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addr = ((addr & 0x1f0000) >> 1) | (addr & 0x007fff);
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if(mmio.fbmode == 0) return read(0x300000 | addr);
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return read((mmio.fb << 20) | addr);
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}
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if((addr & 0xf00000) == 0xc00000) { //$c0-cf:0000-ffff
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return read((mmio.cb << 20) | (addr & 0x0fffff));
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}
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if((addr & 0xf00000) == 0xd00000) { //$d0-df:0000-ffff
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return read((mmio.db << 20) | (addr & 0x0fffff));
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}
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if((addr & 0xf00000) == 0xe00000) { //$e0-ef:0000-ffff
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return read((mmio.eb << 20) | (addr & 0x0fffff));
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}
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if((addr & 0xf00000) == 0xf00000) { //$f0-ff:0000-ffff
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return read((mmio.fb << 20) | (addr & 0x0fffff));
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}
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return 0x00;
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}
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void SA1::mmcrom_write(unsigned addr, uint8 data) {
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}
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uint8 SA1::mmcbwram_read(unsigned addr) {
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if((addr & 0x40e000) == 0x006000) { //$00-3f|80-bf:6000-7fff
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cpu.synchronize_coprocessors();
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addr = bus.mirror(mmio.sbm * 0x2000 + (addr & 0x1fff), cpubwram.size());
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return cpubwram.read(addr);
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}
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if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
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return cpubwram.read(addr & 0x0fffff);
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}
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return cpu.regs.mdr;
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}
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void SA1::mmcbwram_write(unsigned addr, uint8 data) {
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if((addr & 0x40e000) == 0x006000) { //$00-3f|80-bf:6000-7fff
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cpu.synchronize_coprocessors();
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addr = bus.mirror(mmio.sbm * 0x2000 + (addr & 0x1fff), cpubwram.size());
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return cpubwram.write(addr, data);
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}
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if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
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return cpubwram.write(addr & 0x0fffff, data);
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}
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}
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uint8 SA1::mmc_sa1_read(unsigned addr) {
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synchronize_cpu();
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if(mmio.sw46 == 0) {
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//$40-43:0000-ffff x 32 projection
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addr = bus.mirror((mmio.cbm & 0x1f) * 0x2000 + (addr & 0x1fff), bwram.size());
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return bwram.read(addr);
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} else {
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//$60-6f:0000-ffff x 128 projection
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addr = bus.mirror(mmio.cbm * 0x2000 + (addr & 0x1fff), 0x100000);
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return bitmap_read(addr);
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}
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}
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void SA1::mmc_sa1_write(unsigned addr, uint8 data) {
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synchronize_cpu();
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if(mmio.sw46 == 0) {
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//$40-43:0000-ffff x 32 projection
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addr = bus.mirror((mmio.cbm & 0x1f) * 0x2000 + (addr & 0x1fff), bwram.size());
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bwram.write(addr, data);
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} else {
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//$60-6f:0000-ffff x 128 projection
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addr = bus.mirror(mmio.cbm * 0x2000 + (addr & 0x1fff), 0x100000);
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bitmap_write(addr, data);
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}
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}
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uint8 SA1::bitmap_read(unsigned addr) {
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if(mmio.bbf == 0) {
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//4bpp
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unsigned shift = addr & 1;
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addr = (addr >> 1) & (bwram.size() - 1);
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switch(shift) {
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case 0: return (bwram.read(addr) >> 0) & 15;
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case 1: return (bwram.read(addr) >> 4) & 15;
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}
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} else {
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//2bpp
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unsigned shift = addr & 3;
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addr = (addr >> 2) & (bwram.size() - 1);
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switch(shift) {
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case 0: return (bwram.read(addr) >> 0) & 3;
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case 1: return (bwram.read(addr) >> 2) & 3;
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case 2: return (bwram.read(addr) >> 4) & 3;
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case 3: return (bwram.read(addr) >> 6) & 3;
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}
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}
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}
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void SA1::bitmap_write(unsigned addr, uint8 data) {
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if(mmio.bbf == 0) {
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//4bpp
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unsigned shift = addr & 1;
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addr = (addr >> 1) & (bwram.size() - 1);
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switch(shift) {
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case 0: data = (bwram.read(addr) & 0xf0) | ((data & 15) << 0); break;
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case 1: data = (bwram.read(addr) & 0x0f) | ((data & 15) << 4); break;
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}
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} else {
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//2bpp
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unsigned shift = addr & 3;
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addr = (addr >> 2) & (bwram.size() - 1);
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switch(shift) {
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case 0: data = (bwram.read(addr) & 0xfc) | ((data & 3) << 0); break;
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case 1: data = (bwram.read(addr) & 0xf3) | ((data & 3) << 2); break;
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case 2: data = (bwram.read(addr) & 0xcf) | ((data & 3) << 4); break;
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case 3: data = (bwram.read(addr) & 0x3f) | ((data & 3) << 6); break;
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}
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}
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bwram.write(addr, data);
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}
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#endif
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