Update to v074r09 release.

byuu says:

This WIP fixes up the last bit from the old memory mapping system, the
BS-X Satellaview town cartridge now has a static memory mapper that is
dynamically decoded based on register settings. Tested with BS Town + BS
Zelda, and I can get in-game just fine. The mapping code is actually
a lot more readable this way, too.
This commit is contained in:
Tim Allen 2011-01-22 19:18:03 +11:00
parent cab5917806
commit ecf96726f9
14 changed files with 251 additions and 178 deletions

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@ -338,11 +338,14 @@ SNESCartridge::SNESCartridge(const uint8_t *data, unsigned size) {
xml << " </slot>\n";
xml << " </bsx>\n";
} else if(mapper == BSXROM) {
xml << " <rom>\n";
xml << " <map mode='linear' address='00-3f:8000-ffff'/>\n";
xml << " <map mode='linear' address='80-bf:8000-ffff'/>\n";
xml << " </rom>\n";
xml << " <bsx>\n";
xml << " <mcu>\n";
xml << " <map address='00-3f:8000-ffff'/>\n";
xml << " <map address='80-bf:8000-ffff'/>\n";
xml << " <map address='40-7f:0000-ffff'/>\n";
xml << " <map address='c0-ff:0000-ffff'/>\n";
xml << " <map address='20-3f:6000-7fff'/>\n";
xml << " </mcu>\n";
xml << " <mmio>\n";
xml << " <map address='00-3f:5000-5fff'/>\n";
xml << " <map address='80-bf:5000-5fff'/>\n";

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@ -45,7 +45,7 @@ obj/snes-icd2.o : $(snes)/chip/icd2/icd2.cpp $(call rwildcard,$(snes)/chip/ic
obj/snes-superfx.o : $(snes)/chip/superfx/superfx.cpp $(call rwildcard,$(snes)/chip/superfx/)
obj/snes-sa1.o : $(snes)/chip/sa1/sa1.cpp $(call rwildcard,$(snes)/chip/sa1/)
obj/snes-necdsp.o : $(snes)/chip/necdsp/necdsp.cpp $(call rwildcard,$(snes)/chip/necdsp/)
obj/snes-bsx.o : $(snes)/chip/bsx/bsx.cpp $(snes)/chip/bsx/*
obj/snes-bsx.o : $(snes)/chip/bsx/bsx.cpp $(call rwildcard,$(snes)/chip/bsx/)
obj/snes-srtc.o : $(snes)/chip/srtc/srtc.cpp $(snes)/chip/srtc/*
obj/snes-sdd1.o : $(snes)/chip/sdd1/sdd1.cpp $(snes)/chip/sdd1/*
obj/snes-spc7110.o : $(snes)/chip/spc7110/spc7110.cpp $(snes)/chip/spc7110/*

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@ -38,7 +38,7 @@ void Cartridge::load(Mode cartridge_mode, const lstring &xml_list) {
has_serial = false;
parse_xml(xml_list);
//print(xml_list[0], "\n\n");
print(xml_list[0], "\n\n");
if(ram_size > 0) {
memory::cartram.map(allocate<uint8_t>(ram_size, 0xff), ram_size);

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@ -355,6 +355,16 @@ void Cartridge::xml_parse_bsx(xml_element &root) {
mapping.append(m);
}
}
} else if(node.name == "mcu") {
foreach(leaf, node.element) {
if(leaf.name == "map") {
Mapping m({ &BSXCart::mcu_read, &bsxcart }, { &BSXCart::mcu_write, &bsxcart });
foreach(attr, leaf.attribute) {
if(attr.name == "address") xml_parse_address(m, attr.content);
}
mapping.append(m);
}
}
} else if(node.name == "mmio") {
foreach(leaf, node.element) {
if(leaf.name == "map") {

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@ -2,7 +2,7 @@
#define BSX_CPP
namespace SNES {
#include "bsx_base.cpp"
#include "bsx_cart.cpp"
#include "bsx_flash.cpp"
#include "satellaview/satellaview.cpp"
#include "cartridge/cartridge.cpp"
#include "flash/flash.cpp"
}

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@ -1,71 +1,3 @@
class BSXBase {
public:
void init();
void enable();
void power();
void reset();
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
private:
struct {
uint8 r2188, r2189, r218a, r218b;
uint8 r218c, r218d, r218e, r218f;
uint8 r2190, r2191, r2192, r2193;
uint8 r2194, r2195, r2196, r2197;
uint8 r2198, r2199, r219a, r219b;
uint8 r219c, r219d, r219e, r219f;
uint8 r2192_counter;
uint8 r2192_hour, r2192_minute, r2192_second;
} regs;
};
class BSXCart {
public:
void init();
void enable();
void power();
void reset();
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
BSXCart();
~BSXCart();
private:
struct {
uint8 r[16];
} regs;
void update_memory_map();
};
class BSXFlash {
public:
void init();
void enable();
void power();
void reset();
unsigned size() const;
uint8 read(unsigned addr);
void write(unsigned addr, uint8 data);
private:
struct {
unsigned command;
uint8 write_old;
uint8 write_new;
bool flash_enable;
bool read_enable;
bool write_enable;
} regs;
};
extern BSXBase bsxbase;
extern BSXCart bsxcart;
extern BSXFlash bsxflash;
#include "satellaview/satellaview.hpp"
#include "cartridge/cartridge.hpp"
#include "flash/flash.hpp"

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@ -1,95 +0,0 @@
#ifdef BSX_CPP
BSXCart bsxcart;
void BSXCart::init() {
}
void BSXCart::enable() {
}
void BSXCart::power() {
reset();
}
void BSXCart::reset() {
for(unsigned i = 0; i < 16; i++) regs.r[i] = 0x00;
regs.r[0x07] = 0x80;
regs.r[0x08] = 0x80;
update_memory_map();
}
void BSXCart::update_memory_map() {
Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)memory::bsxpram;
if((regs.r[0x02] & 0x80) == 0x00) {
//LoROM mapping
// bus.map(Bus::MapMode::Linear, 0x00, 0x7d, 0x8000, 0xffff, cart);
// bus.map(Bus::MapMode::Linear, 0x80, 0xff, 0x8000, 0xffff, cart);
} else {
//HiROM mapping
// bus.map(Bus::MapMode::Shadow, 0x00, 0x3f, 0x8000, 0xffff, cart);
// bus.map(Bus::MapMode::Linear, 0x40, 0x7d, 0x0000, 0xffff, cart);
// bus.map(Bus::MapMode::Shadow, 0x80, 0xbf, 0x8000, 0xffff, cart);
// bus.map(Bus::MapMode::Linear, 0xc0, 0xff, 0x0000, 0xffff, cart);
}
if(regs.r[0x03] & 0x80) {
// bus.map(Bus::MapMode::Linear, 0x60, 0x6f, 0x0000, 0xffff, memory::bsxpram);
//bus.map(Bus::MapMode::Linear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
}
if((regs.r[0x05] & 0x80) == 0x00) {
// bus.map(Bus::MapMode::Linear, 0x40, 0x4f, 0x0000, 0xffff, memory::bsxpram);
}
if((regs.r[0x06] & 0x80) == 0x00) {
// bus.map(Bus::MapMode::Linear, 0x50, 0x5f, 0x0000, 0xffff, memory::bsxpram);
}
if(regs.r[0x07] & 0x80) {
// bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
}
if(regs.r[0x08] & 0x80) {
// bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, memory::cartrom);
}
// bus.map(Bus::MapMode::Shadow, 0x20, 0x3f, 0x6000, 0x7fff, memory::bsxpram);
// bus.map(Bus::MapMode::Linear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
}
uint8 BSXCart::mmio_read(unsigned addr) {
if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
uint8 n = (addr >> 16) & 15;
return regs.r[n];
}
if((addr & 0xf8f000) == 0x105000) { //$[10-17]:[5000-5fff] SRAM
return memory::bsxram.read(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
}
return 0x00;
}
void BSXCart::mmio_write(unsigned addr, uint8 data) {
if((addr & 0xf0ffff) == 0x005000) { //$[00-0f]:5000 MMIO
uint8 n = (addr >> 16) & 15;
regs.r[n] = data;
if(n == 0x0e && data & 0x80) update_memory_map();
return;
}
if((addr & 0xf8f000) == 0x105000) { //$[10-17]:[5000-5fff] SRAM
return memory::bsxram.write(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
}
}
BSXCart::BSXCart() {
}
BSXCart::~BSXCart() {
}
#endif

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@ -0,0 +1,145 @@
#ifdef BSX_CPP
BSXCart bsxcart;
void BSXCart::init() {
}
void BSXCart::enable() {
}
void BSXCart::power() {
reset();
}
void BSXCart::reset() {
for(unsigned i = 0; i < 16; i++) r[i] = 0x00;
r[0x07] = 0x80;
r[0x08] = 0x80;
mmio_commit();
}
uint8 BSXCart::memory_access(bool write, Memory &memory, unsigned addr, uint8 data) {
if(write == 0) return memory_read(memory, addr);
memory_write(memory, addr, data);
}
uint8 BSXCart::memory_read(Memory &memory, unsigned addr) {
addr = bus.mirror(addr, memory.size());
return memory.read(addr);
}
void BSXCart::memory_write(Memory &memory, unsigned addr, uint8 data) {
addr = bus.mirror(addr, memory.size());
return memory.write(addr, data);
}
//mcu_access() allows mcu_read() and mcu_write() to share decoding logic
uint8 BSXCart::mcu_access(bool write, unsigned addr, uint8 data) {
if((addr & 0xe08000) == 0x008000) { //$00-1f:8000-ffff
if(r07 == 1) {
addr = ((addr & 0x1f0000) >> 1) | (addr & 0x7fff);
return memory_access(write, memory::cartrom, addr, data);
}
}
if((addr & 0xe08000) == 0x808000) { //$80-9f:8000-ffff
if(r08 == 1) {
addr = ((addr & 0x1f0000) >> 1) | (addr & 0x7fff);
return memory_access(write, memory::cartrom, addr, data);
}
}
if((addr & 0xe0e000) == 0x206000) { //$20-3f:6000-7fff
return memory_access(write, memory::bsxpram, addr, data);
}
if((addr & 0xf00000) == 0x400000) { //$40-4f:0000-ffff
if(r05 == 0) return memory_access(write, memory::bsxpram, addr & 0x0fffff, data);
}
if((addr & 0xf00000) == 0x500000) { //$50-5f:0000-ffff
if(r06 == 0) return memory_access(write, memory::bsxpram, addr & 0x0fffff, data);
}
if((addr & 0xf00000) == 0x600000) { //$60-6f:0000-ffff
if(r03 == 1) return memory_access(write, memory::bsxpram, addr & 0x0fffff, data);
}
if((addr & 0xf80000) == 0x700000) { //$70-77:0000-ffff
return memory_access(write, memory::bsxpram, addr & 0x07ffff, data);
}
if(((addr & 0xc08000) == 0x008000) //$00-3f:8000-ffff
|| ((addr & 0xc00000) == 0x400000) //$40-7f:0000-ffff
|| ((addr & 0xc08000) == 0x808000) //$80-bf:8000-ffff
|| ((addr & 0xc00000) == 0xc00000) //$c0-ff:0000-ffff
) {
if(r02 == 0) addr = ((addr & 0x7f0000) >> 1) | (addr & 0x7fff);
Memory &memory = (r01 == 0 ? (Memory&)bsxflash : (Memory&)memory::bsxpram);
return memory_access(write, memory, addr & 0x7fffff, data);
}
return cpu.regs.mdr;
}
uint8 BSXCart::mcu_read(unsigned addr) {
return mcu_access(0, addr);
}
void BSXCart::mcu_write(unsigned addr, uint8 data) {
mcu_access(1, addr, data);
}
uint8 BSXCart::mmio_read(unsigned addr) {
if((addr & 0xf0ffff) == 0x005000) { //$00-0f:5000 MMIO
uint8 n = (addr >> 16) & 15;
return r[n];
}
if((addr & 0xf8f000) == 0x105000) { //$10-17:5000-5fff SRAM
return memory_read(memory::bsxram, ((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
}
return 0x00;
}
void BSXCart::mmio_write(unsigned addr, uint8 data) {
if((addr & 0xf0ffff) == 0x005000) { //$00-0f:5000 MMIO
uint8 n = (addr >> 16) & 15;
r[n] = data;
if(n == 0x0e && data & 0x80) mmio_commit();
return;
}
if((addr & 0xf8f000) == 0x105000) { //$10-17:5000-5fff SRAM
return memory_write(memory::bsxram, ((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
}
}
void BSXCart::mmio_commit() {
r00 = r[0x00] & 0x80;
r01 = r[0x01] & 0x80;
r02 = r[0x02] & 0x80;
r03 = r[0x03] & 0x80;
r04 = r[0x04] & 0x80;
r05 = r[0x05] & 0x80;
r06 = r[0x06] & 0x80;
r07 = r[0x07] & 0x80;
r08 = r[0x08] & 0x80;
r09 = r[0x09] & 0x80;
r0a = r[0x0a] & 0x80;
r0b = r[0x0b] & 0x80;
r0c = r[0x0c] & 0x80;
r0d = r[0x0d] & 0x80;
r0e = r[0x0e] & 0x80;
r0f = r[0x0f] & 0x80;
}
BSXCart::BSXCart() {
}
BSXCart::~BSXCart() {
}
#endif

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@ -0,0 +1,31 @@
class BSXCart {
public:
void init();
void enable();
void power();
void reset();
uint8 memory_access(bool write, Memory &memory, unsigned addr, uint8 data);
uint8 memory_read(Memory &memory, unsigned addr);
void memory_write(Memory &memory, unsigned addr, uint8 data);
uint8 mcu_access(bool write, unsigned addr, uint8 data = 0x00);
uint8 mcu_read(unsigned addr);
void mcu_write(unsigned addr, uint8 data);
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
void mmio_commit();
BSXCart();
~BSXCart();
private:
uint8 r[16];
bool r00, r01, r02, r03;
bool r04, r05, r06, r07;
bool r08, r09, r0a, r0b;
bool r0c, r0d, r0e, r0f;
};
extern BSXCart bsxcart;

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@ -116,4 +116,3 @@ void BSXFlash::write(unsigned addr, uint8 data) {
}
#endif

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@ -0,0 +1,24 @@
class BSXFlash : public Memory {
public:
void init();
void enable();
void power();
void reset();
unsigned size() const;
uint8 read(unsigned addr);
void write(unsigned addr, uint8 data);
private:
struct {
unsigned command;
uint8 write_old;
uint8 write_new;
bool flash_enable;
bool read_enable;
bool write_enable;
} regs;
};
extern BSXFlash bsxflash;

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@ -139,4 +139,3 @@ void BSXBase::mmio_write(unsigned addr, uint8 data) {
}
#endif

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@ -0,0 +1,25 @@
class BSXBase {
public:
void init();
void enable();
void power();
void reset();
uint8 mmio_read(unsigned addr);
void mmio_write(unsigned addr, uint8 data);
private:
struct {
uint8 r2188, r2189, r218a, r218b;
uint8 r218c, r218d, r218e, r218f;
uint8 r2190, r2191, r2192, r2193;
uint8 r2194, r2195, r2196, r2197;
uint8 r2198, r2199, r219a, r219b;
uint8 r219c, r219d, r219e, r219f;
uint8 r2192_counter;
uint8 r2192_hour, r2192_minute, r2192_second;
} regs;
};
extern BSXBase bsxbase;

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@ -1,7 +1,7 @@
namespace SNES {
namespace Info {
static const char Name[] = "bsnes";
static const char Version[] = "074.08";
static const char Version[] = "074.09";
static const unsigned SerializerVersion = 17;
}
}