2011-09-29 12:44:49 +00:00
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//NES-UNROM
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//NES-UOROM
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2011-10-02 10:05:45 +00:00
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struct NES_UxROM : Board {
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2015-12-05 05:44:49 +00:00
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NES_UxROM(Markup::Node& document) : Board(document) {
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2016-01-12 11:08:34 +00:00
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settings.mirror = document["board/mirror/mode"].text() == "vertical" ? 1 : 0;
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2015-12-05 05:44:49 +00:00
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}
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2011-09-29 12:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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auto readPRG(uint addr) -> uint8 {
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if((addr & 0xc000) == 0x8000) return prgrom.read((prgBank << 14) | (addr & 0x3fff));
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if((addr & 0xc000) == 0xc000) return prgrom.read(( 0x0f << 14) | (addr & 0x3fff));
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2015-12-05 05:44:49 +00:00
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return cpu.mdr();
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}
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2011-09-29 12:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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auto writePRG(uint addr, uint8 data) -> void {
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if(addr & 0x8000) prgBank = data & 0x0f;
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2015-12-05 05:44:49 +00:00
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}
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2011-09-29 12:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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auto readCHR(uint addr) -> uint8 {
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2015-12-05 05:44:49 +00:00
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if(addr & 0x2000) {
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if(settings.mirror == 0) addr = ((addr & 0x0800) >> 1) | (addr & 0x03ff);
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2016-06-26 08:54:12 +00:00
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return ppu.readCIRAM(addr);
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2015-12-05 05:44:49 +00:00
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}
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2016-06-27 13:07:57 +00:00
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return Board::readCHR(addr);
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2011-09-29 12:44:49 +00:00
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}
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2016-06-27 13:07:57 +00:00
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auto writeCHR(uint addr, uint8 data) -> void {
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2015-12-05 05:44:49 +00:00
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if(addr & 0x2000) {
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if(settings.mirror == 0) addr = ((addr & 0x0800) >> 1) | (addr & 0x03ff);
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2016-06-26 08:54:12 +00:00
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return ppu.writeCIRAM(addr, data);
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2015-12-05 05:44:49 +00:00
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}
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2016-06-27 13:07:57 +00:00
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return Board::writeCHR(addr, data);
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2011-09-29 12:44:49 +00:00
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}
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2015-12-05 05:44:49 +00:00
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auto power() -> void {
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2016-06-27 13:07:57 +00:00
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prgBank = 0;
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2015-12-05 05:44:49 +00:00
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}
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2011-09-29 12:44:49 +00:00
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2015-12-05 05:44:49 +00:00
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auto serialize(serializer& s) -> void {
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Board::serialize(s);
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2011-10-01 12:06:48 +00:00
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2016-06-27 13:07:57 +00:00
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s.integer(prgBank);
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2015-12-05 05:44:49 +00:00
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}
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2011-09-29 12:44:49 +00:00
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2015-12-05 05:44:49 +00:00
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struct Settings {
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bool mirror; //0 = horizontal, 1 = vertical
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} settings;
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2011-09-29 12:44:49 +00:00
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2016-06-27 13:07:57 +00:00
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uint4 prgBank;
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2011-09-29 12:44:49 +00:00
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};
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