Update to v098r01 release.
byuu says:
Changelog:
- SFC: balanced profile removed
- SFC: performance profile removed
- SFC: code for handling non-threaded CPU, SMP, DSP, PPU removed
- SFC: Coprocessor, Controller (and expansion port) shared Thread code
merged to SFC::Cothread
- Cothread here just means "Thread with CPU affinity" (couldn't think
of a better name, sorry)
- SFC: CPU now has vector<Thread*> coprocessors, peripherals;
- this is the beginning of work to allow expansion port devices to be
dynamically changed at run-time
- ruby: all audio drivers default to 48000hz instead of 22050hz now if
no frequency is assigned
- note: the WASAPI driver can default to whatever the native frequency
is; doesn't have to be 48000hz
- tomoko: removed the ability to change the frequency from the UI (but
it will display the frequency used)
- tomoko: removed the timing settings panel
- the goal is to work toward smooth video via adaptive sync
- the model is broken by not being in control of the audio frequency
anyway
- it's further broken by PAL running at 50hz and WSC running at 75hz
- it was always broken anyway by SNES interlace timing varying from
progressive timing
- higan: audio/ stub created (for now, it's just nall/dsp/ moved here
and included as a header)
- higan: video/ stub created
- higan/GNUmakefile: now includes build rules for essential components
(libco, emulator, audio, video)
The audio changes are in preparation to merge wareya's awesome WASAPI
work without the need for the nall/dsp resampler.
2016-04-09 03:40:12 +00:00
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struct SA1 : Processor::R65816, Cothread {
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2016-06-05 05:03:21 +00:00
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//sa1.cpp
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2015-11-14 00:52:51 +00:00
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static auto Enter() -> void;
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2016-02-09 11:51:12 +00:00
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auto main() -> void;
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2015-11-14 00:52:51 +00:00
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auto tick() -> void;
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2016-03-26 01:56:15 +00:00
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auto interrupt() -> void override;
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2010-08-09 13:28:56 +00:00
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2016-06-05 05:03:21 +00:00
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alwaysinline auto triggerIRQ() -> void;
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2016-03-26 01:56:15 +00:00
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alwaysinline auto lastCycle() -> void override;
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alwaysinline auto interruptPending() const -> bool override;
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2010-08-09 13:28:56 +00:00
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2015-11-14 00:52:51 +00:00
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auto init() -> void;
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auto load() -> void;
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auto unload() -> void;
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auto power() -> void;
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auto reset() -> void;
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2010-08-09 13:28:56 +00:00
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2016-06-05 05:03:21 +00:00
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//bus.cpp
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struct CPUIRAM : Memory {
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auto size() const -> uint;
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alwaysinline auto read(uint24, uint8 = 0) -> uint8;
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alwaysinline auto write(uint24, uint8) -> void;
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};
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struct CPUBWRAM : Memory {
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auto size() const -> uint;
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alwaysinline auto read(uint24, uint8 = 0) -> uint8;
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alwaysinline auto write(uint24, uint8) -> void;
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bool dma;
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};
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//dma.cpp
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struct DMA {
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enum CDEN : uint { DmaNormal = 0, DmaCharConversion = 1 };
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enum SD : uint { SourceROM = 0, SourceBWRAM = 1, SourceIRAM = 2 };
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enum DD : uint { DestIRAM = 0, DestBWRAM = 1 };
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uint line;
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};
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auto dma_normal() -> void;
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auto dma_cc1() -> void;
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auto dma_cc1_read(uint addr) -> uint8;
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auto dma_cc2() -> void;
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//memory.cpp
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auto bus_read(uint24 addr, uint8 data) -> uint8;
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auto bus_write(uint24 addr, uint8 data) -> void;
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auto vbr_read(uint24 addr, uint8 data = 0) -> uint8;
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alwaysinline auto io() -> void override;
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alwaysinline auto read(uint24 addr) -> uint8 override;
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alwaysinline auto write(uint24 addr, uint8 data) -> void override;
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auto mmcrom_read(uint24 addr, uint8 data) -> uint8;
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auto mmcrom_write(uint24 addr, uint8 data) -> void;
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auto mmcbwram_read(uint24 addr, uint8 data) -> uint8;
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auto mmcbwram_write(uint24 addr, uint8 data) -> void;
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auto mmc_sa1_read(uint addr, uint8 data) -> uint8;
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auto mmc_sa1_write(uint addr, uint8 data) -> void;
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auto bitmap_read(uint addr, uint8 data) -> uint8;
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auto bitmap_write(uint addr, uint8 data) -> void;
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//mmio.cpp
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auto readIO(uint24 addr, uint8 data) -> uint8;
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auto writeIO(uint24 addr, uint8 data) -> void;
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//todo: merge these functions into writeIO()
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auto mmio_w2200(uint8) -> void; //CCNT
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auto mmio_w2201(uint8) -> void; //SIE
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auto mmio_w2202(uint8) -> void; //SIC
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auto mmio_w2203(uint8) -> void; //CRVL
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auto mmio_w2204(uint8) -> void; //CRVH
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auto mmio_w2205(uint8) -> void; //CNVL
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auto mmio_w2206(uint8) -> void; //CNVH
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auto mmio_w2207(uint8) -> void; //CIVL
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auto mmio_w2208(uint8) -> void; //CIVH
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auto mmio_w2209(uint8) -> void; //SCNT
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auto mmio_w220a(uint8) -> void; //CIE
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auto mmio_w220b(uint8) -> void; //CIC
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auto mmio_w220c(uint8) -> void; //SNVL
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auto mmio_w220d(uint8) -> void; //SNVH
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auto mmio_w220e(uint8) -> void; //SIVL
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auto mmio_w220f(uint8) -> void; //SIVH
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auto mmio_w2210(uint8) -> void; //TMC
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auto mmio_w2211(uint8) -> void; //CTR
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auto mmio_w2212(uint8) -> void; //HCNTL
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auto mmio_w2213(uint8) -> void; //HCNTH
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auto mmio_w2214(uint8) -> void; //VCNTL
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auto mmio_w2215(uint8) -> void; //VCNTH
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auto mmio_w2220(uint8) -> void; //CXB
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auto mmio_w2221(uint8) -> void; //DXB
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auto mmio_w2222(uint8) -> void; //EXB
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auto mmio_w2223(uint8) -> void; //FXB
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auto mmio_w2224(uint8) -> void; //BMAPS
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auto mmio_w2225(uint8) -> void; //BMAP
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auto mmio_w2226(uint8) -> void; //SBWE
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auto mmio_w2227(uint8) -> void; //CBWE
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auto mmio_w2228(uint8) -> void; //BWPA
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auto mmio_w2229(uint8) -> void; //SIWP
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auto mmio_w222a(uint8) -> void; //CIWP
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auto mmio_w2230(uint8) -> void; //DCNT
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auto mmio_w2231(uint8) -> void; //CDMA
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auto mmio_w2232(uint8) -> void; //SDAL
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auto mmio_w2233(uint8) -> void; //SDAH
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auto mmio_w2234(uint8) -> void; //SDAB
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auto mmio_w2235(uint8) -> void; //DDAL
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auto mmio_w2236(uint8) -> void; //DDAH
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auto mmio_w2237(uint8) -> void; //DDAB
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auto mmio_w2238(uint8) -> void; //DTCL
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auto mmio_w2239(uint8) -> void; //DTCH
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auto mmio_w223f(uint8) -> void; //BBF
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auto mmio_w2240(uint8) -> void; //BRF0
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auto mmio_w2241(uint8) -> void; //BRF1
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auto mmio_w2242(uint8) -> void; //BRF2
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auto mmio_w2243(uint8) -> void; //BRF3
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auto mmio_w2244(uint8) -> void; //BRF4
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auto mmio_w2245(uint8) -> void; //BRF5
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auto mmio_w2246(uint8) -> void; //BRF6
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auto mmio_w2247(uint8) -> void; //BRF7
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auto mmio_w2248(uint8) -> void; //BRF8
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auto mmio_w2249(uint8) -> void; //BRF9
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auto mmio_w224a(uint8) -> void; //BRFA
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auto mmio_w224b(uint8) -> void; //BRFB
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auto mmio_w224c(uint8) -> void; //BRFC
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auto mmio_w224d(uint8) -> void; //BRFD
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auto mmio_w224e(uint8) -> void; //BRFE
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auto mmio_w224f(uint8) -> void; //BRFF
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auto mmio_w2250(uint8) -> void; //MCNT
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auto mmio_w2251(uint8) -> void; //MAL
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auto mmio_w2252(uint8) -> void; //MAH
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auto mmio_w2253(uint8) -> void; //MBL
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auto mmio_w2254(uint8) -> void; //MBH
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auto mmio_w2258(uint8) -> void; //VBD
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auto mmio_w2259(uint8) -> void; //VDAL
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auto mmio_w225a(uint8) -> void; //VDAH
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auto mmio_w225b(uint8) -> void; //VDAB
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//serialization.cpp
|
2015-11-14 00:52:51 +00:00
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auto serialize(serializer&) -> void;
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MappedRAM rom;
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MappedRAM iram;
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MappedRAM bwram;
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2016-06-05 05:03:21 +00:00
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CPUIRAM cpuiram;
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CPUBWRAM cpubwram;
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private:
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DMA dma;
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struct Status {
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uint8 counter;
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bool interruptPending;
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uint16 scanlines;
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uint16 vcounter;
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uint16 hcounter;
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} status;
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struct MMIO {
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//$2200 CCNT
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bool sa1_irq;
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bool sa1_rdyb;
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bool sa1_resb;
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bool sa1_nmi;
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uint8 smeg;
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//$2201 SIE
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bool cpu_irqen;
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bool chdma_irqen;
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//$2202 SIC
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bool cpu_irqcl;
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bool chdma_irqcl;
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//$2203,$2204 CRV
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uint16 crv;
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//$2205,$2206 CNV
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uint16 cnv;
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//$2207,$2208 CIV
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uint16 civ;
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//$2209 SCNT
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bool cpu_irq;
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bool cpu_ivsw;
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bool cpu_nvsw;
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uint8 cmeg;
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//$220a CIE
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bool sa1_irqen;
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bool timer_irqen;
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bool dma_irqen;
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bool sa1_nmien;
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//$220b CIC
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bool sa1_irqcl;
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bool timer_irqcl;
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bool dma_irqcl;
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bool sa1_nmicl;
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//$220c,$220d SNV
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uint16 snv;
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//$220e,$220f SIV
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uint16 siv;
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//$2210 TMC
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bool hvselb;
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bool ven;
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bool hen;
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//$2212,$2213
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uint16 hcnt;
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//$2214,$2215
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uint16 vcnt;
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//$2220 CXB
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bool cbmode;
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uint cb;
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//$2221 DXB
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bool dbmode;
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uint db;
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//$2222 EXB
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bool ebmode;
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uint eb;
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//$2223 FXB
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bool fbmode;
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uint fb;
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//$2224 BMAPS
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uint8 sbm;
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//$2225 BMAP
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bool sw46;
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uint8 cbm;
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//$2226 SBWE
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bool swen;
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//$2227 CBWE
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bool cwen;
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//$2228 BWPA
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uint8 bwp;
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//$2229 SIWP
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uint8 siwp;
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//$222a CIWP
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uint8 ciwp;
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//$2230 DCNT
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bool dmaen;
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bool dprio;
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bool cden;
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bool cdsel;
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bool dd;
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uint8 sd;
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//$2231 CDMA
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bool chdend;
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uint8 dmasize;
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uint8 dmacb;
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//$2232-$2234 SDA
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uint32 dsa;
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//$2235-$2237 DDA
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uint32 dda;
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//$2238,$2239 DTC
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uint16 dtc;
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//$223f BBF
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bool bbf;
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//$2240-224f BRF
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uint8 brf[16];
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//$2250 MCNT
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|
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bool acm;
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bool md;
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//$2251,$2252 MA
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uint16 ma;
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//$2253,$2254 MB
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uint16 mb;
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//$2258 VBD
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|
|
|
bool hl;
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|
|
uint8 vb;
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//$2259-$225b VDA
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uint32 va;
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|
uint8 vbit;
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//$2300 SFR
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|
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bool cpu_irqfl;
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|
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bool chdma_irqfl;
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//$2301 CFR
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|
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bool sa1_irqfl;
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|
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bool timer_irqfl;
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|
|
bool dma_irqfl;
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|
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bool sa1_nmifl;
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|
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//$2302,$2303 HCR
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|
|
|
uint16 hcr;
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//$2304,$2305 VCR
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|
|
|
uint16 vcr;
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//$2306-230a MR
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|
|
uint64 mr;
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|
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//$230b OF
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|
|
|
bool overflow;
|
|
|
|
} mmio;
|
2010-08-09 13:28:56 +00:00
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|
|
};
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|
|
|
|
|
|
|
extern SA1 sa1;
|